Changeset 374 for asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/pwmout_api.c
- Timestamp:
- Apr 5, 2019, 9:26:53 PM (5 years ago)
- Location:
- asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX
- Files:
-
- 1 added
- 1 copied
Legend:
- Unmodified
- Added
- Removed
-
asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/pwmout_api.c
r373 r374 17 17 #include "pwmout_api.h" 18 18 #include "cmsis.h" 19 #include " pinmap.h"19 #include "PeripheralPins.h" 20 20 #include "RZ_A1_Init.h" 21 #include "cpg_iodefine.h" 22 #include "pwm_iodefine.h" 21 #include "iodefine.h" 23 22 #include "gpio_addrdefine.h" 24 25 #define MTU2_PWM_NUM 22 23 #include "mbed_drv_cfg.h" 24 #include "mtu2.h" 25 26 #define MTU2_PWM_OFFSET 0x20 27 28 #ifdef FUNC_MOTOR_CTL_PWM 29 typedef enum { 30 PWM1A = 0, 31 PWM1B, 32 PWM1C, 33 PWM1D, 34 PWM1E, 35 PWM1F, 36 PWM1G, 37 PWM1H, 38 PWM2A = 0x10, 39 PWM2B, 40 PWM2C, 41 PWM2D, 42 PWM2E, 43 PWM2F, 44 PWM2G, 45 PWM2H, 46 } PWMType; 47 48 static const PWMType PORT[] = { 49 PWM1A, // PWM_PWM1A 50 PWM1B, // PWM_PWM1B 51 PWM1C, // PWM_PWM1C 52 PWM1D, // PWM_PWM1D 53 PWM1E, // PWM_PWM1E 54 PWM1F, // PWM_PWM1F 55 PWM1G, // PWM_PWM1G 56 PWM1H, // PWM_PWM1H 57 PWM2A, // PWM_PWM2A 58 PWM2B, // PWM_PWM2B 59 PWM2C, // PWM_PWM2C 60 PWM2D, // PWM_PWM2D 61 PWM2E, // PWM_PWM2E 62 PWM2F, // PWM_PWM2F 63 PWM2G, // PWM_PWM2G 64 PWM2H, // PWM_PWM2H 65 }; 66 67 static __IO uint16_t *PWM_MATCH[] = { 68 &PWMPWBFR_1A, // PWM_PWM1A 69 &PWMPWBFR_1A, // PWM_PWM1B 70 &PWMPWBFR_1C, // PWM_PWM1C 71 &PWMPWBFR_1C, // PWM_PWM1D 72 &PWMPWBFR_1E, // PWM_PWM1E 73 &PWMPWBFR_1E, // PWM_PWM1F 74 &PWMPWBFR_1G, // PWM_PWM1G 75 &PWMPWBFR_1G, // PWM_PWM1H 76 &PWMPWBFR_2A, // PWM_PWM2A 77 &PWMPWBFR_2A, // PWM_PWM2B 78 &PWMPWBFR_2C, // PWM_PWM2C 79 &PWMPWBFR_2C, // PWM_PWM2D 80 &PWMPWBFR_2E, // PWM_PWM2E 81 &PWMPWBFR_2E, // PWM_PWM2F 82 &PWMPWBFR_2G, // PWM_PWM2G 83 &PWMPWBFR_2G, // PWM_PWM2H 84 }; 85 86 static uint16_t init_period_ch1 = 0; 87 static uint16_t init_period_ch2 = 0; 88 static int32_t period_ch1 = 1; 89 static int32_t period_ch2 = 1; 90 #endif 91 92 #ifdef FUMC_MTU2_PWM 26 93 #define MTU2_PWM_SIGNAL 2 27 #define MTU2_PWM_OFFSET 0x20 28 29 // PORT ID, PWM ID, Pin function 30 static const PinMap PinMap_PWM[] = { 31 {P2_1 , MTU2_PWM0_PIN , 6}, 32 {P2_11 , MTU2_PWM1_PIN , 5}, 33 {P3_8 , MTU2_PWM2_PIN , 6}, 34 {P3_10 , MTU2_PWM3_PIN , 6}, 35 {P4_0 , MTU2_PWM4_PIN , 2}, 36 {P4_4 , MTU2_PWM5_PIN , 3}, 37 {P4_6 , MTU2_PWM6_PIN , 3}, 38 {P5_0 , MTU2_PWM7_PIN , 6}, 39 {P5_3 , MTU2_PWM8_PIN , 6}, 40 {P5_5 , MTU2_PWM9_PIN , 6}, 41 {P7_2 , MTU2_PWM10_PIN , 7}, 42 {P7_4 , MTU2_PWM11_PIN , 7}, 43 {P7_6 , MTU2_PWM12_PIN , 7}, 44 {P7_10 , MTU2_PWM13_PIN , 7}, 45 {P7_12 , MTU2_PWM14_PIN , 7}, 46 {P7_14 , MTU2_PWM15_PIN , 7}, 47 {P8_8 , MTU2_PWM16_PIN , 5}, 48 {P8_10 , MTU2_PWM17_PIN , 4}, 49 {P8_12 , MTU2_PWM18_PIN , 4}, 50 {P8_14 , MTU2_PWM19_PIN , 4}, 51 {P11_0 , MTU2_PWM20_PIN , 2}, 52 {P11_2 , MTU2_PWM21_PIN , 2}, 53 {P4_4 , PWM0_PIN , 4}, 54 {P3_2 , PWM1_PIN , 7}, 55 {P4_6 , PWM2_PIN , 4}, 56 {P4_7 , PWM3_PIN , 4}, 57 {P8_14 , PWM4_PIN , 6}, 58 {P8_15 , PWM5_PIN , 6}, 59 {P8_13 , PWM6_PIN , 6}, 60 {P8_11 , PWM7_PIN , 6}, 61 {P8_8 , PWM8_PIN , 6}, 62 {P10_0 , PWM9_PIN , 3}, 63 {P8_12 , PWM10_PIN , 6}, 64 {P8_9 , PWM11_PIN , 6}, 65 {P8_10 , PWM12_PIN , 6}, 66 {P4_5 , PWM13_PIN , 4}, 67 {NC , NC , 0} 68 }; 69 70 static const PWMType PORT[] = { 71 PWM2E, // PWM0_PIN 72 PWM2C, // PWM1_PIN 73 PWM2G, // PWM2_PIN 74 PWM2H, // PWM3_PIN 75 PWM1G, // PWM4_PIN 76 PWM1H, // PWM5_PIN 77 PWM1F, // PWM6_PIN 78 PWM1D, // PWM7_PIN 79 PWM1A, // PWM8_PIN 80 PWM2A, // PWM9_PIN 81 PWM1E, // PWM10_PIN 82 PWM1B, // PWM11_PIN 83 PWM1C, // PWM12_PIN 84 PWM2F, // PWM13_PIN 85 }; 94 95 typedef enum { 96 TIOC0A = 0, 97 TIOC0B, 98 TIOC0C, 99 TIOC0D, 100 TIOC1A = 0x10, 101 TIOC1B, 102 TIOC2A = 0x20, 103 TIOC2B, 104 TIOC3A = 0x30, 105 TIOC3B, 106 TIOC3C, 107 TIOC3D, 108 TIOC4A = 0x40, 109 TIOC4B, 110 TIOC4C, 111 TIOC4D, 112 } MTU2_PWMType; 86 113 87 114 static const MTU2_PWMType MTU2_PORT[] = { 88 TIOC2A, // MTU2_PWM0_PIN 89 TIOC1A, // MTU2_PWM1_PIN 90 TIOC4A, // MTU2_PWM2_PIN 91 TIOC4C, // MTU2_PWM3_PIN 92 TIOC0A, // MTU2_PWM4_PIN 93 TIOC4A, // MTU2_PWM5_PIN 94 TIOC4C, // MTU2_PWM6_PIN 95 TIOC0A, // MTU2_PWM7_PIN 96 TIOC3C, // MTU2_PWM8_PIN 97 TIOC0C, // MTU2_PWM9_PIN 98 TIOC0C, // MTU2_PWM10_PIN 99 TIOC1A, // MTU2_PWM11_PIN 100 TIOC2A, // MTU2_PWM12_PIN 101 TIOC3C, // MTU2_PWM13_PIN 102 TIOC4A, // MTU2_PWM14_PIN 103 TIOC4C, // MTU2_PWM15_PIN 104 TIOC1A, // MTU2_PWM16_PIN 105 TIOC3A, // MTU2_PWM17_PIN 106 TIOC3C, // MTU2_PWM18_PIN 107 TIOC2A, // MTU2_PWM19_PIN 108 TIOC4A, // MTU2_PWM20_PIN 109 TIOC4C, // MTU2_PWM21_PIN 110 }; 111 112 static __IO uint16_t *PWM_MATCH[] = { 113 &PWMPWBFR_2E, // PWM0_PIN 114 &PWMPWBFR_2C, // PWM1_PIN 115 &PWMPWBFR_2G, // PWM2_PIN 116 &PWMPWBFR_2G, // PWM3_PIN 117 &PWMPWBFR_1G, // PWM4_PIN 118 &PWMPWBFR_1G, // PWM5_PIN 119 &PWMPWBFR_1E, // PWM6_PIN 120 &PWMPWBFR_1C, // PWM7_PIN 121 &PWMPWBFR_1A, // PWM8_PIN 122 &PWMPWBFR_2A, // PWM9_PIN 123 &PWMPWBFR_1E, // PWM10_PIN 124 &PWMPWBFR_1A, // PWM11_PIN 125 &PWMPWBFR_1C, // PWM12_PIN 126 &PWMPWBFR_2E, // PWM13_PIN 127 }; 128 129 static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM][MTU2_PWM_SIGNAL] = { 130 { &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM0_PIN 131 { &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM1_PIN 132 { &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM2_PIN 133 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM3_PIN 134 { &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM4_PIN 135 { &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM5_PIN 136 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM6_PIN 137 { &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM7_PIN 138 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM8_PIN 139 { &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM9_PIN 140 { &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM10_PIN 141 { &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM11_PIN 142 { &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM12_PIN 143 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM13_PIN 144 { &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM14_PIN 145 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM15_PIN 146 { &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM16_PIN 147 { &MTU2TGRA_3, &MTU2TGRB_3 }, // MTU2_PWM17_PIN 148 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM18_PIN 149 { &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM19_PIN 150 { &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM20_PIN 151 { &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM21_PIN 115 TIOC0A, // PWM_TIOC0A 116 TIOC0C, // PWM_TIOC0C 117 TIOC1A, // PWM_TIOC1A 118 TIOC2A, // PWM_TIOC2A 119 TIOC3A, // PWM_TIOC3A 120 TIOC3C, // PWM_TIOC3C 121 TIOC4A, // PWM_TIOC4A 122 TIOC4C, // PWM_TIOC4C 123 }; 124 125 static __IO uint16_t *MTU2_PWM_MATCH[][MTU2_PWM_SIGNAL] = { 126 { &MTU2TGRA_0, &MTU2TGRB_0 }, // PWM_TIOC0A 127 { &MTU2TGRC_0, &MTU2TGRD_0 }, // PWM_TIOC0C 128 { &MTU2TGRA_1, &MTU2TGRB_1 }, // PWM_TIOC1A 129 { &MTU2TGRA_2, &MTU2TGRB_2 }, // PWM_TIOC2A 130 { &MTU2TGRA_3, &MTU2TGRB_3 }, // PWM_TIOC3A 131 { &MTU2TGRC_3, &MTU2TGRD_3 }, // PWM_TIOC3C 132 { &MTU2TGRA_4, &MTU2TGRB_4 }, // PWM_TIOC4A 133 { &MTU2TGRC_4, &MTU2TGRD_4 }, // PWM_TIOC4C 152 134 }; 153 135 … … 213 195 } MTU2Signal; 214 196 215 static uint16_t init_period_ch1 = 0;216 static uint16_t init_period_ch2 = 0;217 197 static uint16_t init_mtu2_period_ch[5] = {0}; 218 static int32_t period_ch1 = 1;219 static int32_t period_ch2 = 1;220 198 static int32_t mtu2_period_ch[5] = {1, 1, 1, 1, 1}; 199 #endif 221 200 222 201 void pwmout_init(pwmout_t* obj, PinName pin) { … … 226 205 227 206 if (pwm >= MTU2_PWM_OFFSET) { 207 #ifdef FUMC_MTU2_PWM 228 208 /* PWM by MTU2 */ 229 209 int tmp_pwm; 230 210 231 211 // power on 232 CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP33);212 mtu2_init(); 233 213 234 214 obj->pwm = pwm; … … 261 241 init_mtu2_period_ch[obj->ch] = 1; 262 242 } 243 #endif 263 244 } else { 245 #ifdef FUNC_MOTOR_CTL_PWM 264 246 /* PWM */ 265 247 // power on … … 269 251 if (((uint32_t)PORT[obj->pwm] & 0x00000010) == 0x00000010) { 270 252 obj->ch = 2; 271 PWMPWPR_2 _BYTE_L= 0x00;253 PWMPWPR_2 = 0x00; 272 254 } else { 273 255 obj->ch = 1; 274 PWMPWPR_1 _BYTE_L= 0x00;256 PWMPWPR_1 = 0x00; 275 257 } 276 258 … … 288 270 init_period_ch1 = 1; 289 271 } 272 #endif 290 273 } 291 274 } … … 293 276 void pwmout_free(pwmout_t* obj) { 294 277 pwmout_write(obj, 0); 278 mtu2_free(); 295 279 } 296 280 297 281 void pwmout_write(pwmout_t* obj, float value) { 298 282 uint32_t wk_cycle; 299 uint16_t v;300 283 301 284 if (obj->pwm >= MTU2_PWM_OFFSET) { 285 #ifdef FUMC_MTU2_PWM 302 286 /* PWM by MTU2 */ 303 287 int tmp_pwm; … … 313 297 wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff; 314 298 // set channel match to percentage 299 if (value == 1.0f) { 300 *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] = (uint16_t)(wk_cycle - 1); 301 } else { 315 302 *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] = (uint16_t)((float)wk_cycle * value); 303 } 304 #endif 316 305 } else { 306 #ifdef FUNC_MOTOR_CTL_PWM 307 uint16_t v; 308 317 309 /* PWM */ 318 310 if (value < 0.0f) { … … 333 325 v = (uint16_t)((float)wk_cycle * value); 334 326 *PWM_MATCH[obj->pwm] = (v | ((PORT[obj->pwm] & 1) << 12)); 327 #endif 335 328 } 336 329 } … … 341 334 342 335 if (obj->pwm >= MTU2_PWM_OFFSET) { 336 #ifdef FUMC_MTU2_PWM 343 337 /* PWM by MTU2 */ 344 338 uint32_t wk_pulse; … … 349 343 wk_pulse = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] & 0xffff; 350 344 value = ((float)wk_pulse / (float)wk_cycle); 345 #endif 351 346 } else { 347 #ifdef FUNC_MOTOR_CTL_PWM 352 348 /* PWM */ 353 349 if (obj->ch == 2) { … … 357 353 } 358 354 value = ((float)(*PWM_MATCH[obj->pwm] & 0x03ff) / (float)wk_cycle); 355 #endif 359 356 } 360 357 … … 370 367 } 371 368 369 #ifdef FUNC_MOTOR_CTL_PWM 372 370 static void set_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){ 373 371 uint16_t wk_pwmpbfr; … … 380 378 *p_pwmpbfr = (v | (wk_pwmpbfr & 0x1000)); 381 379 } 382 380 #endif 381 382 #ifdef FUMC_MTU2_PWM 383 383 static void set_mtu2_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){ 384 384 uint16_t wk_pwmpbfr; … … 389 389 *p_pwmpbfr = (uint16_t)((float)new_cycle * value); 390 390 } 391 #endif 391 392 392 393 // Set the PWM period, keeping the duty cycle the same. 393 394 void pwmout_period_us(pwmout_t* obj, int us) { 394 uint64_t wk_cycle_mtu2;395 395 uint32_t pclk_base; 396 396 uint32_t wk_cycle; 397 397 uint32_t wk_cks = 0; 398 398 uint16_t wk_last_cycle; 399 int max_us = 0;400 399 401 400 if (obj->pwm >= MTU2_PWM_OFFSET) { 401 #ifdef FUMC_MTU2_PWM 402 uint64_t wk_cycle_mtu2; 403 int max_us = 0; 404 402 405 /* PWM by MTU2 */ 403 406 int tmp_pwm; … … 469 472 // Save for future use 470 473 mtu2_period_ch[obj->ch] = us; 474 #endif 471 475 } else { 476 #ifdef FUNC_MOTOR_CTL_PWM 472 477 /* PWM */ 473 478 if (us > 491) { … … 494 499 if (obj->ch == 2) { 495 500 wk_last_cycle = PWMPWCYR_2 & 0x03ff; 496 PWMPWCR_2 _BYTE_L= 0xc0 | wk_cks;501 PWMPWCR_2 = 0xc0 | wk_cks; 497 502 PWMPWCYR_2 = (uint16_t)wk_cycle; 498 503 … … 504 509 505 510 // Counter Start 506 PWMPWCR_2 _BYTE_L|= 0x08;511 PWMPWCR_2 |= 0x08; 507 512 508 513 // Save for future use … … 510 515 } else { 511 516 wk_last_cycle = PWMPWCYR_1 & 0x03ff; 512 PWMPWCR_1 _BYTE_L= 0xc0 | wk_cks;517 PWMPWCR_1 = 0xc0 | wk_cks; 513 518 PWMPWCYR_1 = (uint16_t)wk_cycle; 514 519 … … 520 525 521 526 // Counter Start 522 PWMPWCR_1 _BYTE_L|= 0x08;527 PWMPWCR_1 |= 0x08; 523 528 524 529 // Save for future use 525 530 period_ch1 = us; 526 531 } 532 #endif 527 533 } 528 534 } … … 540 546 541 547 if (obj->pwm >= MTU2_PWM_OFFSET) { 548 #ifdef FUMC_MTU2_PWM 542 549 /* PWM by MTU2 */ 543 550 if (mtu2_period_ch[obj->ch] != 0) { 544 551 value = (float)us / (float)mtu2_period_ch[obj->ch]; 545 552 } 553 #endif 546 554 } else { 555 #ifdef FUNC_MOTOR_CTL_PWM 547 556 /* PWM */ 548 557 if (obj->ch == 2) { … … 555 564 } 556 565 } 566 #endif 557 567 } 558 568 pwmout_write(obj, value);
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