Ignore:
Timestamp:
Apr 5, 2019, 9:26:53 PM (5 years ago)
Author:
coas-nagasima
Message:

mbed関連を更新
シリアルドライバをmbedのHALを使うよう変更
ファイルディスクリプタの処理を更新

Location:
asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX
Files:
1 added
1 edited
1 moved

Legend:

Unmodified
Added
Removed

  • asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/l2c_iodefine.h

    r352 r374  
    1919* following link:
    2020* http://www.renesas.com/disclaimer*
    21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
     21* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved.
    2222*******************************************************************************/
    2323/*******************************************************************************
    … …  
    2525* $Rev: $
    2626* $Date::                           $
    27 * Description : Definition of I/O Register (V1.00a)
     27* Description : Definition of I/O Register for RZ/A1H,M (V2.00h)
    2828******************************************************************************/
    2929#ifndef L2C_IODEFINE_H
    3030#define L2C_IODEFINE_H
     31/* ->QAC 0639 : Over 127 members (C90) */
     32/* ->QAC 0857 : Over 1024 #define (C90) */
     33/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
    3134/* ->SEC M1.10.1 : Not magic number */
    3235
    33 struct st_l2c
    34 {                                                          /* L2C              */
     36#define L2C     (*(struct st_l2c     *)0x3FFFF000uL) /* L2C */
     37
     38
     39/* Start of channel array defines of L2C */
     40
     41/* Channel array defines of L2C_FROM_REG9_D_LOCKDOWN0_ARRAY */
     42/*(Sample) value = L2C_FROM_REG9_D_LOCKDOWN0_ARRAY[ channel ]->REG9_D_LOCKDOWN0; */
     43#define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_COUNT  (8)
     44#define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_ADDRESS_LIST \
     45{   /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
     46    &L2C_FROM_REG9_D_LOCKDOWN0, &L2C_FROM_REG9_D_LOCKDOWN1, &L2C_FROM_REG9_D_LOCKDOWN2, &L2C_FROM_REG9_D_LOCKDOWN3, &L2C_FROM_REG9_D_LOCKDOWN4, &L2C_FROM_REG9_D_LOCKDOWN5, &L2C_FROM_REG9_D_LOCKDOWN6, &L2C_FROM_REG9_D_LOCKDOWN7 \
     47}   /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
     48#define L2C_FROM_REG9_D_LOCKDOWN0 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN0) /* L2C_FROM_REG9_D_LOCKDOWN0 */
     49#define L2C_FROM_REG9_D_LOCKDOWN1 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN1) /* L2C_FROM_REG9_D_LOCKDOWN1 */
     50#define L2C_FROM_REG9_D_LOCKDOWN2 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN2) /* L2C_FROM_REG9_D_LOCKDOWN2 */
     51#define L2C_FROM_REG9_D_LOCKDOWN3 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN3) /* L2C_FROM_REG9_D_LOCKDOWN3 */
     52#define L2C_FROM_REG9_D_LOCKDOWN4 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN4) /* L2C_FROM_REG9_D_LOCKDOWN4 */
     53#define L2C_FROM_REG9_D_LOCKDOWN5 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN5) /* L2C_FROM_REG9_D_LOCKDOWN5 */
     54#define L2C_FROM_REG9_D_LOCKDOWN6 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN6) /* L2C_FROM_REG9_D_LOCKDOWN6 */
     55#define L2C_FROM_REG9_D_LOCKDOWN7 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN7) /* L2C_FROM_REG9_D_LOCKDOWN7 */
     56
     57/* End of channel array defines of L2C */
     58
     59
     60#define L2CREG0_CACHE_ID (L2C.REG0_CACHE_ID)
     61#define L2CREG0_CACHE_TYPE (L2C.REG0_CACHE_TYPE)
     62#define L2CREG1_CONTROL (L2C.REG1_CONTROL)
     63#define L2CREG1_AUX_CONTROL (L2C.REG1_AUX_CONTROL)
     64#define L2CREG1_TAG_RAM_CONTROL (L2C.REG1_TAG_RAM_CONTROL)
     65#define L2CREG1_DATA_RAM_CONTROL (L2C.REG1_DATA_RAM_CONTROL)
     66#define L2CREG2_EV_COUNTER_CTRL (L2C.REG2_EV_COUNTER_CTRL)
     67#define L2CREG2_EV_COUNTER1_CFG (L2C.REG2_EV_COUNTER1_CFG)
     68#define L2CREG2_EV_COUNTER0_CFG (L2C.REG2_EV_COUNTER0_CFG)
     69#define L2CREG2_EV_COUNTER1 (L2C.REG2_EV_COUNTER1)
     70#define L2CREG2_EV_COUNTER0 (L2C.REG2_EV_COUNTER0)
     71#define L2CREG2_INT_MASK (L2C.REG2_INT_MASK)
     72#define L2CREG2_INT_MASK_STATUS (L2C.REG2_INT_MASK_STATUS)
     73#define L2CREG2_INT_RAW_STATUS (L2C.REG2_INT_RAW_STATUS)
     74#define L2CREG2_INT_CLEAR (L2C.REG2_INT_CLEAR)
     75#define L2CREG7_CACHE_SYNC (L2C.REG7_CACHE_SYNC)
     76#define L2CREG7_INV_PA (L2C.REG7_INV_PA)
     77#define L2CREG7_INV_WAY (L2C.REG7_INV_WAY)
     78#define L2CREG7_CLEAN_PA (L2C.REG7_CLEAN_PA)
     79#define L2CREG7_CLEAN_INDEX (L2C.REG7_CLEAN_INDEX)
     80#define L2CREG7_CLEAN_WAY (L2C.REG7_CLEAN_WAY)
     81#define L2CREG7_CLEAN_INV_PA (L2C.REG7_CLEAN_INV_PA)
     82#define L2CREG7_CLEAN_INV_INDEX (L2C.REG7_CLEAN_INV_INDEX)
     83#define L2CREG7_CLEAN_INV_WAY (L2C.REG7_CLEAN_INV_WAY)
     84#define L2CREG9_D_LOCKDOWN0 (L2C.REG9_D_LOCKDOWN0)
     85#define L2CREG9_I_LOCKDOWN0 (L2C.REG9_I_LOCKDOWN0)
     86#define L2CREG9_D_LOCKDOWN1 (L2C.REG9_D_LOCKDOWN1)
     87#define L2CREG9_I_LOCKDOWN1 (L2C.REG9_I_LOCKDOWN1)
     88#define L2CREG9_D_LOCKDOWN2 (L2C.REG9_D_LOCKDOWN2)
     89#define L2CREG9_I_LOCKDOWN2 (L2C.REG9_I_LOCKDOWN2)
     90#define L2CREG9_D_LOCKDOWN3 (L2C.REG9_D_LOCKDOWN3)
     91#define L2CREG9_I_LOCKDOWN3 (L2C.REG9_I_LOCKDOWN3)
     92#define L2CREG9_D_LOCKDOWN4 (L2C.REG9_D_LOCKDOWN4)
     93#define L2CREG9_I_LOCKDOWN4 (L2C.REG9_I_LOCKDOWN4)
     94#define L2CREG9_D_LOCKDOWN5 (L2C.REG9_D_LOCKDOWN5)
     95#define L2CREG9_I_LOCKDOWN5 (L2C.REG9_I_LOCKDOWN5)
     96#define L2CREG9_D_LOCKDOWN6 (L2C.REG9_D_LOCKDOWN6)
     97#define L2CREG9_I_LOCKDOWN6 (L2C.REG9_I_LOCKDOWN6)
     98#define L2CREG9_D_LOCKDOWN7 (L2C.REG9_D_LOCKDOWN7)
     99#define L2CREG9_I_LOCKDOWN7 (L2C.REG9_I_LOCKDOWN7)
     100#define L2CREG9_LOCK_LINE_EN (L2C.REG9_LOCK_LINE_EN)
     101#define L2CREG9_UNLOCK_WAY (L2C.REG9_UNLOCK_WAY)
     102#define L2CREG12_ADDR_FILTERING_START (L2C.REG12_ADDR_FILTERING_START)
     103#define L2CREG12_ADDR_FILTERING_END (L2C.REG12_ADDR_FILTERING_END)
     104#define L2CREG15_DEBUG_CTRL (L2C.REG15_DEBUG_CTRL)
     105#define L2CREG15_PREFETCH_CTRL (L2C.REG15_PREFETCH_CTRL)
     106#define L2CREG15_POWER_CTRL (L2C.REG15_POWER_CTRL)
     107
     108
     109typedef struct st_l2c
     110{
     111                                                           /* L2C              */
    35112    volatile uint32_t  REG0_CACHE_ID;                          /*  REG0_CACHE_ID   */
    36113    volatile uint32_t  REG0_CACHE_TYPE;                        /*  REG0_CACHE_TYPE */
    … …  
    67144    volatile uint32_t  REG7_CLEAN_INV_WAY;                     /*  REG7_CLEAN_INV_WAY */
    68145    volatile uint8_t   dummy17[256];                           /*                  */
     146
    69147/* start of struct st_l2c_from_reg9_d_lockdown0 */
    70148    volatile uint32_t  REG9_D_LOCKDOWN0;                       /*  REG9_D_LOCKDOWN0 */
    71149    volatile uint32_t  REG9_I_LOCKDOWN0;                       /*  REG9_I_LOCKDOWN0 */
    72 /* end of struct st_l2c_from_reg9_d_lockdown0 */
     150
     151/* end of struct st_l2c_from_reg9_d_lockdown0 */
     152
    73153/* start of struct st_l2c_from_reg9_d_lockdown0 */
    74154    volatile uint32_t  REG9_D_LOCKDOWN1;                       /*  REG9_D_LOCKDOWN1 */
    75155    volatile uint32_t  REG9_I_LOCKDOWN1;                       /*  REG9_I_LOCKDOWN1 */
    76 /* end of struct st_l2c_from_reg9_d_lockdown0 */
     156
     157/* end of struct st_l2c_from_reg9_d_lockdown0 */
     158
    77159/* start of struct st_l2c_from_reg9_d_lockdown0 */
    78160    volatile uint32_t  REG9_D_LOCKDOWN2;                       /*  REG9_D_LOCKDOWN2 */
    79161    volatile uint32_t  REG9_I_LOCKDOWN2;                       /*  REG9_I_LOCKDOWN2 */
    80 /* end of struct st_l2c_from_reg9_d_lockdown0 */
     162
     163/* end of struct st_l2c_from_reg9_d_lockdown0 */
     164
    81165/* start of struct st_l2c_from_reg9_d_lockdown0 */
    82166    volatile uint32_t  REG9_D_LOCKDOWN3;                       /*  REG9_D_LOCKDOWN3 */
    83167    volatile uint32_t  REG9_I_LOCKDOWN3;                       /*  REG9_I_LOCKDOWN3 */
    84 /* end of struct st_l2c_from_reg9_d_lockdown0 */
     168
     169/* end of struct st_l2c_from_reg9_d_lockdown0 */
     170
    85171/* start of struct st_l2c_from_reg9_d_lockdown0 */
    86172    volatile uint32_t  REG9_D_LOCKDOWN4;                       /*  REG9_D_LOCKDOWN4 */
    87173    volatile uint32_t  REG9_I_LOCKDOWN4;                       /*  REG9_I_LOCKDOWN4 */
    88 /* end of struct st_l2c_from_reg9_d_lockdown0 */
     174
     175/* end of struct st_l2c_from_reg9_d_lockdown0 */
     176
    89177/* start of struct st_l2c_from_reg9_d_lockdown0 */
    90178    volatile uint32_t  REG9_D_LOCKDOWN5;                       /*  REG9_D_LOCKDOWN5 */
    91179    volatile uint32_t  REG9_I_LOCKDOWN5;                       /*  REG9_I_LOCKDOWN5 */
    92 /* end of struct st_l2c_from_reg9_d_lockdown0 */
     180
     181/* end of struct st_l2c_from_reg9_d_lockdown0 */
     182
    93183/* start of struct st_l2c_from_reg9_d_lockdown0 */
    94184    volatile uint32_t  REG9_D_LOCKDOWN6;                       /*  REG9_D_LOCKDOWN6 */
    95185    volatile uint32_t  REG9_I_LOCKDOWN6;                       /*  REG9_I_LOCKDOWN6 */
    96 /* end of struct st_l2c_from_reg9_d_lockdown0 */
     186
     187/* end of struct st_l2c_from_reg9_d_lockdown0 */
     188
    97189/* start of struct st_l2c_from_reg9_d_lockdown0 */
    98190    volatile uint32_t  REG9_D_LOCKDOWN7;                       /*  REG9_D_LOCKDOWN7 */
    99191    volatile uint32_t  REG9_I_LOCKDOWN7;                       /*  REG9_I_LOCKDOWN7 */
     192
    100193/* end of struct st_l2c_from_reg9_d_lockdown0 */
    101194    volatile uint8_t   dummy18[16];                            /*                  */
    … …  
    111204    volatile uint8_t   dummy22[28];                            /*                  */
    112205    volatile uint32_t  REG15_POWER_CTRL;                       /*  REG15_POWER_CTRL */
    113 };
    114 
    115 
    116 struct st_l2c_from_reg9_d_lockdown0
     206} r_io_l2c_t;
     207
     208
     209typedef struct st_l2c_from_reg9_d_lockdown0
    117210{
     211 
    118212    volatile uint32_t  REG9_D_LOCKDOWN0;                       /*  REG9_D_LOCKDOWN0 */
    119213    volatile uint32_t  REG9_I_LOCKDOWN0;                       /*  REG9_I_LOCKDOWN0 */
    120 };
    121 
    122 
    123 #define L2C     (*(struct st_l2c     *)0x3FFFF000uL) /* L2C */
    124 
    125 
    126 /* Start of channnel array defines of L2C */
    127 
    128 /* Channnel array defines of L2C_FROM_REG9_D_LOCKDOWN0_ARRAY */
    129 /*(Sample) value = L2C_FROM_REG9_D_LOCKDOWN0_ARRAY[ channel ]->REG9_D_LOCKDOWN0; */
    130 #define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_COUNT  8
    131 #define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_ADDRESS_LIST \
    132 {   /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
    133     &L2C_FROM_REG9_D_LOCKDOWN0, &L2C_FROM_REG9_D_LOCKDOWN1, &L2C_FROM_REG9_D_LOCKDOWN2, &L2C_FROM_REG9_D_LOCKDOWN3, &L2C_FROM_REG9_D_LOCKDOWN4, &L2C_FROM_REG9_D_LOCKDOWN5, &L2C_FROM_REG9_D_LOCKDOWN6, &L2C_FROM_REG9_D_LOCKDOWN7 \
    134 }   /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
    135 #define L2C_FROM_REG9_D_LOCKDOWN0 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN0) /* L2C_FROM_REG9_D_LOCKDOWN0 */
    136 #define L2C_FROM_REG9_D_LOCKDOWN1 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN1) /* L2C_FROM_REG9_D_LOCKDOWN1 */
    137 #define L2C_FROM_REG9_D_LOCKDOWN2 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN2) /* L2C_FROM_REG9_D_LOCKDOWN2 */
    138 #define L2C_FROM_REG9_D_LOCKDOWN3 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN3) /* L2C_FROM_REG9_D_LOCKDOWN3 */
    139 #define L2C_FROM_REG9_D_LOCKDOWN4 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN4) /* L2C_FROM_REG9_D_LOCKDOWN4 */
    140 #define L2C_FROM_REG9_D_LOCKDOWN5 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN5) /* L2C_FROM_REG9_D_LOCKDOWN5 */
    141 #define L2C_FROM_REG9_D_LOCKDOWN6 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN6) /* L2C_FROM_REG9_D_LOCKDOWN6 */
    142 #define L2C_FROM_REG9_D_LOCKDOWN7 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN7) /* L2C_FROM_REG9_D_LOCKDOWN7 */
    143 
    144 /* End of channnel array defines of L2C */
    145 
    146 
    147 #define L2CREG0_CACHE_ID L2C.REG0_CACHE_ID
    148 #define L2CREG0_CACHE_TYPE L2C.REG0_CACHE_TYPE
    149 #define L2CREG1_CONTROL L2C.REG1_CONTROL
    150 #define L2CREG1_AUX_CONTROL L2C.REG1_AUX_CONTROL
    151 #define L2CREG1_TAG_RAM_CONTROL L2C.REG1_TAG_RAM_CONTROL
    152 #define L2CREG1_DATA_RAM_CONTROL L2C.REG1_DATA_RAM_CONTROL
    153 #define L2CREG2_EV_COUNTER_CTRL L2C.REG2_EV_COUNTER_CTRL
    154 #define L2CREG2_EV_COUNTER1_CFG L2C.REG2_EV_COUNTER1_CFG
    155 #define L2CREG2_EV_COUNTER0_CFG L2C.REG2_EV_COUNTER0_CFG
    156 #define L2CREG2_EV_COUNTER1 L2C.REG2_EV_COUNTER1
    157 #define L2CREG2_EV_COUNTER0 L2C.REG2_EV_COUNTER0
    158 #define L2CREG2_INT_MASK L2C.REG2_INT_MASK
    159 #define L2CREG2_INT_MASK_STATUS L2C.REG2_INT_MASK_STATUS
    160 #define L2CREG2_INT_RAW_STATUS L2C.REG2_INT_RAW_STATUS
    161 #define L2CREG2_INT_CLEAR L2C.REG2_INT_CLEAR
    162 #define L2CREG7_CACHE_SYNC L2C.REG7_CACHE_SYNC
    163 #define L2CREG7_INV_PA L2C.REG7_INV_PA
    164 #define L2CREG7_INV_WAY L2C.REG7_INV_WAY
    165 #define L2CREG7_CLEAN_PA L2C.REG7_CLEAN_PA
    166 #define L2CREG7_CLEAN_INDEX L2C.REG7_CLEAN_INDEX
    167 #define L2CREG7_CLEAN_WAY L2C.REG7_CLEAN_WAY
    168 #define L2CREG7_CLEAN_INV_PA L2C.REG7_CLEAN_INV_PA
    169 #define L2CREG7_CLEAN_INV_INDEX L2C.REG7_CLEAN_INV_INDEX
    170 #define L2CREG7_CLEAN_INV_WAY L2C.REG7_CLEAN_INV_WAY
    171 #define L2CREG9_D_LOCKDOWN0 L2C.REG9_D_LOCKDOWN0
    172 #define L2CREG9_I_LOCKDOWN0 L2C.REG9_I_LOCKDOWN0
    173 #define L2CREG9_D_LOCKDOWN1 L2C.REG9_D_LOCKDOWN1
    174 #define L2CREG9_I_LOCKDOWN1 L2C.REG9_I_LOCKDOWN1
    175 #define L2CREG9_D_LOCKDOWN2 L2C.REG9_D_LOCKDOWN2
    176 #define L2CREG9_I_LOCKDOWN2 L2C.REG9_I_LOCKDOWN2
    177 #define L2CREG9_D_LOCKDOWN3 L2C.REG9_D_LOCKDOWN3
    178 #define L2CREG9_I_LOCKDOWN3 L2C.REG9_I_LOCKDOWN3
    179 #define L2CREG9_D_LOCKDOWN4 L2C.REG9_D_LOCKDOWN4
    180 #define L2CREG9_I_LOCKDOWN4 L2C.REG9_I_LOCKDOWN4
    181 #define L2CREG9_D_LOCKDOWN5 L2C.REG9_D_LOCKDOWN5
    182 #define L2CREG9_I_LOCKDOWN5 L2C.REG9_I_LOCKDOWN5
    183 #define L2CREG9_D_LOCKDOWN6 L2C.REG9_D_LOCKDOWN6
    184 #define L2CREG9_I_LOCKDOWN6 L2C.REG9_I_LOCKDOWN6
    185 #define L2CREG9_D_LOCKDOWN7 L2C.REG9_D_LOCKDOWN7
    186 #define L2CREG9_I_LOCKDOWN7 L2C.REG9_I_LOCKDOWN7
    187 #define L2CREG9_LOCK_LINE_EN L2C.REG9_LOCK_LINE_EN
    188 #define L2CREG9_UNLOCK_WAY L2C.REG9_UNLOCK_WAY
    189 #define L2CREG12_ADDR_FILTERING_START L2C.REG12_ADDR_FILTERING_START
    190 #define L2CREG12_ADDR_FILTERING_END L2C.REG12_ADDR_FILTERING_END
    191 #define L2CREG15_DEBUG_CTRL L2C.REG15_DEBUG_CTRL
    192 #define L2CREG15_PREFETCH_CTRL L2C.REG15_PREFETCH_CTRL
    193 #define L2CREG15_POWER_CTRL L2C.REG15_POWER_CTRL
     214} r_io_l2c_from_reg9_d_lockdown_t /* Short of r_io_l2c_from_reg9_d_lockdown0_t */;
     215
     216
     217/* Channel array defines of L2C (2)*/
     218#ifdef  DECLARE_L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_CHANNELS
     219volatile struct st_l2c_from_reg9_d_lockdown0*  L2C_FROM_REG9_D_LOCKDOWN0_ARRAY[ L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_COUNT ] =
     220    /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */
     221    L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_ADDRESS_LIST;
     222    /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */
     223#endif  /* DECLARE_L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_CHANNELS */
     224/* End of channel array defines of L2C (2)*/
     225
     226
    194227/* <-SEC M1.10.1 */
     228/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
     229/* <-QAC 0857 */
     230/* <-QAC 0639 */
    195231#endif
Note: See TracChangeset for help on using the changeset viewer.