Changeset 458 for azure_iot_hub_riscv/trunk/asp_baseplatform/pdic/k210/dvp.c

Timestamp:

Sep 14, 2020, 6:36:03 PM (4 years ago)

Author:

coas-nagasima

Message:

SPIとSerial、KPUの動作を改善

File:

• azure_iot_hub_riscv/trunk/asp_baseplatform/pdic/k210/dvp.c (modified) (13 diffs)

azure_iot_hub_riscv/trunk/asp_baseplatform/pdic/k210/dvp.c

@@ -66 +66 @@
 
 #define DEAFULT_CLEAR_INT       (DVP_STS_FRAME_START  | DVP_STS_FRAME_START_WE | \
-                                 DVP_STS_FRAME_FINISH | DVP_STS_FRAME_FINISH_WE)
+                                                                 DVP_STS_FRAME_FINISH | DVP_STS_FRAME_FINISH_WE)
 
 
@@ -75 +75 @@
 {
         uint32_t clk_sel0 = sil_rew_mem((uint32_t *)(TADR_SYSCTL_BASE+TOFF_CLK_SEL0));
-    uint32_t source = 0;
-    uint32_t result = 0;
+        uint32_t source = 0;
+        uint32_t result = 0;
         uint32_t threshold = 0;
 
@@ -97 +97 @@
         result = source / (threshold + 1);
         syslog_2(LOG_NOTICE, "## dvp_clock_get_freq req(%d) result(%d) ##", clock, result);
-    return result;
+        return result;
 }
 
@@ -104 +104 @@
 {
         while(sil_rew_mem((uint32_t *)(hdvp->base+TOFF_DVP_STS)) & DVP_STS_SCCB_EN)
-        ;
+                ;
         sil_wrw_mem((uint32_t *)(hdvp->base+TOFF_DVP_STS), (DVP_STS_SCCB_EN | DVP_STS_SCCB_EN_WE));
-    while (sil_rew_mem((uint32_t *)(hdvp->base+TOFF_DVP_STS)) & DVP_STS_SCCB_EN)
-        ;
+        while (sil_rew_mem((uint32_t *)(hdvp->base+TOFF_DVP_STS)) & DVP_STS_SCCB_EN)
+                ;
 }
 
@@ -150 +150 @@
         tmp = sil_rew_mem((uint32_t *)(hdvp->base+TOFF_DVP_SCCB_CFG)) & (~DVP_SCCB_BYTE_NUM_MASK);
 
-    if (hdvp->Init.num_sccb_reg == 8)
+        if (hdvp->Init.num_sccb_reg == 8)
                 tmp |= DVP_SCCB_BYTE_NUM_2;
         else
@@ -164 +164 @@
         sil_wrw_mem((uint32_t *)(hdvp->base+TOFF_DVP_SCCB_CTL), tmp);
 
-    dvp_sccb_start_transfer(hdvp);
+        dvp_sccb_start_transfer(hdvp);
 
         sil_wrw_mem((uint32_t *)(hdvp->base+TOFF_DVP_SCCB_CTL), addr);
 
-    dvp_sccb_start_transfer(hdvp);
+        dvp_sccb_start_transfer(hdvp);
 
         tmp = sil_rew_mem((uint32_t *)(hdvp->base+TOFF_DVP_SCCB_CFG));
@@ -182 +182 @@
 dvp_init(DVP_Handle_t *hdvp)
 {
-    uint32_t v_apb1_clk, v_period;
+        uint32_t v_apb1_clk, v_period;
 
         if(hdvp == NULL)
@@ -201 +201 @@
         fpioa_set_function(hdvp->Init.SccbSdaPin, FUNC_SCCB_SDA);
 
-    /* Do a power cycle */
-    dvp_dcmi_powerdown(hdvp, false);
-    dly_tsk(10);
-
-    dvp_dcmi_powerdown(hdvp, true);
-    dly_tsk(100);
+        /* Do a power cycle */
+        dvp_dcmi_powerdown(hdvp, false);
+        dly_tsk(10);
+
+        dvp_dcmi_powerdown(hdvp, true);
+        dly_tsk(100);
 
         /*
@@ -372 +372 @@
         cfg  = sil_rew_mem((uint32_t *)(hdvp->base+TOFF_DVP_CFG));
         cfg &= ~(DVP_CFG_HREF_BURST_NUM_MASK | DVP_CFG_LINE_NUM_MASK);
-    cfg |= hdvp->Init.Height << 20;
-
-    if((cfg & DVP_CFG_BURST_SIZE_4BEATS) != 0)
+        cfg |= hdvp->Init.Height << 20;
+
+        if((cfg & DVP_CFG_BURST_SIZE_4BEATS) != 0)
                 divw = 4;
         else
                 divw = 1;
         cfg |= (hdvp->Init.Width / 8 / divw) << 12;
-    sil_wrw_mem((uint32_t *)(hdvp->base+TOFF_DVP_CFG), cfg);
+        sil_wrw_mem((uint32_t *)(hdvp->base+TOFF_DVP_CFG), cfg);
         return E_OK;
 }
@@ -403 +403 @@
 
         sccb_cfg  = sil_rew_mem((uint32_t *)(hdvp->base+TOFF_DVP_SCCB_CFG));
-    sccb_cfg &= ~(DVP_SCCB_SCL_LCNT_MASK | DVP_SCCB_SCL_HCNT_MASK);
-    sccb_cfg |= (v_period_clk_cnt << 8) | (v_period_clk_cnt << 16);
+        sccb_cfg &= ~(DVP_SCCB_SCL_LCNT_MASK | DVP_SCCB_SCL_HCNT_MASK);
+        sccb_cfg |= (v_period_clk_cnt << 8) | (v_period_clk_cnt << 16);
         sil_wrw_mem((uint32_t *)(hdvp->base+TOFF_DVP_SCCB_CFG), sccb_cfg);
         return dvp_clock_get_freq(DVP_CLOCK_REQ) / (v_period_clk_cnt * 2);
@@ -454 +454 @@
         uint32_t istatus, estatus;
 
-        if(hdvp == NULL)
+        if (hdvp == NULL) {
+                syslog_0(LOG_NOTICE, "dvp_handler hdvp == NULL");
                 return;
+        }
         istatus = sil_rew_mem((uint32_t *)(hdvp->base+TOFF_DVP_STS));
-        if(istatus == 0)
+        if (istatus == 0) {
+                syslog_0(LOG_DEBUG, "dvp_handler istatus == 0");
                 return;
+        }
         estatus = istatus;
-        syslog_2(LOG_DEBUG, "sensor_irq istatus[%08x] hdvp->state(%d)", istatus, hdvp->state);
+        syslog_2(LOG_DEBUG, "dvp_handler istatus[%08x] hdvp->state(%d)", istatus, hdvp->state);
         if((istatus & DVP_STS_FRAME_FINISH) != 0){      //frame end
                 estatus |= DVP_STS_FRAME_FINISH_WE;
@@ -469 +473 @@
         if((istatus & DVP_STS_FRAME_START) != 0){       //frame start
                 estatus |= DVP_STS_FRAME_START_WE;
-        if(hdvp->state == DVP_STATE_ACTIVATE){  //only we finish the convert, do transmit again
+                if(hdvp->state == DVP_STATE_ACTIVATE){  //only we finish the convert, do transmit again
                         /*
                          *  コンバートスタート
@@ -479 +483 @@
         sil_orw_mem((uint32_t *)(hdvp->base+TOFF_DVP_STS), estatus);
 }
-
-