Changeset 305 for asp3_wo_tecs/trunk/arch
- Timestamp:
- Jun 26, 2017, 6:45:41 PM (7 years ago)
- Location:
- asp3_wo_tecs/trunk/arch/arm_gcc
- Files:
-
- 1 added
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
asp3_wo_tecs/trunk/arch/arm_gcc/common/arm.h
r302 r305 5 5 * Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory 6 6 * Toyohashi Univ. of Technology, JAPAN 7 * Copyright (C) 2006-201 5by Embedded and Real-Time Systems Laboratory7 * Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory 8 8 * Graduate School of Information Science, Nagoya Univ., JAPAN 9 9 * … … 52 52 * ã®è²¬ä»»ãè² ããªãï¼ 53 53 * 54 * $Id: arm.h 430 2015-08-08 11:38:46Z ertl-hiro $54 * $Id: arm.h 523 2016-01-14 11:01:04Z ertl-hiro $ 55 55 */ 56 56 … … 282 282 283 283 /* 284 * High exception vector ã使ããã®è¨å®285 */ 286 Inline void 287 arm_set_high_vector (bool_t enable)284 * High exception vectorsã使ãããã«è¨å® 285 */ 286 Inline void 287 arm_set_high_vectors(void) 288 288 { 289 289 uint32_t reg; 290 290 291 291 CP15_READ_SCTLR(reg); 292 if (enable) { 293 reg |= CP15_SCTLR_VECTOR; 294 } 295 else { 296 reg &= ~CP15_SCTLR_VECTOR; 297 } 292 reg |= CP15_SCTLR_VECTOR; 293 CP15_WRITE_SCTLR(reg); 294 } 295 296 /* 297 * Low exception vectorsã使ãããã«è¨å® 298 */ 299 Inline void 300 arm_set_low_vectors(void) 301 { 302 uint32_t reg; 303 304 CP15_READ_SCTLR(reg); 305 reg &= ~CP15_SCTLR_VECTOR; 298 306 CP15_WRITE_SCTLR(reg); 299 307 } -
asp3_wo_tecs/trunk/arch/arm_gcc/common/core_check.trb
r304 r305 3 3 # ãã¹3ã®çæã¹ã¯ãªããã®ã³ã¢ä¾åé¨ï¼ARMç¨ï¼ 4 4 # 5 # $Id: core_check.trb 5 72 2016-02-01 14:40:09Z ertl-hiro $5 # $Id: core_check.trb 588 2016-02-05 12:54:58Z ertl-hiro $ 6 6 # 7 7 … … 19 19 # 20 20 inhTable = SYMBOL("_kernel_inh_table") 21 $cfgData[:DEF_INH].each do | id, params|21 $cfgData[:DEF_INH].each do |key, params| 22 22 inthdr = PEEK(inhTable + params[:inhno] * $sizeof_FP, $sizeof_FP) 23 23 … … 39 39 # 40 40 excTable = SYMBOL("_kernel_exc_table") 41 $cfgData[:DEF_EXC].each do | id, params|41 $cfgData[:DEF_EXC].each do |key, params| 42 42 exchdr = PEEK(excTable + params[:excno] * $sizeof_FP, $sizeof_FP) 43 43 -
asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel_impl.c
r302 r305 6 6 * Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory 7 7 * Toyohashi Univ. of Technology, JAPAN 8 * Copyright (C) 2006-201 5by Embedded and Real-Time Systems Laboratory8 * Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory 9 9 * Graduate School of Information Science, Nagoya Univ., JAPAN 10 10 * … … 53 53 * ã®è²¬ä»»ãè² ããªãï¼ 54 54 * 55 * $Id: core_kernel_impl.c 430 2015-08-08 11:38:46Z ertl-hiro $55 * $Id: core_kernel_impl.c 541 2016-01-16 03:09:21Z ertl-hiro $ 56 56 */ 57 57 … … 76 76 #ifdef USE_ARM_MMU 77 77 78 #define D0_CLIENT 0x01U /* å¤æãã¼ãã«ã«å¾ã£ã¦ãã¡ã¤ã³0ã«ã¢ã¯ã»ã¹ */79 #define USE_ASID 1/* 使ç¨ããASID */78 #define CP15_DACR_D0_CLIENT 0x01U /* å¤æãã¼ãã«ã«å¾ããã¡ã¤ã³0ã«ã¢ã¯ã»ã¹ */ 79 #define DEFAULT_ASID 1 /* 使ç¨ããASID */ 80 80 81 81 /* … … 155 155 * ãã¡ã¤ã³ã¢ã¯ã»ã¹å¶å¾¡ã®è¨å® 156 156 */ 157 CP15_WRITE_DACR( D0_CLIENT);157 CP15_WRITE_DACR(CP15_DACR_D0_CLIENT); 158 158 159 159 /* … … 161 161 */ 162 162 #if __TARGET_ARCH_ARM >= 6 163 CP15_WRITE_CONTEXTIDR( USE_ASID);163 CP15_WRITE_CONTEXTIDR(DEFAULT_ASID); 164 164 #endif /* __TARGET_ARCH_ARM >= 6 */ 165 165 … … 197 197 */ 198 198 excpt_nest_count = 1U; 199 200 /* 201 * MMUãæå¹ã« 202 */ 203 #ifdef USE_ARM_MMU 204 arm_mmu_initialize(); 205 #endif /* USE_ARM_MMU */ 199 206 200 207 /* -
asp3_wo_tecs/trunk/arch/arm_gcc/common/core_test.h
r302 r305 4 4 * Advanced Standard Profile Kernel 5 5 * 6 * Copyright (C) 2006-201 5by Embedded and Real-Time Systems Laboratory6 * Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory 7 7 * Graduate School of Information Science, Nagoya Univ., JAPAN 8 8 * … … 51 51 * ã®è²¬ä»»ãè² ããªãï¼ 52 52 * 53 * $Id: core_test.h 460 2015-08-29 13:04:06Z ertl-hiro $53 * $Id: core_test.h 524 2016-01-14 11:01:56Z ertl-hiro $ 54 54 */ 55 55 … … 146 146 147 147 #endif 148 149 /*150 * ããã©ã¼ãã³ã¹ã¢ãã¿ã«ããæ§è½è©ä¾¡151 */152 #if defined(USE_ARM_PM_HIST) && __TARGET_ARCH_ARM == 7153 154 /*155 * ããã©ã¼ãã³ã¹ã¢ãã¿ã®ã«ã¦ã³ã¿ã®ãã¼ã¿å156 */157 typedef uint32_t PMCNT;158 159 /*160 * ããã©ã¼ãã³ã¹ã¢ãã¿ã®åæå161 */162 Inline void163 arm_init_pmcnt(void)164 {165 uint32_t reg;166 167 /*168 * ããã©ã¼ãã³ã¹ã¢ãã¿ã®æå¹å169 *170 * TOPPERS_ARM_PMCNT_DIV64ãå®ç¾©ããã¦ããå ´åã¯ï¼64ã¯ããã¯æ¯ã«ã«171 * ã¦ã³ãã¢ããããï¼172 */173 CP15_READ_PMCR(reg);174 reg |= CP15_PMCR_ALLCNTR_ENABLE;175 176 #ifdef TOPPERS_ARM_PMCNT_DIV64177 reg |= CP15_PMCR_PMCCNTR_DIVIDER;178 #else /* !TOPPERS_ARM_PMCNT_DIV64 */179 reg &= ~CP15_PMCR_PMCCNTR_DIVIDER;180 #endif /* TOPPERS_ARM_PMCNT_DIV64 */181 182 CP15_WRITE_PMCR(reg);183 184 /*185 * ããã©ã¼ãã³ã¹ã¢ãã¿ã®ã«ã¦ã³ã¿ã®æå¹å186 */187 CP15_READ_PMCNTENSET(reg);188 reg |= CP15_PMCNTENSET_CCNTR_ENABLE;189 CP15_WRITE_PMCNTENSET(reg);190 }191 192 /*193 * ããã©ã¼ãã³ã¹ã¢ãã¿ã®ã«ã¦ã³ã¿ã®èªã¿è¾¼ã¿194 */195 Inline void196 arm_get_pmcnt(PMCNT *p_count)197 {198 CP15_READ_PMCCNTR(*p_count);199 }200 201 /*202 * ã«ã¦ã³ã¿å¤ã®æéè¨æ¸¬åä½ã¸ã®å¤æ203 *204 * æéè¨æ¸¬ã®åä½ã¯ï¼ç¾ç¶ã¯ããç§ã«ãªã£ã¦ããï¼ãã¤ã¯ãç§åä½ã«ããè¨205 * å®ã欲ããã¨æãããï¼ï¼206 */207 Inline uint_t208 arm_conv_time(PMCNT count) {209 #ifdef TOPPERS_ARM_PMCNT_DIV64210 return(((uint_t) count) * (1000 * 64) / CORE_CLK_MHZ);211 #else /* !TOPPERS_ARM_PMCNT_DIV64 */212 return(((uint_t) count) * 1000 / CORE_CLK_MHZ);213 #endif /* TOPPERS_ARM_PMCNT_DIV64 */214 }215 216 #define HISTTIM PMCNT217 #define HIST_GET_TIM(p_time) (arm_get_pmcnt(p_time))218 #define HIST_CONV_TIM(time) (arm_conv_tim(time))219 #define HIST_BM_HOOK() ((void) 0)220 221 #endif /* defined(USE_ARM_PM_HIST) && __TARGET_ARCH_ARM == 7 */222 148 #endif /* TOPPERS_CORE_TEST_H */ -
asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_kernel_impl.c
r302 r305 4 4 * Advanced Standard Profile Kernel 5 5 * 6 * Copyright (C) 2006-201 5by Embedded and Real-Time Systems Laboratory6 * Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory 7 7 * Graduate School of Information Science, Nagoya Univ., JAPAN 8 8 * … … 51 51 * ã®è²¬ä»»ãè² ããªãï¼ 52 52 * 53 * $Id: gic_kernel_impl.c 355 2015-07-25 10:26:02Z ertl-hiro $53 * $Id: gic_kernel_impl.c 522 2016-01-14 06:56:53Z ertl-hiro $ 54 54 */ 55 55 … … 177 177 */ 178 178 for (i = GIC_INTNO_PPI0 / 16; i < GIC_TNUM_INTNO / 16; i++) { 179 #ifdef GIC_ARM11M OCORE179 #ifdef GIC_ARM11MPCORE 180 180 sil_wrw_mem(GICD_ICFGR(i), 0x55555555U); 181 #else /* GIC_ARM11M OCORE */181 #else /* GIC_ARM11MPCORE */ 182 182 sil_wrw_mem(GICD_ICFGR(i), 0x00000000U); 183 #endif /* GIC_ARM11M OCORE */183 #endif /* GIC_ARM11MPCORE */ 184 184 } 185 185 … … 229 229 230 230 if ((intatr & TA_EDGE) != 0U) { 231 #ifdef GIC_ARM11M OCORE231 #ifdef GIC_ARM11MPCORE 232 232 gicd_config(intno, GICD_ICFGRn_EDGE|GICD_ICFGRn_1_N); 233 #else /* GIC_ARM11M OCORE */233 #else /* GIC_ARM11MPCORE */ 234 234 gicd_config(intno, GICD_ICFGRn_EDGE); 235 #endif /* GIC_ARM11M OCORE */235 #endif /* GIC_ARM11MPCORE */ 236 236 clear_int(intno); 237 237 } 238 238 else { 239 #ifdef GIC_ARM11M OCORE239 #ifdef GIC_ARM11MPCORE 240 240 gicd_config(intno, GICD_ICFGRn_LEVEL|GICD_ICFGRn_1_N); 241 #else /* GIC_ARM11M OCORE */241 #else /* GIC_ARM11MPCORE */ 242 242 gicd_config(intno, GICD_ICFGRn_LEVEL); 243 #endif /* GIC_ARM11M OCORE */243 #endif /* GIC_ARM11MPCORE */ 244 244 } 245 245 -
asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_kernel_impl.h
r302 r305 4 4 * Advanced Standard Profile Kernel 5 5 * 6 * Copyright (C) 2006-201 5by Embedded and Real-Time Systems Laboratory6 * Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory 7 7 * Graduate School of Information Science, Nagoya Univ., JAPAN 8 8 * … … 51 51 * ã®è²¬ä»»ãè² ããªãï¼ 52 52 * 53 * $Id: gic_kernel_impl.h 377 2015-07-31 00:48:14Z ertl-hiro $53 * $Id: gic_kernel_impl.h 535 2016-01-16 00:42:29Z ertl-hiro $ 54 54 */ 55 55 … … 100 100 度ã®æ®µæ°ã256段éã®æã«ãããã¦è¡¨ãï¼ 101 101 */ 102 #define GIC_PRI_LEVEL (TMAX_INTPRI - TMIN_INTPRI + 2) 103 102 104 #if GIC_PRI_LEVEL == 16 103 105 #define GIC_PRI_SHIFT 4 … … 128 130 (((uint_t)((ipm) + (GIC_PRI_LEVEL - 1))) << GIC_PRI_SHIFT) 129 131 130 /* TMIN_INTPRIï¼TMAX_INTPRIã¨ã®æ´åæ§ã®ãã§ã㯠*/131 #if TMAX_INTPRI - TMIN_INTPRI + 2 != GIC_PRI_LEVEL132 #error GIC_PRI_LEVEL does not match TMIN_INTPRI.133 #endif134 135 132 /* 136 133 * GICã¬ã¸ã¹ã¿ã®ã¢ãã¬ã¹ãå®ç¾©ããããã®ãã¯ã … … 209 206 #define GICD_ICFGRn_LEVEL UINT_C(0x00) 210 207 #define GICD_ICFGRn_EDGE UINT_C(0x02) 211 #ifdef GIC_ARM11M OCORE208 #ifdef GIC_ARM11MPCORE 212 209 #define GICD_ICFGRn_N_N UINT_C(0x00) 213 210 #define GICD_ICFGRn_1_N UINT_C(0x01) 214 #endif /* GIC_ARM11M OCORE */211 #endif /* GIC_ARM11MPCORE */ 215 212 216 213 #ifndef TOPPERS_MACRO_ONLY -
asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_support.S
r302 r305 6 6 * Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory 7 7 * Toyohashi Univ. of Technology, JAPAN 8 * Copyright (C) 2006-201 5by Embedded and Real-Time Systems Laboratory8 * Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory 9 9 * Graduate School of Information Science, Nagoya Univ., JAPAN 10 10 * … … 53 53 * ã®è²¬ä»»ãè² ããªãï¼ 54 54 * 55 * $Id: gic_support.S 454 2015-08-16 03:18:46Z ertl-hiro $55 * $Id: gic_support.S 522 2016-01-14 06:56:53Z ertl-hiro $ 56 56 */ 57 57 … … 176 176 * 177 177 * irc_end_excã§ç¨ããæ 178 å ±ï¼ å²è¾¼ã¿çºçåã®å²è¾¼ã¿åªå178 å ±ï¼CPUä¾å¤çºçåã®å²è¾¼ã¿åªå 179 179 度ãã¹ã¯ï¼ãï¼ã¹ã¿ã 180 180 * ã¯ã«ä¿åããï¼ … … 207 207 ã«æ»ãï¼ 208 208 */ 209 pop {r2} /* irc_begin_ intã§ä¿åããæ209 pop {r2} /* irc_begin_excã§ä¿åããæ 210 210 å ±ã復帰 */ 211 211 ldr r1, =GICC_PMR /* å²è¾¼ã¿åªå -
asp3_wo_tecs/trunk/arch/arm_gcc/common/sp804.h
r302 r305 50 50 * ã®è²¬ä»»ãè² ããªãï¼ 51 51 * 52 * $Id: sp804.h 440 2015-08-09 02:02:08Z ertl-hiro $52 * $Id: sp804.h 530 2016-01-14 15:17:30Z ertl-hiro $ 53 53 */ 54 54 55 55 /* 56 * ARM Dual-Timer Moduleï¼SP804ï¼ã µãã¼ãã¢ã¸ã¥ã¼ã«56 * ARM Dual-Timer Moduleï¼SP804ï¼ã«é¢ããå®ç¾© 57 57 */ 58 58 -
asp3_wo_tecs/trunk/arch/arm_gcc/common/start.S
r302 r305 5 5 * Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory 6 6 * Toyohashi Univ. of Technology, JAPAN 7 * Copyright (C) 2005-201 4by Embedded and Real-Time Systems Laboratory7 * Copyright (C) 2005-2016 by Embedded and Real-Time Systems Laboratory 8 8 * Graduate School of Information Science, Nagoya Univ., JAPAN 9 9 * … … 52 52 * ã®è²¬ä»»ãè² ããªãï¼ 53 53 * 54 * $Id: start.S 349 2015-07-25 05:25:27Z ertl-hiro $54 * $Id: start.S 540 2016-01-16 02:15:41Z ertl-hiro $ 55 55 */ 56 56 … … 106 106 * BSS_STARTããBSS_ENDã¾ã§ãã¼ãã¯ãªã¢ããï¼ 107 107 */ 108 ldr r 1, =BSS_START108 ldr r0, =BSS_START 109 109 ldr r2, =BSS_END 110 cmp r 1, r2110 cmp r0, r2 111 111 bhs start_3 112 mov r0, #0 112 mov r1, #0 113 #ifdef TOPPERS_USE_STDLIB 114 sub r2, r2, r0 115 bl memset 116 #else /* TOPPERS_USE_STDLIB */ 113 117 ALABEL(start_2) 114 str r 0, [r1], #4115 cmp r 1, r2118 str r1, [r0], #4 119 cmp r0, r2 116 120 blo start_2 121 #endif /* TOPPERS_USE_STDLIB */ 117 122 ALABEL(start_3) 118 123 #endif /* TOPPERS_OMIT_BSS_INIT */ … … 125 130 * IDATA_STARTããIDATA_ENDã¾ã§ãï¼DATA_START以éã«ã³ãã¼ããï¼ 126 131 */ 127 ldr r 1, =DATA_START128 ldr r 3, =DATA_END129 cmp r 1, r3132 ldr r0, =DATA_START 133 ldr r2, =DATA_END 134 cmp r0, r2 130 135 bhs start_5 131 ldr r2, =IDATA_START 136 ldr r1, =IDATA_START 137 #ifdef TOPPERS_USE_STDLIB 138 sub r2, r2, r0 139 bl memcpy 140 #else /* TOPPERS_USE_STDLIB */ 132 141 ALABEL(start_4) 133 ldr r 0, [r2], #4134 str r 0, [r1], #4135 cmp r 1, r3142 ldr r3, [r1], #4 143 str r3, [r0], #4 144 cmp r0, r2 136 145 blo start_4 146 #endif /* TOPPERS_USE_STDLIB */ 137 147 ALABEL(start_5) 138 148 #endif /* TOPPERS_OMIT_DATA_INIT */ -
asp3_wo_tecs/trunk/arch/arm_gcc/mpcore/chip_kernel.h
r302 r305 51 51 * ã®è²¬ä»»ãè² ããªãï¼ 52 52 * 53 * $Id: chip_kernel.h 390 2015-08-01 02:03:34Z ertl-hiro $53 * $Id: chip_kernel.h 531 2016-01-14 15:19:13Z ertl-hiro $ 54 54 */ 55 55 … … 67 67 /* 68 68 * ãµãã¼ãã§ããæ©è½ã®å®ç¾© 69 * 70 * GICã§ã¯ï¼ena_intï¼dis_intããµãã¼ããããã¨ãã§ããï¼ 69 71 */ 70 72 #define TOPPERS_TARGET_SUPPORT_ENA_INT /* ena_int */ -
asp3_wo_tecs/trunk/arch/arm_gcc/mpcore/chip_kernel_impl.c
r302 r305 53 53 * ã®è²¬ä»»ãè² ããªãï¼ 54 54 * 55 * $Id: chip_kernel_impl.c 357 2015-07-25 12:05:26Z ertl-hiro $55 * $Id: chip_kernel_impl.c 538 2016-01-16 01:27:50Z ertl-hiro $ 56 56 */ 57 57 … … 71 71 { 72 72 /* 73 * ã³ã¢ä¾åã®åæå74 */75 core_initialize();76 77 /*78 73 * ãã£ãã·ã¥ããã£ã¹ã¨ã¼ãã« 79 74 */ … … 81 76 82 77 /* 83 * MMUãæå¹ã«78 * ã³ã¢ä¾åã®åæå 84 79 */ 85 arm_mmu_initialize();80 core_initialize(); 86 81 87 82 /* -
asp3_wo_tecs/trunk/arch/arm_gcc/mpcore/chip_timer.h
r302 r305 53 53 * ã®è²¬ä»»ãè² ããªãï¼ 54 54 * 55 * $Id: chip_timer.h 358 2015-07-26 10:26:23Z ertl-hiro $55 * $Id: chip_timer.h 537 2016-01-16 01:26:38Z ertl-hiro $ 56 56 */ 57 57 … … 60 60 èµã¿ã¤ãç¨ï¼ 61 61 * 62 * ARM11 MPCoreã«ã¯ï¼ã³ã¢æ¯ã«ã¿ã¤ãã¨ã¦ã©ããããã°ãããï¼ã¦ã©ãããã63 * ã °ã¯ï¼ã¿ã¤ãã¨ãã¦ä½¿ç¨ãããã¨ãã§ããããï¼ãã®2ã¤ã®ã¿ã¤ãã使ã£ã¦64 * é«å解è½ã¿ã¤ããå®ç¾ããï¼å65 ·ä½çã«ã¯ï¼ã¦ã©ãã ããã°ãã¿ã¤ãã¢ã¼ã66 * ã «è¨å®ãã¦ç¾å¨æå»ã®ç®¡çã®ããã«ç¨ãï¼ã¿ã¤ããç¸å¯¾æéå²è¾¼ã¿ã®çºç67 * ã®ããã«ç¨ããï¼62 * MPCoreã«ã¯ï¼ã³ã¢æ¯ã«ãã©ã¤ãã¼ãã¿ã¤ãã¨ãã©ã¤ãã¼ãã¦ã©ããããã° 63 * ãæã¤ï¼ã¦ã©ããããã°ã¯ï¼ã¿ã¤ãã¨ãã¦ä½¿ç¨ãããã¨ãã§ããããï¼ã 64 * ã®2ã¤ã®ã¿ã¤ãã使ã£ã¦é«å解è½ã¿ã¤ããå®ç¾ããï¼å 65 ·ä½çã«ã¯ï¼ã¦ã©ãã 66 * ããã°ãã¿ã¤ãã¢ã¼ãã«è¨å®ãã¦ç¾å¨æå»ã®ç®¡çã®ããã«ç¨ãï¼ã¿ã¤ãã 67 * ç¸å¯¾æéå²è¾¼ã¿ã®çºçã®ããã«ç¨ããï¼ 68 68 */ 69 69
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