Ignore:
Timestamp:
Apr 5, 2019, 9:26:53 PM (5 years ago)
Author:
coas-nagasima
Message:

mbed関連を更新
シリアルドライバをmbedのHALを使うよう変更
ファイルディスクリプタの処理を更新

Location:
asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX
Files:
1 added
1 copied

Legend:

Unmodified
Added
Removed

  • asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/can_api.c

    r373 r374  
    1919#include "RZ_A1_Init.h"
    2020#include "cmsis.h"
    21 #include "pinmap.h"
    22 #include "rscan0_iodefine.h"
     21#include "PeripheralPins.h"
     22#include "iodefine.h"
    2323#include "r_typedefs.h"
    24 #include "MBRZA1H.h"
    25 
     24#include "mbed_drv_cfg.h"
     25
     26#if defined(TARGET_RZA1H)
    2627#define CAN_NUM         5
     28#else
     29#define CAN_NUM         2
     30#endif
    2731#define CAN_SND_RCV     2
    2832#define IRQ_NUM         8
    … …  
    3236static void can_err_irq(uint32_t ch, CanIrqType type);
    3337static void can0_rec_irq(void);
     38static void can0_trx_irq(void);
     39static void can0_err_warning_irq(void);
     40static void can0_overrun_irq(void);
     41static void can0_passive_irq(void);
     42static void can0_arb_lost_irq(void);
     43static void can0_bus_err_irq(void);
    3444static void can1_rec_irq(void);
     45static void can1_trx_irq(void);
     46static void can1_err_warning_irq(void);
     47static void can1_overrun_irq(void);
     48static void can1_passive_irq(void);
     49static void can1_arb_lost_irq(void);
     50static void can1_bus_err_irq(void);
     51#if defined(TARGET_RZA1H)
    3552static void can2_rec_irq(void);
     53static void can2_trx_irq(void);
     54static void can2_err_warning_irq(void);
     55static void can2_overrun_irq(void);
     56static void can2_passive_irq(void);
     57static void can2_arb_lost_irq(void);
     58static void can2_bus_err_irq(void);
    3659static void can3_rec_irq(void);
     60static void can3_trx_irq(void);
     61static void can3_err_warning_irq(void);
     62static void can3_overrun_irq(void);
     63static void can3_passive_irq(void);
     64static void can3_arb_lost_irq(void);
     65static void can3_bus_err_irq(void);
    3766static void can4_rec_irq(void);
    38 static void can0_trx_irq(void);
    39 static void can1_trx_irq(void);
    40 static void can2_trx_irq(void);
    41 static void can3_trx_irq(void);
    4267static void can4_trx_irq(void);
    43 static void can0_err_warning_irq(void);
    44 static void can1_err_warning_irq(void);
    45 static void can2_err_warning_irq(void);
    46 static void can3_err_warning_irq(void);
    4768static void can4_err_warning_irq(void);
    48 static void can0_overrun_irq(void);
    49 static void can1_overrun_irq(void);
    50 static void can2_overrun_irq(void);
    51 static void can3_overrun_irq(void);
    5269static void can4_overrun_irq(void);
    53 static void can0_passive_irq(void);
    54 static void can1_passive_irq(void);
    55 static void can2_passive_irq(void);
    56 static void can3_passive_irq(void);
    5770static void can4_passive_irq(void);
    58 static void can0_arb_lost_irq(void);
    59 static void can1_arb_lost_irq(void);
    60 static void can2_arb_lost_irq(void);
    61 static void can3_arb_lost_irq(void);
    6271static void can4_arb_lost_irq(void);
    63 static void can0_bus_err_irq(void);
    64 static void can1_bus_err_irq(void);
    65 static void can2_bus_err_irq(void);
    66 static void can3_bus_err_irq(void);
    6772static void can4_bus_err_irq(void);
     73#endif
     74
    6875static void can_reset_reg(can_t *obj);
    6976static void can_reset_recv_rule(can_t *obj);
    … …  
    100107static int can_initialized[CAN_NUM] = {0};
    101108
    102 static const PinMap PinMap_CAN_RD[] = {
    103     {P7_8  , CAN_0, 4},
    104     {P9_1  , CAN_0, 3},
    105     {P1_4  , CAN_1, 3},
    106     {P5_9  , CAN_1, 5},
    107     {P7_11 , CAN_1, 4},
    108     {P11_12, CAN_1, 1},
    109     {P4_9  , CAN_2, 6},
    110     {P6_4  , CAN_2, 3},
    111     {P7_2  , CAN_2, 5},
    112     {P2_12 , CAN_3, 5},
    113     {P4_2  , CAN_3, 4},
    114     {P1_5  , CAN_4, 3},
    115     {P2_14 , CAN_4, 5},
    116     {NC    , NC   , 0}
    117 };
    118 
    119 static const PinMap PinMap_CAN_TD[] = {
    120     {P7_9  , CAN_0, 4},
    121     {P9_0  , CAN_0, 3},
    122     {P5_10 , CAN_1, 5},
    123     {P7_10 , CAN_1, 4},
    124     {P11_13, CAN_1, 1},
    125     {P4_8  , CAN_2, 6},
    126     {P6_5  , CAN_2, 3},
    127     {P7_3  , CAN_2, 5},
    128     {P2_13 , CAN_3, 5},
    129     {P4_3  , CAN_3, 4},
    130     {P4_11 , CAN_4, 6},
    131     {P8_10 , CAN_4, 5},
    132     {NC    , NC   , 0}
    133 };
    134109
    135110static __IO uint32_t *CTR_MATCH[] = {
    136111    &RSCAN0C0CTR,
    137112    &RSCAN0C1CTR,
     113#if defined(TARGET_RZA1H)
    138114    &RSCAN0C2CTR,
    139115    &RSCAN0C3CTR,
    140116    &RSCAN0C4CTR,
     117#endif
    141118};
    142119
    … …  
    144121    &RSCAN0C0CFG,
    145122    &RSCAN0C1CFG,
     123#if defined(TARGET_RZA1H)
    146124    &RSCAN0C2CFG,
    147125    &RSCAN0C3CFG,
    148126    &RSCAN0C4CFG,
     127#endif
    149128};
    150129
    … …  
    163142    &RSCAN0TXQCC0,
    164143    &RSCAN0TXQCC1,
     144#if defined(TARGET_RZA1H)
    165145    &RSCAN0TXQCC2,
    166146    &RSCAN0TXQCC3,
    167147    &RSCAN0TXQCC4,
     148#endif
    168149};
    169150
    … …  
    171152    &RSCAN0THLCC0,
    172153    &RSCAN0THLCC1,
     154#if defined(TARGET_RZA1H)
    173155    &RSCAN0THLCC2,
    174156    &RSCAN0THLCC3,
    175157    &RSCAN0THLCC4,
     158#endif
    176159};
    177160
    … …  
    179162    &RSCAN0C0STS,
    180163    &RSCAN0C1STS,
     164#if defined(TARGET_RZA1H)
    181165    &RSCAN0C2STS,
    182166    &RSCAN0C3STS,
    183167    &RSCAN0C4STS,
     168#endif
    184169};
    185170
    … …  
    187172    &RSCAN0C0ERFL,
    188173    &RSCAN0C1ERFL,
     174#if defined(TARGET_RZA1H)
    189175    &RSCAN0C2ERFL,
    190176    &RSCAN0C3ERFL,
    191177    &RSCAN0C4ERFL,
     178#endif
    192179};
    193180
    … …  
    195182    { &RSCAN0CFCC0 , &RSCAN0CFCC1  },
    196183    { &RSCAN0CFCC3 , &RSCAN0CFCC4  },
     184#if defined(TARGET_RZA1H)
    197185    { &RSCAN0CFCC6 , &RSCAN0CFCC7  },
    198186    { &RSCAN0CFCC9 , &RSCAN0CFCC10 },
    199     { &RSCAN0CFCC12, &RSCAN0CFCC13 }
     187    { &RSCAN0CFCC12, &RSCAN0CFCC13 },
     188#endif
    200189};
    201190
    … …  
    203192    { &RSCAN0CFSTS0 , &RSCAN0CFSTS1  },
    204193    { &RSCAN0CFSTS3 , &RSCAN0CFSTS4  },
     194#if defined(TARGET_RZA1H)
    205195    { &RSCAN0CFSTS6 , &RSCAN0CFSTS7  },
    206196    { &RSCAN0CFSTS9 , &RSCAN0CFSTS10 },
    207     { &RSCAN0CFSTS12, &RSCAN0CFSTS13 }
     197    { &RSCAN0CFSTS12, &RSCAN0CFSTS13 },
     198#endif
    208199};
    209200
    … …  
    211202    { &RSCAN0CFPCTR0 , &RSCAN0CFPCTR1  },
    212203    { &RSCAN0CFPCTR3 , &RSCAN0CFPCTR4  },
     204#if defined(TARGET_RZA1H)
    213205    { &RSCAN0CFPCTR6 , &RSCAN0CFPCTR7  },
    214206    { &RSCAN0CFPCTR9 , &RSCAN0CFPCTR10 },
    215     { &RSCAN0CFPCTR12, &RSCAN0CFPCTR13 }
     207    { &RSCAN0CFPCTR12, &RSCAN0CFPCTR13 },
     208#endif
    216209};
    217210
    … …  
    219212    { &RSCAN0CFID0 , &RSCAN0CFID1  },
    220213    { &RSCAN0CFID3 , &RSCAN0CFID4  },
     214#if defined(TARGET_RZA1H)
    221215    { &RSCAN0CFID6 , &RSCAN0CFID7  },
    222216    { &RSCAN0CFID9 , &RSCAN0CFID10 },
    223     { &RSCAN0CFID12, &RSCAN0CFID13 }
     217    { &RSCAN0CFID12, &RSCAN0CFID13 },
     218#endif
    224219};
    225220
    … …  
    227222    { &RSCAN0CFPTR0 , &RSCAN0CFPTR1  },
    228223    { &RSCAN0CFPTR3 , &RSCAN0CFPTR4  },
     224#if defined(TARGET_RZA1H)
    229225    { &RSCAN0CFPTR6 , &RSCAN0CFPTR7  },
    230226    { &RSCAN0CFPTR9 , &RSCAN0CFPTR10 },
    231227    { &RSCAN0CFPTR12, &RSCAN0CFPTR13 }
     228#endif
    232229};
    233230
    … …  
    235232    { &RSCAN0CFDF00 , &RSCAN0CFDF01  },
    236233    { &RSCAN0CFDF03 , &RSCAN0CFDF04  },
     234#if defined(TARGET_RZA1H)
    237235    { &RSCAN0CFDF06 , &RSCAN0CFDF07  },
    238236    { &RSCAN0CFDF09 , &RSCAN0CFDF010 },
    239     { &RSCAN0CFDF012, &RSCAN0CFDF013 }
     237    { &RSCAN0CFDF012, &RSCAN0CFDF013 },
     238#endif
    240239};
    241240
    … …  
    243242    { &RSCAN0CFDF10 , &RSCAN0CFDF11  },
    244243    { &RSCAN0CFDF13 , &RSCAN0CFDF14  },
     244#if defined(TARGET_RZA1H)
    245245    { &RSCAN0CFDF16 , &RSCAN0CFDF17  },
    246246    { &RSCAN0CFDF19 , &RSCAN0CFDF110 },
    247     { &RSCAN0CFDF112, &RSCAN0CFDF113 }
     247    { &RSCAN0CFDF112, &RSCAN0CFDF113 },
     248#endif
    248249};
    249250
    … …  
    270271        { INTRCAN1ERR_IRQn, can1_bus_err_irq     }  /* BeIrq */
    271272    },
     273#if defined(TARGET_RZA1H)
    272274    {   /* ch2 */
    273275        { INTRCAN2REC_IRQn, can2_rec_irq         }, /* RxIrq */
    … …  
    299301        { INTRCAN4ERR_IRQn, can4_arb_lost_irq    }, /* AlIrq */
    300302        { INTRCAN4ERR_IRQn, can4_bus_err_irq     }  /* BeIrq */
    301     }
     303    },
     304#endif
    302305};
    303306
    … …  
    341344            InterruptHandlerRegister(can_int_info[obj->ch][type].int_num, can_int_info[obj->ch][type].handler);
    342345            GIC_SetPriority(can_int_info[obj->ch][type].int_num, 5);
     346            GIC_SetConfiguration(can_int_info[obj->ch][type].int_num, 1);
    343347            GIC_EnableIRQ(can_int_info[obj->ch][type].int_num);
    344348        } else {
    … …  
    385389            break;
    386390        case IRQ_BUS:
    387             *dmy_erfl &= 0xFFFF00FF;    // Clear ADERR, B0ERR, B1ERR, CERR, AERR, FERR, SERR
     391            *dmy_erfl &= 0xFFFF00FF;    // Clear ADERR、B0ERR、B1ERR、CERR、AERR、FERR、SERR
    388392            *dmy_erfl &= 0xFFFFFFFE;    // Clear BEF
    389393            break;
    … …  
    404408}
    405409
     410static void can0_trx_irq(void) {
     411    can_trx_irq(CAN_0);
     412}
     413
     414static void can0_err_warning_irq(void) {
     415    can_err_irq(CAN_0, IRQ_ERROR);
     416}
     417
     418static void can0_overrun_irq(void) {
     419    can_err_irq(CAN_0, IRQ_OVERRUN);
     420}
     421
     422static void can0_passive_irq(void) {
     423    can_err_irq(CAN_0, IRQ_PASSIVE);
     424}
     425
     426static void can0_arb_lost_irq(void) {
     427    can_err_irq(CAN_0, IRQ_ARB);
     428}
     429
     430static void can0_bus_err_irq(void) {
     431    can_err_irq(CAN_0, IRQ_BUS);
     432}
     433
    406434static void can1_rec_irq(void) {
    407435    can_rec_irq(CAN_1);
    408436}
    409437
     438static void can1_trx_irq(void) {
     439    can_trx_irq(CAN_1);
     440}
     441
     442static void can1_err_warning_irq(void) {
     443    can_err_irq(CAN_1, IRQ_ERROR);
     444}
     445
     446static void can1_overrun_irq(void) {
     447    can_err_irq(CAN_1, IRQ_OVERRUN);
     448}
     449
     450static void can1_passive_irq(void) {
     451    can_err_irq(CAN_1, IRQ_PASSIVE);
     452}
     453
     454static void can1_arb_lost_irq(void) {
     455    can_err_irq(CAN_1, IRQ_ARB);
     456}
     457
     458static void can1_bus_err_irq(void) {
     459    can_err_irq(CAN_1, IRQ_BUS);
     460}
     461
     462#if defined(TARGET_RZA1H)
    410463static void can2_rec_irq(void) {
    411464    can_rec_irq(CAN_2);
    412465}
    413466
     467static void can2_trx_irq(void) {
     468    can_trx_irq(CAN_2);
     469}
     470
     471static void can2_err_warning_irq(void) {
     472    can_err_irq(CAN_2, IRQ_ERROR);
     473}
     474
     475static void can2_overrun_irq(void) {
     476    can_err_irq(CAN_2, IRQ_OVERRUN);
     477}
     478
     479static void can2_passive_irq(void) {
     480    can_err_irq(CAN_2, IRQ_PASSIVE);
     481}
     482
     483static void can2_arb_lost_irq(void) {
     484    can_err_irq(CAN_2, IRQ_ARB);
     485}
     486
     487static void can2_bus_err_irq(void) {
     488    can_err_irq(CAN_2, IRQ_BUS);
     489}
     490
    414491static void can3_rec_irq(void) {
    415492    can_rec_irq(CAN_3);
    416493}
    417494
     495static void can3_trx_irq(void) {
     496    can_trx_irq(CAN_3);
     497}
     498
     499static void can3_err_warning_irq(void) {
     500    can_err_irq(CAN_3, IRQ_ERROR);
     501}
     502
     503static void can3_overrun_irq(void) {
     504    can_err_irq(CAN_3, IRQ_OVERRUN);
     505}
     506
     507static void can3_passive_irq(void) {
     508    can_err_irq(CAN_3, IRQ_PASSIVE);
     509}
     510
     511static void can3_arb_lost_irq(void) {
     512    can_err_irq(CAN_3, IRQ_ARB);
     513}
     514
     515static void can3_bus_err_irq(void) {
     516    can_err_irq(CAN_3, IRQ_BUS);
     517}
     518
    418519static void can4_rec_irq(void) {
    419520    can_rec_irq(CAN_4);
    420521}
    421522
    422 static void can0_trx_irq(void) {
    423     can_trx_irq(CAN_0);
    424 }
    425 
    426 static void can1_trx_irq(void) {
    427     can_trx_irq(CAN_1);
    428 }
    429 
    430 static void can2_trx_irq(void) {
    431     can_trx_irq(CAN_2);
    432 }
    433 
    434 static void can3_trx_irq(void) {
    435     can_trx_irq(CAN_3);
    436 }
    437 
    438523static void can4_trx_irq(void) {
    439524    can_trx_irq(CAN_4);
    440525}
    441526
    442 static void can0_err_warning_irq(void) {
    443     can_err_irq(CAN_0, IRQ_ERROR);
    444 }
    445 
    446 static void can1_err_warning_irq(void) {
    447     can_err_irq(CAN_1, IRQ_ERROR);
    448 }
    449 
    450 static void can2_err_warning_irq(void) {
    451     can_err_irq(CAN_2, IRQ_ERROR);
    452 }
    453 
    454 static void can3_err_warning_irq(void) {
    455     can_err_irq(CAN_3, IRQ_ERROR);
    456 }
    457 
    458527static void can4_err_warning_irq(void) {
    459528    can_err_irq(CAN_4, IRQ_ERROR);
    460529}
    461530
    462 static void can0_overrun_irq(void) {
    463     can_err_irq(CAN_0, IRQ_OVERRUN);
    464 }
    465 
    466 static void can1_overrun_irq(void) {
    467     can_err_irq(CAN_1, IRQ_OVERRUN);
    468 }
    469 
    470 static void can2_overrun_irq(void) {
    471     can_err_irq(CAN_2, IRQ_OVERRUN);
    472 }
    473 
    474 static void can3_overrun_irq(void) {
    475     can_err_irq(CAN_3, IRQ_OVERRUN);
    476 }
    477 
    478531static void can4_overrun_irq(void) {
    479532    can_err_irq(CAN_4, IRQ_OVERRUN);
    480533}
    481534
    482 static void can0_passive_irq(void) {
    483     can_err_irq(CAN_0, IRQ_PASSIVE);
    484 }
    485 
    486 static void can1_passive_irq(void) {
    487     can_err_irq(CAN_1, IRQ_PASSIVE);
    488 }
    489 
    490 static void can2_passive_irq(void) {
    491     can_err_irq(CAN_2, IRQ_PASSIVE);
    492 }
    493 
    494 static void can3_passive_irq(void) {
    495     can_err_irq(CAN_3, IRQ_PASSIVE);
    496 }
    497 
    498535static void can4_passive_irq(void) {
    499536    can_err_irq(CAN_4, IRQ_PASSIVE);
    500537}
    501538
    502 static void can0_arb_lost_irq(void) {
    503     can_err_irq(CAN_0, IRQ_ARB);
    504 }
    505 
    506 static void can1_arb_lost_irq(void) {
    507     can_err_irq(CAN_1, IRQ_ARB);
    508 }
    509 
    510 static void can2_arb_lost_irq(void) {
    511     can_err_irq(CAN_2, IRQ_ARB);
    512 }
    513 
    514 static void can3_arb_lost_irq(void) {
    515     can_err_irq(CAN_3, IRQ_ARB);
    516 }
    517 
    518539static void can4_arb_lost_irq(void) {
    519540    can_err_irq(CAN_4, IRQ_ARB);
    520541}
    521542
    522 static void can0_bus_err_irq(void) {
    523     can_err_irq(CAN_0, IRQ_BUS);
    524 }
    525 
    526 static void can1_bus_err_irq(void) {
    527     can_err_irq(CAN_1, IRQ_BUS);
    528 }
    529 
    530 static void can2_bus_err_irq(void) {
    531     can_err_irq(CAN_2, IRQ_BUS);
    532 }
    533 
    534 static void can3_bus_err_irq(void) {
    535     can_err_irq(CAN_3, IRQ_BUS);
    536 }
    537 
    538543static void can4_bus_err_irq(void) {
    539544    can_err_irq(CAN_4, IRQ_BUS);
    540545}
    541 
    542 void can_init(can_t *obj, PinName rd, PinName td) {
     546#endif
     547
     548void can_init_freq(can_t *obj, PinName rd, PinName td, int hz) {
    543549    __IO uint32_t *dmy_ctr;
    544550
    … …  
    574580    pinmap_pinout(rd, PinMap_CAN_RD);
    575581    pinmap_pinout(td, PinMap_CAN_TD);
     582
     583    /* set can frequency */
     584    can_frequency(obj, hz);
     585}
     586
     587void can_init(can_t *obj, PinName rd, PinName td) {
     588    can_init_freq(obj, rd, td, 100000);
    576589}
    577590
    … …  
    631644    }
    632645   
    633     if (((msg.format == CANStandard) && (msg.id <= 0x07FF)) || ((msg.format == CANExtended) && (msg.id <= 0x03FFFF))) {
     646    if (((msg.format == CANStandard) && (msg.id <= 0x07FF)) || ((msg.format == CANExtended) && (msg.id <= 0x1FFFFFFF))) {
    634647        /* send/receive FIFO buffer isn't full */
    635648        dmy_cfsts = CFSTS_TBL[obj->ch][CAN_SEND];
    636649        if ((*dmy_cfsts & 0x02) != 0x02) {
    637             /* set format, frame type and send/receive FIFO buffer ID(b10-0 or b28-11) */
     650            /* set format, frame type and send/receive FIFO buffer ID(b10-0 or b28-0) */
    638651            dmy_cfid = CFID_TBL[obj->ch][CAN_SEND];
    639652            *dmy_cfid = ((msg.format << 31) | (msg.type << 30));
    … …  
    641654                *dmy_cfid |= (msg.id & 0x07FF);
    642655            } else {
    643                 *dmy_cfid |= ((msg.id & 0x03FFFF) << 11);
     656                *dmy_cfid |= (msg.id & 0x1FFFFFFF);
    644657            }
    645658            /* set length */
    … …  
    680693    dmy_cfsts = CFSTS_TBL[obj->ch][CAN_RECV];
    681694    while ((*dmy_cfsts & 0x01) != 0x01) {
    682         /* get format, frame type and send/receive FIFO buffer ID(b10-0 or b28-11) */
     695        /* get format, frame type and send/receive FIFO buffer ID(b10-0 or b28-0) */
    683696        dmy_cfid = CFID_TBL[obj->ch][CAN_RECV];
    684697        msg->format = (CANFormat)(*dmy_cfid >> 31);
    685         msg->type = (CANType)(*dmy_cfid >> 30);
     698        msg->type = (CANType)((*dmy_cfid >> 30) & 0x1);
    686699        if (msg->format == CANStandard) {
    687700            msg->id = (*dmy_cfid & 0x07FF);
    688701        } else {
    689             msg->id = ((*dmy_cfid >> 11) & 0x03FFFF);
     702            msg->id = (*dmy_cfid & 0x1FFFFFFF);
    690703        }
    691704        /* get length */
    … …  
    756769            break;
    757770        case MODE_TEST_GLOBAL:
    758             /* set the channel between the communication test on channel 1 and channel 2 */
     771            /* set the channel between the communication test on CAN_TEST_GLOBAL_CH and CAN_TEST_GLOBAL_CH+1 */
    759772            /* set Channel Hold mode */
    760             for (tmp_obj->ch = CAN_1; tmp_obj->ch <= CAN_2; tmp_obj->ch++) {
     773            for (tmp_obj->ch = CAN_TEST_GLOBAL_CH; tmp_obj->ch <= (CAN_TEST_GLOBAL_CH + 1); tmp_obj->ch++) {
    761774                dmy_sts = STS_MATCH[tmp_obj->ch];
    762775                if ((*dmy_sts & 0x04) == 0x04) {
    … …  
    770783            }
    771784            can_set_global_mode(GL_TEST);
    772             /* enable communication test between channel1 and channel2 */
     785            /* enable communication test between CAN_TEST_GLOBAL_CH and CAN_TEST_GLOBAL_CH+1 */
    773786            RSCAN0GTSTCFG = 0x06;
    774787            RSCAN0GTSTCTR = 0x01;
    775788            /* send and receive setting of channel1 and channel2 */
    776             for (tmp_obj->ch = CAN_1; tmp_obj->ch <= CAN_2; tmp_obj->ch++) {
     789            for (tmp_obj->ch = CAN_TEST_GLOBAL_CH; tmp_obj->ch <= (CAN_TEST_GLOBAL_CH + 1); tmp_obj->ch++) {
    777790                can_reset_buffer(tmp_obj);
    778791                /* set global interrrupt */
    … …  
    807820   
    808821    if ((format == CANStandard) || (format == CANExtended)) {
    809         if (((format == CANStandard) && (id <= 0x07FF)) || ((format == CANExtended) && (id <= 0x03FFFF))) {
     822        if (((format == CANStandard) && (id <= 0x07FF)) || ((format == CANExtended) && (id <= 0x1FFFFFFF))) {
    810823            /* set Global Reset mode and Channel Reset mode */
    811824            can_set_global_mode(GL_RESET);
    … …  
    818831            *dmy_gaflid = (format << 31);
    819832            if (format == CANExtended) {
    820                 /* set receive rule ID for bit28-11 */
    821                 *dmy_gaflid |= (id << 11);
     833                /* set receive rule ID for bit28-0 */
     834                *dmy_gaflid |= (id & 0x1FFFFFFF);
    822835            } else {
    823836                /* set receive rule ID for bit10-0 */
    824                 *dmy_gaflid |= id;
     837                *dmy_gaflid |= (id & 0x07FF);
    825838            }
    826839            /* set ID mask bit */
    … …  
    881894    /* number of receive rules of each chanel = 64 */
    882895    RSCAN0GAFLCFG0 = 0x40404040;
     896#if defined(TARGET_RZA1H)
    883897    RSCAN0GAFLCFG1 = 0x40000000;
     898#endif
    884899    /* enable receive rule table writing */
    885900    RSCAN0GAFLECTR = 0x00000100;
    … …  
    932947    /* TMIEp interrupt is disable */
    933948    RSCAN0TMIEC0 = 0x00000000;
     949#if defined(TARGET_RZA1H)
    934950    RSCAN0TMIEC1 = 0x00000000;
    935951    RSCAN0TMIEC2 = 0x00000000;
     952#endif
    936953}
    937954
    … …  
    965982    uint8_t tseg1 = 0;
    966983    uint8_t tseg2 = 0;
     984    uint8_t sjw = 0;
    967985   
    968986    /* set clkc */
    … …  
    9871005    tseg1 = (tq - 1) * 0.666666667;
    9881006    tseg2 = (tq - 1) - tseg1;
     1007    sjw = (tseg2 > 4)? 4 : tseg2;
    9891008    /* set RSCAN0CmCFG register */
    9901009    dmy_cfg = CFG_MATCH[obj->ch];
    991     *dmy_cfg = ((tseg2 - 1) << 20) | ((tseg1 - 1) << 16) | brp;
     1010    *dmy_cfg = ((sjw - 1) << 24) | ((tseg2 - 1) << 20) | ((tseg1 - 1) << 16) | brp;
    9921011}
    9931012
    9941013static void can_set_global_mode(int mode) {
    9951014    /* set Global mode */
    996     RSCAN0GCTR = ((RSCAN0GCTR & 0xFFFFFFFC) | mode);
     1015    RSCAN0GCTR = ((RSCAN0GCTR & 0xFFFFFFFC) | (uint32_t)mode);
    9971016    /* Wait to cahnge into Global XXXX mode */
    998     while ((RSCAN0GSTS & 0x07) != mode) {
     1017    while ((RSCAN0GSTS & 0x07) != (uint32_t)mode) {
    9991018        __NOP();
    10001019    }
    … …  
    10071026    /* set Channel mode */
    10081027    dmy_ctr = CTR_MATCH[ch];
    1009     *dmy_ctr = ((*dmy_ctr & 0xFFFFFFFC) | mode);
     1028    *dmy_ctr = ((*dmy_ctr & 0xFFFFFFFC) | (uint32_t)mode);
    10101029    /* Wait to cahnge into Channel XXXX mode */
    10111030    dmy_sts = STS_MATCH[ch];
    1012     while ((*dmy_sts & 0x07) != mode) {
     1031    while ((*dmy_sts & 0x07) != (uint32_t)mode) {
    10131032        __NOP();
    10141033    }
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