[352] | 1 | /*******************************************************************************
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| 2 | * DISCLAIMER
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| 3 | * This software is supplied by Renesas Electronics Corporation and is only
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| 4 | * intended for use with Renesas products. No other uses are authorized. This
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| 5 | * software is owned by Renesas Electronics Corporation and is protected under
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| 6 | * all applicable laws, including copyright laws.
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| 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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| 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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| 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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| 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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| 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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| 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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| 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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| 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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| 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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| 16 | * Renesas reserves the right, without notice, to make changes to this software
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| 17 | * and to discontinue the availability of this software. By using this software,
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| 18 | * you agree to the additional terms and conditions found by accessing the
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| 19 | * following link:
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| 20 | * http://www.renesas.com/disclaimer*
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| 21 | * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
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| 22 | *******************************************************************************/
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| 23 | /*******************************************************************************
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| 24 | * File Name : sdg_iodefine.h
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| 25 | * $Rev: $
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| 26 | * $Date:: $
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| 27 | * Description : Definition of I/O Register (V1.00a)
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| 28 | ******************************************************************************/
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| 29 | #ifndef SDG_IODEFINE_H
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| 30 | #define SDG_IODEFINE_H
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| 31 |
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| 32 | struct st_sdg
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| 33 | { /* SDG */
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| 34 | volatile uint8_t SGCR1; /* SGCR1 */
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| 35 | volatile uint8_t SGCSR; /* SGCSR */
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| 36 | volatile uint8_t SGCR2; /* SGCR2 */
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| 37 | volatile uint8_t SGLR; /* SGLR */
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| 38 | volatile uint8_t SGTFR; /* SGTFR */
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| 39 | volatile uint8_t SGSFR; /* SGSFR */
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| 40 | };
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| 41 |
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| 42 |
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| 43 | #define SDG0 (*(struct st_sdg *)0xFCFF4800uL) /* SDG0 */
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| 44 | #define SDG1 (*(struct st_sdg *)0xFCFF4A00uL) /* SDG1 */
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| 45 | #define SDG2 (*(struct st_sdg *)0xFCFF4C00uL) /* SDG2 */
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| 46 | #define SDG3 (*(struct st_sdg *)0xFCFF4E00uL) /* SDG3 */
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| 47 |
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| 48 |
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| 49 | /* Start of channnel array defines of SDG */
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| 50 |
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| 51 | /* Channnel array defines of SDG */
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| 52 | /*(Sample) value = SDG[ channel ]->SGCR1; */
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| 53 | #define SDG_COUNT 4
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| 54 | #define SDG_ADDRESS_LIST \
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| 55 | { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
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| 56 | &SDG0, &SDG1, &SDG2, &SDG3 \
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| 57 | } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
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| 58 |
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| 59 | /* End of channnel array defines of SDG */
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| 60 |
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| 61 |
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| 62 | #define SGCR1_0 SDG0.SGCR1
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| 63 | #define SGCSR_0 SDG0.SGCSR
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| 64 | #define SGCR2_0 SDG0.SGCR2
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| 65 | #define SGLR_0 SDG0.SGLR
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| 66 | #define SGTFR_0 SDG0.SGTFR
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| 67 | #define SGSFR_0 SDG0.SGSFR
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| 68 | #define SGCR1_1 SDG1.SGCR1
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| 69 | #define SGCSR_1 SDG1.SGCSR
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| 70 | #define SGCR2_1 SDG1.SGCR2
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| 71 | #define SGLR_1 SDG1.SGLR
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| 72 | #define SGTFR_1 SDG1.SGTFR
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| 73 | #define SGSFR_1 SDG1.SGSFR
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| 74 | #define SGCR1_2 SDG2.SGCR1
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| 75 | #define SGCSR_2 SDG2.SGCSR
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| 76 | #define SGCR2_2 SDG2.SGCR2
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| 77 | #define SGLR_2 SDG2.SGLR
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| 78 | #define SGTFR_2 SDG2.SGTFR
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| 79 | #define SGSFR_2 SDG2.SGSFR
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| 80 | #define SGCR1_3 SDG3.SGCR1
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| 81 | #define SGCSR_3 SDG3.SGCSR
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| 82 | #define SGCR2_3 SDG3.SGCR2
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| 83 | #define SGLR_3 SDG3.SGLR
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| 84 | #define SGTFR_3 SDG3.SGTFR
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| 85 | #define SGSFR_3 SDG3.SGSFR
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| 86 | #endif
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