- Timestamp:
- Sep 14, 2020, 6:36:03 PM (4 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
azure_iot_hub_riscv/trunk/asp_baseplatform/pdic/k210/spi.h
r453 r458 49 49 50 50 #ifdef __cplusplus 51 51 extern "C" { 52 52 #endif 53 53 … … 55 55 * SPIポート定義 56 56 */ 57 #define SPI1_PORTID 1 58 #define SPI2_PORTID 2 59 #define SPI3_PORTID 3 60 #define SPI4_PORTID 3 61 #define NUM_SPIPORT 4 62 57 #define SPI1_PORTID 1 58 #define SPI2_PORTID 2 59 #define SPI3_PORTID 3 60 #define SPI4_PORTID 3 61 #define NUM_SPIPORT 4 63 62 64 63 /* 65 64 * SPI状態定義 66 65 */ 67 #define SPI_STATUS_RESET 0x0000/* SPI未使用状態 */68 #define SPI_STATUS_READY 0x0001/* SPIレディ状態 */69 #define SPI_STATUS_ERROR 0x0002/* SPIエラー状態 */70 #define SPI_STATUS_BUSY 66 #define SPI_STATUS_RESET 0x0000 /* SPI未使用状態 */ 67 #define SPI_STATUS_READY 0x0001 /* SPIレディ状態 */ 68 #define SPI_STATUS_ERROR 0x0002 /* SPIエラー状態 */ 69 #define SPI_STATUS_BUSY 0x0004 /* SPI処理中 */ 71 70 72 71 /* 73 72 * SPI転送モード 74 73 */ 75 #define SPI_XMODE_TX 0x0000/* 送信モード */76 #define SPI_XMODE_RX 0x0001/* 受信モード */77 #define SPI_XMODE_TXRX 0x0002/* 送受信モード */74 #define SPI_XMODE_TX 0x0000 /* 送信モード */ 75 #define SPI_XMODE_RX 0x0001 /* 受信モード */ 76 #define SPI_XMODE_TXRX 0x0002 /* 送受信モード */ 78 77 79 78 /* 80 79 * SPIエラー定義 81 80 */ 82 #define SPI_ERROR_NONE 0x00000000/* No error */83 #define SPI_ERROR_MODF 0x00000001/* MODF error */84 #define SPI_ERROR_CRC 0x00000002/* CRC error */85 #define SPI_ERROR_OVR 0x00000004/* OVR error */86 #define SPI_ERROR_FRE 0x00000008/* FRE error */87 #define SPI_ERROR_DMA 0x00000010/* DMA transfer error */88 #define SPI_ERROR_TIMEOUT 81 #define SPI_ERROR_NONE 0x00000000 /* No error */ 82 #define SPI_ERROR_MODF 0x00000001 /* MODF error */ 83 #define SPI_ERROR_CRC 0x00000002 /* CRC error */ 84 #define SPI_ERROR_OVR 0x00000004 /* OVR error */ 85 #define SPI_ERROR_FRE 0x00000008 /* FRE error */ 86 #define SPI_ERROR_DMA 0x00000010 /* DMA transfer error */ 87 #define SPI_ERROR_TIMEOUT 0x00000020 89 88 90 89 /* 91 90 * SPIワークモード定義 92 91 */ 93 #define SPI_WORK_MODE_0 94 #define SPI_WORK_MODE_1 95 #define SPI_WORK_MODE_2 96 #define SPI_WORK_MODE_3 92 #define SPI_WORK_MODE_0 0x00000000 93 #define SPI_WORK_MODE_1 0x00000001 94 #define SPI_WORK_MODE_2 0x00000002 95 #define SPI_WORK_MODE_3 0x00000003 97 96 98 97 /* 99 98 * SPIフレームフォーマット定義 100 99 */ 101 #define SPI_FF_STANDARD 102 #define SPI_FF_DUAL 103 #define SPI_FF_QUAD 104 #define SPI_FF_OCTAL 100 #define SPI_FF_STANDARD 0x00000000 101 #define SPI_FF_DUAL 0x00000001 102 #define SPI_FF_QUAD 0x00000002 103 #define SPI_FF_OCTAL 0x00000003 105 104 106 105 /* 107 106 * SPIインストラクションアドレスモード 108 107 */ 109 #define SPI_AITM_STANDARD 110 #define SPI_AITM_ADDR_STANDARD 108 #define SPI_AITM_STANDARD 0x00000000 109 #define SPI_AITM_ADDR_STANDARD 0x00000001 111 110 #define SPI_AITM_AS_FRAME_FORMAT 0x00000002 112 111 113 114 112 /* 115 113 * SPI転送モード定義 116 114 */ 117 #define SPI_TMOD_TRANS_RECV 118 #define SPI_TMOD_TRANS 119 #define SPI_TMOD_RECV 120 #define SPI_TMOD_EEROM 115 #define SPI_TMOD_TRANS_RECV 0x00000000 116 #define SPI_TMOD_TRANS 0x00000001 117 #define SPI_TMOD_RECV 0x00000002 118 #define SPI_TMOD_EEROM 0x00000003 121 119 122 120 /* 123 121 * SPI転送データ長定義 124 122 */ 125 #define SPI_TRANS_CHAR 126 #define SPI_TRANS_SHORT 127 #define SPI_TRANS_INT 123 #define SPI_TRANS_CHAR 0x01 124 #define SPI_TRANS_SHORT 0x02 125 #define SPI_TRANS_INT 0x04 128 126 129 127 /* 130 128 * SPI CS選択定義 131 129 */ 132 #define SPI_CHIP_SELECT_0 133 #define SPI_CHIP_SELECT_1 134 #define SPI_CHIP_SELECT_2 135 #define SPI_CHIP_SELECT_3 136 #define SPI_CHIP_SELECT_MAX 137 138 /*130 #define SPI_CHIP_SELECT_0 0x00 131 #define SPI_CHIP_SELECT_1 0x01 132 #define SPI_CHIP_SELECT_2 0x02 133 #define SPI_CHIP_SELECT_3 0x03 134 #define SPI_CHIP_SELECT_MAX 4 135 136 /* 139 137 * SPI 設定初期設定構造体 140 138 */ 141 typedef struct142 {143 uint32_tWorkMode;144 uint32_tFrameFormat;145 uint32_t DataSize;/* SPI転送データサイズ */146 uint32_t Prescaler;/* SPIクロック分周設定 */147 uint32_t SignBit;/* SPI MSB/LSB設定 */148 uint32_t InstLength;/* SPI Instraction Length */149 uint32_t AddrLength;/* SPI Address Length */150 uint32_t WaitCycles;/* SPI WaitCycles */151 uint32_t IATransMode;/* SPI 転送モード */152 int32_t SclkPin;/* SPI SCLK-PIN */153 int32_t MosiPin;/* SPI MOSI-PIN */154 int32_t MisoPin;/* SPI MISO-PIN */155 int32_t SsPin;/* SPI Slave Select-PIN */156 int32_t SsNo;/* SPI Slave Select-Number */157 int32_t TxDMAChannel;/* SPI TxDMAチャンネル */158 int32_t RxDMAChannel;/* SPI RxDMAチャンネル */159 int semid;/* SPI 通信用セマフォ値 */160 int semlock;/* SPI ロックセマフォ値 */161 int semdmaid;/* SPI DMA通信用セマフォ値 */162 }SPI_Init_t;163 164 /*139 typedef struct 140 { 141 uint32_t WorkMode; 142 uint32_t FrameFormat; 143 uint32_t DataSize; /* SPI転送データサイズ */ 144 uint32_t Prescaler; /* SPIクロック分周設定 */ 145 uint32_t SignBit; /* SPI MSB/LSB設定 */ 146 uint32_t InstLength; /* SPI Instraction Length */ 147 uint32_t AddrLength; /* SPI Address Length */ 148 uint32_t WaitCycles; /* SPI WaitCycles */ 149 uint32_t IATransMode; /* SPI 転送モード */ 150 int32_t SclkPin; /* SPI SCLK-PIN */ 151 int32_t MosiPin; /* SPI MOSI-PIN */ 152 int32_t MisoPin; /* SPI MISO-PIN */ 153 int32_t SsPin; /* SPI Slave Select-PIN */ 154 int32_t SsNo; /* SPI Slave Select-Number */ 155 int32_t TxDMAChannel; /* SPI TxDMAチャンネル */ 156 int32_t RxDMAChannel; /* SPI RxDMAチャンネル */ 157 int semid; /* SPI 通信用セマフォ値 */ 158 int semlock; /* SPI ロックセマフォ値 */ 159 int semdmaid; /* SPI DMA通信用セマフォ値 */ 160 } SPI_Init_t; 161 162 /* 165 163 * SPIハンドラ 166 164 */ 167 typedef struct _SPI_Handle_t 168 { 169 unsigned long base; /* SPI registers base address */ 170 SPI_Init_t Init; /* SPI communication parameters */ 171 uint8_t spi_num; 172 uint8_t dfs_offset; 173 uint8_t frf_offset; 174 uint8_t work_mode_offset; 175 uint8_t tmod_offset; 176 uint8_t dummy[3]; 177 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */ 178 uint32_t TxXferSize; /* SPI Tx transfer size */ 179 uint32_t TxXferCount; /* SPI Tx Transfer Counter */ 180 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */ 181 uint32_t RxXferSize; /* SPI Rx transfer size */ 182 uint32_t RxXferCount; /* SPI Rx Transfer Counter */ 183 DMA_Handle_t *hdmatx; /* SPI Tx DMA handle parameters */ 184 DMA_Handle_t *hdmarx; /* SPI Rx DMA handle parameters */ 185 uint16_t xmode; /* SPI Transfar mode */ 186 volatile uint16_t status; /* SPI communication state */ 187 volatile uint32_t ErrorCode; /* SPI Error code */ 188 }SPI_Handle_t; 189 190 191 extern SPI_Handle_t *spi_init(ID port, const SPI_Init_t *init); 192 extern ER spi_deinit(SPI_Handle_t *hspi); 193 extern ER spi_core_transmit(SPI_Handle_t *hspi, int8_t ss_no, uint8_t *pdata, uint16_t length); 194 extern ER spi_core_transmit_fill(SPI_Handle_t *hspi, int8_t ss_no, const uint32_t *tx_buff, size_t tx_len); 195 extern ER spi_core_receive(SPI_Handle_t *hspi, int8_t ss_no, void *rx_buff, size_t rx_len); 196 extern ER spi_core_transrecv(SPI_Handle_t *hspi, int8_t ss_no, const uint8_t *tx_buf, uint8_t *rx_buf, size_t len); 197 extern ER spi_transmit(SPI_Handle_t *hspi, uint8_t *pdata, uint16_t length); 198 extern ER spi_receive(SPI_Handle_t *hspi, uint8_t *pdata, uint16_t length); 199 extern ER spi_transrecv(SPI_Handle_t *hspi, uint8_t *ptxData, uint8_t *prxData, uint16_t length); 200 extern ER spi_wait(SPI_Handle_t *hspi, uint32_t timeout); 201 extern void spi_handler(SPI_Handle_t *hspi); 202 extern void spi_isr(intptr_t exinf); 203 extern DMA_Handle_t *spi_dmac_set_single_mode(SPI_Handle_t *hspi, 204 uint8_t rtx, 205 int8_t ss_no, 206 const void *src, void *dest, uint8_t src_inc, 207 uint8_t dest_inc, 208 uint8_t dmac_burst_size, 209 uint8_t dmac_trans_width, 210 size_t block_size); 211 extern ER spi_dmac_wait_done(DMA_Handle_t * hdma); 212 165 typedef struct _SPI_Handle_t 166 { 167 unsigned long base; /* SPI registers base address */ 168 SPI_Init_t Init; /* SPI communication parameters */ 169 uint8_t spi_num; 170 uint8_t dfs_offset; 171 uint8_t frf_offset; 172 uint8_t work_mode_offset; 173 uint8_t tmod_offset; 174 uint8_t dummy[3]; 175 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */ 176 uint32_t TxXferSize; /* SPI Tx transfer size */ 177 uint32_t TxXferCount; /* SPI Tx Transfer Counter */ 178 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */ 179 uint32_t RxXferSize; /* SPI Rx transfer size */ 180 uint32_t RxXferCount; /* SPI Rx Transfer Counter */ 181 DMA_Handle_t *hdmatx; /* SPI Tx DMA handle parameters */ 182 DMA_Handle_t *hdmarx; /* SPI Rx DMA handle parameters */ 183 uint16_t xmode; /* SPI Transfar mode */ 184 volatile uint16_t status; /* SPI communication state */ 185 volatile uint32_t ErrorCode; /* SPI Error code */ 186 } SPI_Handle_t; 187 188 extern SPI_Handle_t *spi_init(ID port, const SPI_Init_t *init); 189 extern ER spi_deinit(SPI_Handle_t *hspi); 190 extern ER spi_core_transmit(SPI_Handle_t *hspi, int8_t ss_no, uint8_t *pdata, uint16_t length); 191 extern ER spi_core_transmit_fill(SPI_Handle_t *hspi, int8_t ss_no, const uint32_t *tx_buff, size_t tx_len); 192 extern ER spi_core_receive(SPI_Handle_t *hspi, int8_t ss_no, void *rx_buff, size_t rx_len); 193 extern ER spi_core_transrecv(SPI_Handle_t *hspi, int8_t ss_no, const uint8_t *tx_buf, uint8_t *rx_buf, size_t len); 194 extern ER spi_transmit(SPI_Handle_t *hspi, uint8_t *pdata, uint16_t length); 195 extern ER spi_receive(SPI_Handle_t *hspi, uint8_t *pdata, uint16_t length); 196 extern ER spi_transrecv(SPI_Handle_t *hspi, uint8_t *ptxData, uint8_t *prxData, uint16_t length); 197 extern ER spi_wait(SPI_Handle_t *hspi, uint32_t timeout); 198 extern void spi_handler(SPI_Handle_t *hspi); 199 extern void spi_isr(intptr_t exinf); 200 extern DMA_Handle_t *spi_dmac_set_single_mode(SPI_Handle_t *hspi, 201 uint8_t rtx, 202 int8_t ss_no, 203 const void *src, void *dest, uint8_t src_inc, 204 uint8_t dest_inc, 205 uint8_t dmac_burst_size, 206 uint8_t dmac_trans_width, 207 size_t block_size); 208 extern ER spi_dmac_wait_done(DMA_Handle_t *hdma); 213 209 214 210 #ifdef __cplusplus … … 216 212 #endif 217 213 218 #endif /* _SPI_H_ */ 219 214 #endif /* _SPI_H_ */
Note:
See TracChangeset
for help on using the changeset viewer.