Changeset 429 for EcnlProtoTool/trunk/asp3_dcre/mbed/hal/spi_api.h
- Timestamp:
- Jul 3, 2020, 7:19:17 PM (4 years ago)
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- 1 edited
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EcnlProtoTool/trunk/asp3_dcre/mbed/hal/spi_api.h
r321 r429 1 2 /** \addtogroup hal */ 3 /** @{*/ 1 4 /* mbed Microcontroller Library 2 5 * Copyright (c) 2006-2013 ARM Limited … … 18 21 19 22 #include "device.h" 20 #include " dma_api.h"21 #include " buffer.h"23 #include "hal/dma_api.h" 24 #include "hal/buffer.h" 22 25 23 26 #if DEVICE_SPI … … 28 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW) 29 32 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred 31 34 32 35 #define SPI_FILL_WORD (0xFFFF) 36 #define SPI_FILL_CHAR (0xFF) 33 37 34 38 #if DEVICE_SPI_ASYNCH 35 /** Asynch spi halstructure39 /** Asynch SPI HAL structure 36 40 */ 37 41 typedef struct { 38 struct spi_s spi; /**< Target specific spistructure */42 struct spi_s spi; /**< Target specific SPI structure */ 39 43 struct buffer_s tx_buff; /**< Tx buffer */ 40 44 struct buffer_s rx_buff; /**< Rx buffer */ … … 42 46 43 47 #else 44 /** Non-asynch spi halstructure48 /** Non-asynch SPI HAL structure 45 49 */ 46 50 typedef struct spi_s spi_t; … … 53 57 54 58 /** 55 * \defgroup GeneralSPI SPI Configuration Functions59 * \defgroup hal_GeneralSPI SPI Configuration Functions 56 60 * @{ 57 61 */ … … 82 86 /** Configure the SPI format 83 87 * 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode 88 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode. 89 * The default bit order is MSB. 85 90 * @param[in,out] obj The SPI object to configure 86 91 * @param[in] bits The number of bits per frame … … 113 118 int spi_master_write(spi_t *obj, int value); 114 119 120 /** Write a block out in master mode and receive a value 121 * 122 * The total number of bytes sent and received will be the maximum of 123 * tx_length and rx_length. The bytes written will be padded with the 124 * value 0xff. 125 * 126 * @param[in] obj The SPI peripheral to use for sending 127 * @param[in] tx_buffer Pointer to the byte-array of data to write to the device 128 * @param[in] tx_length Number of bytes to write, may be zero 129 * @param[in] rx_buffer Pointer to the byte-array of data to read from the device 130 * @param[in] rx_length Number of bytes to read, may be zero 131 * @param[in] write_fill Default data transmitted while performing a read 132 * @returns 133 * The number of bytes written and read from the device. This is 134 * maximum of tx_length and rx_length. 135 */ 136 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill); 137 115 138 /** Check if a value is available to read 116 139 * … … 160 183 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff 161 184 * 162 * @param[in] obj The SPI object whichholds the transfer information163 * @param[in] tx The buffer to send164 * @param[in] tx_length The number of words to transmit165 * @param[in] rx The buffer to receive166 * @param[in] rx_length The number of words to receive185 * @param[in] obj The SPI object that holds the transfer information 186 * @param[in] tx The transmit buffer 187 * @param[in] tx_length The number of bytes to transmit 188 * @param[in] rx The receive buffer 189 * @param[in] rx_length The number of bytes to receive 167 190 * @param[in] bit_width The bit width of buffer words 168 191 * @param[in] event The logical OR of events to be registered … … 176 199 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination 177 200 * conditions, such as buffer overflows or transfer complete. 178 * @param[in] obj The SPI object whichholds the transfer information179 * @return event flags if a transfer termination condition was met or 0 otherwise.201 * @param[in] obj The SPI object that holds the transfer information 202 * @return Event flags if a transfer termination condition was met; otherwise 0. 180 203 */ 181 204 uint32_t spi_irq_handler_asynch(spi_t *obj); 182 205 183 /** Attempts to determine if the SPI peripheral is already in use .206 /** Attempts to determine if the SPI peripheral is already in use 184 207 * 185 208 * If a temporary DMA channel has been allocated, peripheral is in use. … … 190 213 * there are any bytes in the FIFOs. 191 214 * @param[in] obj The SPI object to check for activity 192 * @return non-zero if the SPI port is active or zero if it is not.215 * @return Non-zero if the SPI port is active or zero if it is not. 193 216 */ 194 217 uint8_t spi_active(spi_t *obj); … … 212 235 213 236 #endif // MBED_SPI_API_H 237 238 /** @}*/
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