Ignore:
Timestamp:
Jul 3, 2020, 7:19:17 PM (4 years ago)
Author:
coas-nagasima
Message:

ASP3, TINET, mbed を更新

File:
1 edited

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  • EcnlProtoTool/trunk/asp3_dcre/mbed/hal/spi_api.h

    r321 r429  
     1
     2/** \addtogroup hal */
     3/** @{*/
    14/* mbed Microcontroller Library
    25 * Copyright (c) 2006-2013 ARM Limited
     
    1821
    1922#include "device.h"
    20 #include "dma_api.h"
    21 #include "buffer.h"
     23#include "hal/dma_api.h"
     24#include "hal/buffer.h"
    2225
    2326#if DEVICE_SPI
     
    2831#define SPI_EVENT_ALL         (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
    2932
    30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
     33#define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
    3134
    3235#define SPI_FILL_WORD         (0xFFFF)
     36#define SPI_FILL_CHAR         (0xFF)
    3337
    3438#if DEVICE_SPI_ASYNCH
    35 /** Asynch spi hal structure
     39/** Asynch SPI HAL structure
    3640 */
    3741typedef struct {
    38     struct spi_s spi;        /**< Target specific spi structure */
     42    struct spi_s spi;        /**< Target specific SPI structure */
    3943    struct buffer_s tx_buff; /**< Tx buffer */
    4044    struct buffer_s rx_buff; /**< Rx buffer */
     
    4246
    4347#else
    44 /** Non-asynch spi hal structure
     48/** Non-asynch SPI HAL structure
    4549 */
    4650typedef struct spi_s spi_t;
     
    5357
    5458/**
    55  * \defgroup GeneralSPI SPI Configuration Functions
     59 * \defgroup hal_GeneralSPI SPI Configuration Functions
    5660 * @{
    5761 */
     
    8286/** Configure the SPI format
    8387 *
    84  * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
     88 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
     89 * The default bit order is MSB.
    8590 * @param[in,out] obj   The SPI object to configure
    8691 * @param[in]     bits  The number of bits per frame
     
    113118int  spi_master_write(spi_t *obj, int value);
    114119
     120/** Write a block out in master mode and receive a value
     121 *
     122 *  The total number of bytes sent and received will be the maximum of
     123 *  tx_length and rx_length. The bytes written will be padded with the
     124 *  value 0xff.
     125 *
     126 * @param[in] obj        The SPI peripheral to use for sending
     127 * @param[in] tx_buffer  Pointer to the byte-array of data to write to the device
     128 * @param[in] tx_length  Number of bytes to write, may be zero
     129 * @param[in] rx_buffer  Pointer to the byte-array of data to read from the device
     130 * @param[in] rx_length  Number of bytes to read, may be zero
     131 * @param[in] write_fill Default data transmitted while performing a read
     132 * @returns
     133 *      The number of bytes written and read from the device. This is
     134 *      maximum of tx_length and rx_length.
     135 */
     136int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill);
     137
    115138/** Check if a value is available to read
    116139 *
     
    160183/** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
    161184 *
    162  * @param[in] obj       The SPI object which holds the transfer information
    163  * @param[in] tx        The buffer to send
    164  * @param[in] tx_length The number of words to transmit
    165  * @param[in] rx        The buffer to receive
    166  * @param[in] rx_length The number of words to receive
     185 * @param[in] obj       The SPI object that holds the transfer information
     186 * @param[in] tx        The transmit buffer
     187 * @param[in] tx_length The number of bytes to transmit
     188 * @param[in] rx        The receive buffer
     189 * @param[in] rx_length The number of bytes to receive
    167190 * @param[in] bit_width The bit width of buffer words
    168191 * @param[in] event     The logical OR of events to be registered
     
    176199 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
    177200 * conditions, such as buffer overflows or transfer complete.
    178  * @param[in] obj     The SPI object which holds the transfer information
    179  * @return event flags if a transfer termination condition was met or 0 otherwise.
     201 * @param[in] obj     The SPI object that holds the transfer information
     202 * @return Event flags if a transfer termination condition was met; otherwise 0.
    180203 */
    181204uint32_t spi_irq_handler_asynch(spi_t *obj);
    182205
    183 /** Attempts to determine if the SPI peripheral is already in use.
     206/** Attempts to determine if the SPI peripheral is already in use
    184207 *
    185208 * If a temporary DMA channel has been allocated, peripheral is in use.
     
    190213 * there are any bytes in the FIFOs.
    191214 * @param[in] obj The SPI object to check for activity
    192  * @return non-zero if the SPI port is active or zero if it is not.
     215 * @return Non-zero if the SPI port is active or zero if it is not.
    193216 */
    194217uint8_t spi_active(spi_t *obj);
     
    212235
    213236#endif // MBED_SPI_API_H
     237
     238/** @}*/
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