[128] | 1 | //////////////////////////////////////////////////////////////////////
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| 2 | //// ////
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| 3 | //// can_rxmboxacf.v ////
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| 4 | //// ////
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| 5 | //// ////
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| 6 | //// This file is part of the CAN Protocol Controller ////
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| 7 | //// ////
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| 8 | //// ////
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| 9 | //// Author(s): ////
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| 10 | //// Center for Embedded Computing Systems ////
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| 11 | //// Graduate School of Information Science, Nagoya Univ., JAPAN ////
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| 12 | //// ////
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| 13 | //// ////
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| 14 | //// All additional information is available in the README.txt ////
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| 15 | //// file. ////
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| 16 | //// ////
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| 17 | //////////////////////////////////////////////////////////////////////
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| 18 | //// ////
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| 19 | //// Copyright (C) 2011-2013 Authors ////
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| 20 | //// ////
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| 21 | //// This source file may be used and distributed without ////
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| 22 | //// restriction provided that this copyright statement is not ////
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| 23 | //// removed from the file and that any derivative work contains ////
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| 24 | //// the original copyright notice and the associated disclaimer. ////
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| 25 | //// ////
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| 26 | //// This source file is free software; you can redistribute it ////
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| 27 | //// and/or modify it under the terms of the GNU Lesser General ////
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| 28 | //// Public License as published by the Free Software Foundation; ////
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| 29 | //// either version 2.1 of the License, or (at your option) any ////
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| 30 | //// later version. ////
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| 31 | //// ////
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| 32 | //// This source is distributed in the hope that it will be ////
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| 33 | //// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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| 34 | //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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| 35 | //// PURPOSE. See the GNU Lesser General Public License for more ////
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| 36 | //// details. ////
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| 37 | //// ////
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| 38 | //// You should have received a copy of the GNU Lesser General ////
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| 39 | //// Public License along with this source; if not, download it ////
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| 40 | //// from http://www.opencores.org/lgpl.shtml ////
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| 41 | //// ////
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| 42 | //// The CAN protocol is developed by Robert Bosch GmbH and ////
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| 43 | //// protected by patents. Anybody who wants to implement this ////
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| 44 | //// CAN IP core on silicon has to obtain a CAN protocol license ////
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| 45 | //// from Bosch. ////
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| 46 | //// ////
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| 47 | //////////////////////////////////////////////////////////////////////
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| 48 | //
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| 49 |
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| 50 | // synopsys translate_off
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| 51 | `include "timescale.v"
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| 52 | // synopsys translate_on
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| 53 | `include "can_defines.v"
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| 54 |
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| 55 | module can_rxmboxacf(
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| 56 | clk,
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| 57 | rst,
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| 58 | sample_point,
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| 59 |
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| 60 | rxwait,
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| 61 | rxcmp,
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| 62 |
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| 63 | reset_mode,
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| 64 | acceptance_filter_mode,
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| 65 | extended_mode,
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| 66 |
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| 67 | rxmask,
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| 68 | rxcode,
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| 69 |
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| 70 | rxdatawin,
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| 71 |
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| 72 | rx_dt,
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| 73 | rx_we,
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| 74 |
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| 75 | rxmsgdata,
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| 76 | rx_we_ff
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| 77 | // input wire clk,
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| 78 | // input wire rst,
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| 79 | // input wire sample_point,
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| 80 | //
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| 81 | // input wire [31:0] rxwait,
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| 82 | // input wire [31:0] rxcmp,
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| 83 | //
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| 84 | // input wire reset_mode,
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| 85 | // input wire acceptance_filter_mode,
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| 86 | // input wire extended_mode,
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| 87 | //
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| 88 | // input wire [1023:0] rxmask,
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| 89 | // input wire [1023:0] rxcode,
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| 90 | //
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| 91 | // input wire [ 4:0] rxdatawin,
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| 92 | //
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| 93 | // input wire [ 127:0] rx_dt,
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| 94 | // input rx_we,
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| 95 | //
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| 96 | // output reg [ 127:0] rxmsgdata,
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| 97 | // output wire [ 31:0] rx_we_ff
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| 98 | );
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| 99 |
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| 100 | parameter Tp = 1;
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| 101 | parameter TXMBOX_DEPTH = 1; /* 1(Min=2) - 4(Max=16) */
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| 102 | parameter RXMBOX_DEPTH = 1; /* 1(Min=2) - 5(Max=32) */
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| 103 | localparam TXMBOX_BITS = (TXMBOX_DEPTH > 4) ? 16 : (2**TXMBOX_DEPTH);
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| 104 | localparam RXMBOX_BITS = (RXMBOX_DEPTH > 5) ? 32 :(2**RXMBOX_DEPTH);
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| 105 |
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| 106 | input wire clk;
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| 107 | input wire rst;
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| 108 | input wire sample_point;
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| 109 |
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| 110 | input wire [RXMBOX_BITS-1:0] rxwait;
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| 111 | input wire [RXMBOX_BITS-1:0] rxcmp;
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| 112 |
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| 113 | input wire reset_mode;
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| 114 | input wire acceptance_filter_mode;
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| 115 | input wire extended_mode;
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| 116 |
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| 117 | //input wire [RXMBOX_BITS*32-1:0] rxmask;
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| 118 | //input wire [RXMBOX_BITS*32-1:0] rxcode;
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| 119 | input wire [1023:0] rxmask;
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| 120 | input wire [1023:0] rxcode;
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| 121 |
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| 122 | input wire [RXMBOX_DEPTH-1:0] rxdatawin;
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| 123 | //input wire [ 4:0] rxdatawin;
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| 124 |
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| 125 | input wire [ 127:0] rx_dt;
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| 126 | input rx_we;
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| 127 |
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| 128 | output reg [ 127:0] rxmsgdata;
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| 129 | //output wire [31:0] rx_we_ff;
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| 130 | output wire [RXMBOX_BITS-1:0] rx_we_ff;
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| 131 |
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| 132 | wire id_ok;
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| 133 | reg [RXMBOX_BITS-1:0] rx_we_on,rx_we_on_q;
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| 134 | //reg [31:0] rx_we_on,rx_we_on_q;
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| 135 | wire [RXMBOX_BITS-1:0] rx_we_off;
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| 136 | //wire [31:0] rx_we_off;
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| 137 | reg [2:0] cnt;
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| 138 | reg [RXMBOX_BITS-1:0] rx_en;
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| 139 | //reg [31:0] rx_en;
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| 140 | reg [31:0] rxcode_in;
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| 141 | reg [31:0] rxmask_in;
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| 142 | reg timovr;
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| 143 | reg [RXMBOX_DEPTH-1:0] rmbox_cnt;
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| 144 | //reg [4:0] rmbox_cnt;
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| 145 | wire [28:0] id;
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| 146 |
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| 147 | always @ (posedge clk or posedge rst)
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| 148 | begin
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| 149 | if(rst) rmbox_cnt <= {(RXMBOX_DEPTH){1'h0}};
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| 150 | else if(rx_we) rmbox_cnt <=#Tp 1'b1;
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| 151 | else if(~|rmbox_cnt) rmbox_cnt <=#Tp rmbox_cnt;
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| 152 | else rmbox_cnt <=#Tp rmbox_cnt + 1'b1;
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| 153 | // if(rst) rmbox_cnt <= 5'h0;
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| 154 | // else if(rx_we) rmbox_cnt <=#Tp 5'h1;
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| 155 | // else if(~|rmbox_cnt) rmbox_cnt <=#Tp rmbox_cnt;
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| 156 | // else rmbox_cnt <=#Tp rmbox_cnt+ 5'h1;
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| 157 | end
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| 158 |
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| 159 | wire no_byte0 = rx_dt[1*32+4] | (rx_dt[1*32+3:1*32]<4'h1); //rtr1 | (data_len<4'h1);
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| 160 | wire no_byte1 = rx_dt[1*32+4] | (rx_dt[1*32+3:1*32]<4'h2); //rtr1 | (data_len<4'h2);
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| 161 | assign id = (rx_dt[0*32+31])? rx_dt[0*32+28:0*32]: {18'h0,rx_dt[0*32+28:0*32+18]};
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| 162 |
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| 163 | always @ (*) begin
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| 164 | if (rmbox_cnt == 0) begin rxcode_in = rxcode[ 0*32+31: 0*32]; rxmask_in = rxmask[ 0*32+31: 0*32]; end
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| 165 | else if (rmbox_cnt == 1) begin rxcode_in = rxcode[ 1*32+31: 1*32]; rxmask_in = rxmask[ 1*32+31: 1*32]; end
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| 166 | else if (rmbox_cnt == 2) begin rxcode_in = rxcode[ 2*32+31: 2*32]; rxmask_in = rxmask[ 2*32+31: 2*32]; end
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| 167 | else if (rmbox_cnt == 3) begin rxcode_in = rxcode[ 3*32+31: 3*32]; rxmask_in = rxmask[ 3*32+31: 3*32]; end
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| 168 | else if (rmbox_cnt == 4) begin rxcode_in = rxcode[ 4*32+31: 4*32]; rxmask_in = rxmask[ 4*32+31: 4*32]; end
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| 169 | else if (rmbox_cnt == 5) begin rxcode_in = rxcode[ 5*32+31: 5*32]; rxmask_in = rxmask[ 5*32+31: 5*32]; end
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| 170 | else if (rmbox_cnt == 6) begin rxcode_in = rxcode[ 6*32+31: 6*32]; rxmask_in = rxmask[ 6*32+31: 6*32]; end
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| 171 | else if (rmbox_cnt == 7) begin rxcode_in = rxcode[ 7*32+31: 7*32]; rxmask_in = rxmask[ 7*32+31: 7*32]; end
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| 172 | else if (rmbox_cnt == 8) begin rxcode_in = rxcode[ 8*32+31: 8*32]; rxmask_in = rxmask[ 8*32+31: 8*32]; end
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| 173 | else if (rmbox_cnt == 9) begin rxcode_in = rxcode[ 9*32+31: 9*32]; rxmask_in = rxmask[ 9*32+31: 9*32]; end
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| 174 | else if (rmbox_cnt == 10) begin rxcode_in = rxcode[10*32+31:10*32]; rxmask_in = rxmask[10*32+31:10*32]; end
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| 175 | else if (rmbox_cnt == 11) begin rxcode_in = rxcode[11*32+31:11*32]; rxmask_in = rxmask[11*32+31:11*32]; end
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| 176 | else if (rmbox_cnt == 12) begin rxcode_in = rxcode[12*32+31:12*32]; rxmask_in = rxmask[12*32+31:12*32]; end
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| 177 | else if (rmbox_cnt == 13) begin rxcode_in = rxcode[13*32+31:13*32]; rxmask_in = rxmask[13*32+31:13*32]; end
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| 178 | else if (rmbox_cnt == 14) begin rxcode_in = rxcode[14*32+31:14*32]; rxmask_in = rxmask[14*32+31:14*32]; end
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| 179 | else if (rmbox_cnt == 15) begin rxcode_in = rxcode[15*32+31:15*32]; rxmask_in = rxmask[15*32+31:15*32]; end
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| 180 | else if (rmbox_cnt == 16) begin rxcode_in = rxcode[16*32+31:16*32]; rxmask_in = rxmask[16*32+31:16*32]; end
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| 181 | else if (rmbox_cnt == 17) begin rxcode_in = rxcode[17*32+31:17*32]; rxmask_in = rxmask[17*32+31:17*32]; end
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| 182 | else if (rmbox_cnt == 18) begin rxcode_in = rxcode[18*32+31:18*32]; rxmask_in = rxmask[18*32+31:18*32]; end
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| 183 | else if (rmbox_cnt == 19) begin rxcode_in = rxcode[19*32+31:19*32]; rxmask_in = rxmask[19*32+31:19*32]; end
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| 184 | else if (rmbox_cnt == 20) begin rxcode_in = rxcode[20*32+31:20*32]; rxmask_in = rxmask[20*32+31:20*32]; end
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| 185 | else if (rmbox_cnt == 21) begin rxcode_in = rxcode[21*32+31:21*32]; rxmask_in = rxmask[21*32+31:21*32]; end
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| 186 | else if (rmbox_cnt == 22) begin rxcode_in = rxcode[22*32+31:22*32]; rxmask_in = rxmask[22*32+31:22*32]; end
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| 187 | else if (rmbox_cnt == 23) begin rxcode_in = rxcode[23*32+31:23*32]; rxmask_in = rxmask[23*32+31:23*32]; end
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| 188 | else if (rmbox_cnt == 24) begin rxcode_in = rxcode[24*32+31:24*32]; rxmask_in = rxmask[24*32+31:24*32]; end
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| 189 | else if (rmbox_cnt == 25) begin rxcode_in = rxcode[25*32+31:25*32]; rxmask_in = rxmask[25*32+31:25*32]; end
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| 190 | else if (rmbox_cnt == 26) begin rxcode_in = rxcode[26*32+31:26*32]; rxmask_in = rxmask[26*32+31:26*32]; end
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| 191 | else if (rmbox_cnt == 27) begin rxcode_in = rxcode[27*32+31:27*32]; rxmask_in = rxmask[27*32+31:27*32]; end
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| 192 | else if (rmbox_cnt == 28) begin rxcode_in = rxcode[28*32+31:28*32]; rxmask_in = rxmask[28*32+31:28*32]; end
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| 193 | else if (rmbox_cnt == 29) begin rxcode_in = rxcode[29*32+31:29*32]; rxmask_in = rxmask[29*32+31:29*32]; end
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| 194 | else if (rmbox_cnt == 30) begin rxcode_in = rxcode[30*32+31:30*32]; rxmask_in = rxmask[30*32+31:30*32]; end
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| 195 | else if (rmbox_cnt == 31) begin rxcode_in = rxcode[31*32+31:31*32]; rxmask_in = rxmask[31*32+31:31*32]; end
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| 196 | else if (rmbox_cnt == 32) begin rxcode_in = rxcode[32*32+31:32*32]; rxmask_in = rxmask[32*32+31:32*32]; end
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| 197 | end
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| 198 |
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| 199 | //always @ (*)
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| 200 | //begin
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| 201 | // case(rmbox_cnt)
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| 202 | // 5'h00: begin rxcode_in = rxcode[ 0*32+31: 0*32]; rxmask_in = rxmask[ 0*32+31: 0*32]; end
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| 203 | // 5'h01: begin rxcode_in = rxcode[ 1*32+31: 1*32]; rxmask_in = rxmask[ 1*32+31: 1*32]; end
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| 204 | // 5'h02: begin rxcode_in = rxcode[ 2*32+31: 2*32]; rxmask_in = rxmask[ 2*32+31: 2*32]; end
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| 205 | // 5'h03: begin rxcode_in = rxcode[ 3*32+31: 3*32]; rxmask_in = rxmask[ 3*32+31: 3*32]; end
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| 206 | // 5'h04: begin rxcode_in = rxcode[ 4*32+31: 4*32]; rxmask_in = rxmask[ 4*32+31: 4*32]; end
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| 207 | // 5'h05: begin rxcode_in = rxcode[ 5*32+31: 5*32]; rxmask_in = rxmask[ 5*32+31: 5*32]; end
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| 208 | // 5'h06: begin rxcode_in = rxcode[ 6*32+31: 6*32]; rxmask_in = rxmask[ 6*32+31: 6*32]; end
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| 209 | // 5'h07: begin rxcode_in = rxcode[ 7*32+31: 7*32]; rxmask_in = rxmask[ 7*32+31: 7*32]; end
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| 210 | // 5'h08: begin rxcode_in = rxcode[ 8*32+31: 8*32]; rxmask_in = rxmask[ 8*32+31: 8*32]; end
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| 211 | // 5'h09: begin rxcode_in = rxcode[ 9*32+31: 9*32]; rxmask_in = rxmask[ 9*32+31: 9*32]; end
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| 212 | // 5'h0A: begin rxcode_in = rxcode[10*32+31:10*32]; rxmask_in = rxmask[10*32+31:10*32]; end
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| 213 | // 5'h0B: begin rxcode_in = rxcode[11*32+31:11*32]; rxmask_in = rxmask[11*32+31:11*32]; end
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| 214 | // 5'h0C: begin rxcode_in = rxcode[12*32+31:12*32]; rxmask_in = rxmask[12*32+31:12*32]; end
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| 215 | // 5'h0D: begin rxcode_in = rxcode[13*32+31:13*32]; rxmask_in = rxmask[13*32+31:13*32]; end
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| 216 | // 5'h0E: begin rxcode_in = rxcode[14*32+31:14*32]; rxmask_in = rxmask[14*32+31:14*32]; end
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| 217 | // 5'h0F: begin rxcode_in = rxcode[15*32+31:15*32]; rxmask_in = rxmask[15*32+31:15*32]; end
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| 218 | // 5'h10: begin rxcode_in = rxcode[16*32+31:16*32]; rxmask_in = rxmask[16*32+31:16*32]; end
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| 219 | // 5'h11: begin rxcode_in = rxcode[17*32+31:17*32]; rxmask_in = rxmask[17*32+31:17*32]; end
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| 220 | // 5'h12: begin rxcode_in = rxcode[18*32+31:18*32]; rxmask_in = rxmask[18*32+31:18*32]; end
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| 221 | // 5'h13: begin rxcode_in = rxcode[19*32+31:19*32]; rxmask_in = rxmask[19*32+31:19*32]; end
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| 222 | // 5'h14: begin rxcode_in = rxcode[20*32+31:20*32]; rxmask_in = rxmask[20*32+31:20*32]; end
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| 223 | // 5'h15: begin rxcode_in = rxcode[21*32+31:21*32]; rxmask_in = rxmask[21*32+31:21*32]; end
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| 224 | // 5'h16: begin rxcode_in = rxcode[22*32+31:22*32]; rxmask_in = rxmask[22*32+31:22*32]; end
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| 225 | // 5'h17: begin rxcode_in = rxcode[23*32+31:23*32]; rxmask_in = rxmask[23*32+31:23*32]; end
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| 226 | // 5'h18: begin rxcode_in = rxcode[24*32+31:24*32]; rxmask_in = rxmask[24*32+31:24*32]; end
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| 227 | // 5'h19: begin rxcode_in = rxcode[25*32+31:25*32]; rxmask_in = rxmask[25*32+31:25*32]; end
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| 228 | // 5'h1A: begin rxcode_in = rxcode[26*32+31:26*32]; rxmask_in = rxmask[26*32+31:26*32]; end
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| 229 | // 5'h1B: begin rxcode_in = rxcode[27*32+31:27*32]; rxmask_in = rxmask[27*32+31:27*32]; end
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| 230 | // 5'h1C: begin rxcode_in = rxcode[28*32+31:28*32]; rxmask_in = rxmask[28*32+31:28*32]; end
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| 231 | // 5'h1D: begin rxcode_in = rxcode[29*32+31:29*32]; rxmask_in = rxmask[29*32+31:29*32]; end
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| 232 | // 5'h1E: begin rxcode_in = rxcode[30*32+31:30*32]; rxmask_in = rxmask[30*32+31:30*32]; end
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| 233 | // 5'h1F: begin rxcode_in = rxcode[31*32+31:31*32]; rxmask_in = rxmask[31*32+31:31*32]; end
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| 234 | // endcase
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| 235 | //end
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| 236 |
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| 237 |
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| 238 | can_acf i_can_acf
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| 239 | (
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| 240 | .clk(clk),
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| 241 | .rst(rst),
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| 242 |
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| 243 | .id(id),
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| 244 |
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| 245 | /* Mode register */
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| 246 | .reset_mode(1'h0),
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| 247 | .acceptance_filter_mode(acceptance_filter_mode),
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| 248 |
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| 249 | // Clock Divider register
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| 250 | .extended_mode(extended_mode),
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| 251 |
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| 252 | /* This section is for BASIC and EXTENDED mode */
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| 253 | /* Acceptance code register */
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| 254 | .acceptance_code_0(rxcode_in[3*8+7:3*8]),
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| 255 |
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| 256 | /* Acceptance mask register */
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| 257 | .acceptance_mask_0(rxmask_in[3*8+7:3*8]),
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| 258 | /* End: This section is for BASIC and EXTENDED mode */
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| 259 |
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| 260 | /* This section is for EXTENDED mode */
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| 261 | /* Acceptance code register */
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| 262 | .acceptance_code_1(rxcode_in[2*8+7:2*8]),
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| 263 | .acceptance_code_2(rxcode_in[1*8+7:1*8]),
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| 264 | .acceptance_code_3(rxcode_in[0*8+7:0*8]),
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| 265 |
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| 266 | /* Acceptance mask register */
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| 267 | .acceptance_mask_1(rxmask_in[2*8+7:2*8]),
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| 268 | .acceptance_mask_2(rxmask_in[1*8+7:1*8]),
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| 269 | .acceptance_mask_3(rxmask_in[0*8+7:0*8]),
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| 270 | /* End: This section is for EXTENDED mode */
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| 271 |
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| 272 | .go_rx_crc_lim(1'h1),
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| 273 | .go_rx_inter(1'h0),
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| 274 | .go_error_frame(1'h0),
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| 275 |
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| 276 | .data0(rx_dt[2*32+0*8+7:2*32+0*8]),
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| 277 | .data1(rx_dt[2*32+1*8+7:2*32+1*8]),
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| 278 | .rtr1(rx_dt[1*32+4]),
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| 279 | .rtr2(rx_dt[1*32+4]),
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| 280 | .ide(rx_dt[0*32+31]),
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| 281 | .no_byte0(no_byte0),
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| 282 | .no_byte1(no_byte1),
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| 283 |
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| 284 | .id_ok(id_ok)
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| 285 |
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| 286 | );
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| 287 |
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| 288 | generate
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| 289 | genvar i;
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| 290 |
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| 291 | for (i=0; i<RXMBOX_BITS; i=i+1) begin :msgbox_afc
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| 292 | // for (i=0; i<32; i=i+1) begin :msgbox_afc
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| 293 |
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| 294 | assign rx_we_off[i] = rx_we_on[i] & (timovr | ~rxcmp[i]| (rxcmp[i] & ~rxwait[i]));
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| 295 |
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| 296 | if(i==0)
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| 297 | begin
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| 298 | always @ (posedge clk or posedge rst)
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| 299 | begin
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| 300 | if(rst) rx_we_on[i] <= 1'h0;
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| 301 | else if(id_ok & rx_en[i]) rx_we_on[i] <=#Tp 1'h1;
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| 302 | else if(rx_we_off[i]) rx_we_on[i] <=#Tp 1'h0;
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| 303 | end
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| 304 | end
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| 305 | else
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| 306 | begin
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| 307 | always @ (posedge clk or posedge rst)
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| 308 | begin
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| 309 | if(rst) rx_we_on[i] <= 1'h0;
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| 310 | else if(id_ok & rx_en[i]) rx_we_on[i] <=#Tp 1'h1;
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| 311 | else if(rx_we_off[i]) rx_we_on[i] <=#Tp (|rx_we_off[i-1:0])? rx_we_on[i]: 1'h0;
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| 312 | end
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| 313 | end
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| 314 |
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| 315 | end //for
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| 316 |
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| 317 | endgenerate
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| 318 |
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| 319 | reg [127:0] rx_dt_ff;
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| 320 | always @ (posedge clk)
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| 321 | begin
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| 322 | rx_dt_ff <=#Tp (rx_we)? rx_dt: rx_dt_ff;
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| 323 | rx_en <=#Tp {rx_en[RXMBOX_BITS-2:0],rx_we};
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| 324 | // rx_en <=#Tp {rx_en[30:0],rx_we};
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| 325 | rx_we_on_q <=#Tp rx_we_on;
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| 326 | end
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| 327 |
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| 328 | always @ (posedge clk or posedge rst)
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| 329 | begin
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| 330 | if(rst) cnt <= 3'h0;
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| 331 | else if(rx_en[0]) cnt <=#Tp 3'h1;
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| 332 | else if(cnt == 0) cnt <=#Tp 3'h0;
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| 333 | else if(~|rx_we_on) cnt <=#Tp 3'h0;
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| 334 | else if(sample_point) cnt <=#Tp cnt+3'h1;
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| 335 | end
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| 336 |
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| 337 | assign rx_we_ff = (reset_mode)? {(RXMBOX_BITS-1){1'h0}}: ~rx_we_on & rx_we_on_q;
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| 338 | //assign rx_we_ff = (reset_mode)? 32'h0: ~rx_we_on & rx_we_on_q;
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| 339 |
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| 340 |
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| 341 | always @ (posedge clk or posedge rst)
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| 342 | begin
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| 343 | if(rst) timovr <= 1'h0;
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| 344 | else if(rx_we) timovr <=#Tp 1'h0;
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| 345 | else if(~|cnt & sample_point) timovr <=#Tp 1'h1;
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| 346 | end
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| 347 |
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| 348 | reg [127:0] rxdata [0:RXMBOX_BITS-1];
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| 349 | //reg [127:0] rxdata [0:31];
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| 350 | reg [4:0] waddr;
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| 351 |
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| 352 | function [4:0] match_lower_number;
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| 353 | input [RXMBOX_BITS-1:0] x;
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| 354 | reg [7:0] i;
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| 355 | begin
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| 356 | match_lower_number = 0;
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| 357 | for (i=0; i<RXMBOX_BITS; i=i+1) begin
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| 358 | if (x[i] && match_lower_number == 0) begin
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| 359 | match_lower_number = i;
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| 360 | end
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| 361 | end
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| 362 | end
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| 363 | endfunction
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| 364 |
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| 365 | always @ (*)
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| 366 | begin
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| 367 | waddr = match_lower_number(rx_we_ff);
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| 368 | end
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| 369 |
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| 370 | //always @ (*)
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| 371 | //begin
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| 372 | // if(rx_we_ff[00]) waddr = 5'h00;
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| 373 | // else if(rx_we_ff[01]) waddr = 5'h01;
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| 374 | // else if(rx_we_ff[02]) waddr = 5'h02;
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| 375 | // else if(rx_we_ff[03]) waddr = 5'h03;
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| 376 | // else if(rx_we_ff[04]) waddr = 5'h04;
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| 377 | // else if(rx_we_ff[05]) waddr = 5'h05;
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| 378 | // else if(rx_we_ff[06]) waddr = 5'h06;
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| 379 | // else if(rx_we_ff[07]) waddr = 5'h07;
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| 380 | // else if(rx_we_ff[08]) waddr = 5'h08;
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| 381 | // else if(rx_we_ff[09]) waddr = 5'h09;
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| 382 | // else if(rx_we_ff[10]) waddr = 5'h0A;
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| 383 | // else if(rx_we_ff[11]) waddr = 5'h0B;
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| 384 | // else if(rx_we_ff[12]) waddr = 5'h0C;
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| 385 | // else if(rx_we_ff[13]) waddr = 5'h0D;
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| 386 | // else if(rx_we_ff[14]) waddr = 5'h0E;
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| 387 | // else if(rx_we_ff[15]) waddr = 5'h0F;
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| 388 | // else if(rx_we_ff[16]) waddr = 5'h10;
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| 389 | // else if(rx_we_ff[17]) waddr = 5'h11;
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| 390 | // else if(rx_we_ff[18]) waddr = 5'h12;
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| 391 | // else if(rx_we_ff[19]) waddr = 5'h13;
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| 392 | // else if(rx_we_ff[20]) waddr = 5'h14;
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| 393 | // else if(rx_we_ff[21]) waddr = 5'h15;
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| 394 | // else if(rx_we_ff[22]) waddr = 5'h16;
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| 395 | // else if(rx_we_ff[23]) waddr = 5'h17;
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| 396 | // else if(rx_we_ff[24]) waddr = 5'h18;
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| 397 | // else if(rx_we_ff[25]) waddr = 5'h19;
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| 398 | // else if(rx_we_ff[26]) waddr = 5'h1A;
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| 399 | // else if(rx_we_ff[27]) waddr = 5'h1B;
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| 400 | // else if(rx_we_ff[28]) waddr = 5'h1C;
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| 401 | // else if(rx_we_ff[29]) waddr = 5'h1D;
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| 402 | // else if(rx_we_ff[30]) waddr = 5'h1E;
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| 403 | // else if(rx_we_ff[31]) waddr = 5'h1F;
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| 404 | // else waddr = 5'h00;
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| 405 | //end
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| 406 |
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| 407 |
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| 408 | integer j;
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| 409 | initial begin
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| 410 | // for(j=0;j<32;j=j+1) rxdata[j]=0;
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| 411 | for(j=0;j<RXMBOX_BITS;j=j+1) rxdata[j]=0;
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| 412 | end
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| 413 |
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| 414 |
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| 415 | always @ (posedge clk)
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| 416 | begin
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| 417 | if(|rx_we_ff) rxdata[waddr] <=#Tp rx_dt_ff;
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| 418 | rxmsgdata <=#Tp rxdata[rxdatawin];
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| 419 | end
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| 420 |
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| 421 |
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| 422 | endmodule
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