[303] | 1 | /**
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| 2 | ******************************************************************************
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| 3 | * @file stm32f4xx_hal_dma2d.c
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| 4 | * @author MCD Application Team
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| 5 | * @version V1.4.1
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| 6 | * @date 09-October-2015
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| 7 | * @brief DMA2D HAL module driver.
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| 8 | * This file provides firmware functions to manage the following
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| 9 | * functionalities of the DMA2D peripheral:
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| 10 | * + Initialization and de-initialization functions
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| 11 | * + IO operation functions
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| 12 | * + Peripheral Control functions
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| 13 | * + Peripheral State and Errors functions
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| 14 | *
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| 15 | @verbatim
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| 16 | ==============================================================================
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| 17 | ##### How to use this driver #####
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| 18 | ==============================================================================
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| 19 | [..]
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| 20 | (#) Program the required configuration through following parameters:
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| 21 | the Transfer Mode, the output color mode and the output offset using
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| 22 | HAL_DMA2D_Init() function.
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| 23 |
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| 24 | (#) Program the required configuration through following parameters:
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| 25 | the input color mode, the input color, input alpha value, alpha mode
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| 26 | and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
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| 27 | or/and background layer.
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| 28 |
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| 29 | *** Polling mode IO operation ***
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| 30 | =================================
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| 31 | [..]
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| 32 | (+) Configure the pdata, Destination and data length and Enable
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| 33 | the transfer using HAL_DMA2D_Start()
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| 34 | (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
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| 35 | user can specify the value of timeout according to his end application.
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| 36 |
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| 37 | *** Interrupt mode IO operation ***
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| 38 | ===================================
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| 39 | [..]
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| 40 | (#) Configure the pdata, Destination and data length and Enable
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| 41 | the transfer using HAL_DMA2D_Start_IT()
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| 42 | (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
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| 43 | (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
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| 44 | add his own function by customization of function pointer XferCpltCallback and
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| 45 | XferErrorCallback (i.e a member of DMA2D handle structure).
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| 46 |
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| 47 | -@- In Register-to-Memory transfer mode, the pdata parameter is the register
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| 48 | color, in Memory-to-memory or memory-to-memory with pixel format
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| 49 | conversion the pdata is the source address.
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| 50 |
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| 51 | -@- Configure the foreground source address, the background source address,
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| 52 | the Destination and data length and Enable the transfer using
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| 53 | HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
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| 54 | in interrupt mode.
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| 55 |
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| 56 | -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
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| 57 | are used if the memory to memory with blending transfer mode is selected.
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| 58 |
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| 59 | (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
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| 60 | HAL_DMA2D_EnableCLUT() functions.
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| 61 |
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| 62 | (#) Optionally, configure and enable LineInterrupt using the following function:
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| 63 | HAL_DMA2D_ProgramLineEvent().
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| 64 |
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| 65 | (#) The transfer can be suspended, continued and aborted using the following
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| 66 | functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
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| 67 |
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| 68 | (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
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| 69 |
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| 70 | *** DMA2D HAL driver macros list ***
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| 71 | =============================================
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| 72 | [..]
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| 73 | Below the list of most used macros in DMA2D HAL driver :
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| 74 |
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| 75 | (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
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| 76 | (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
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| 77 | (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
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| 78 | (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
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| 79 | (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
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| 80 | (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
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| 81 | (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
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| 82 |
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| 83 | [..]
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| 84 | (@) You can refer to the DMA2D HAL driver header file for more useful macros
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| 85 |
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| 86 | @endverbatim
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| 87 | ******************************************************************************
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| 88 | * @attention
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| 89 | *
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| 90 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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| 91 | *
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| 92 | * Redistribution and use in source and binary forms, with or without modification,
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| 93 | * are permitted provided that the following conditions are met:
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| 94 | * 1. Redistributions of source code must retain the above copyright notice,
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| 95 | * this list of conditions and the following disclaimer.
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| 96 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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| 97 | * this list of conditions and the following disclaimer in the documentation
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| 98 | * and/or other materials provided with the distribution.
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| 99 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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| 100 | * may be used to endorse or promote products derived from this software
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| 101 | * without specific prior written permission.
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| 102 | *
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| 103 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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| 104 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| 105 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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| 106 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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| 107 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| 108 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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| 109 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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| 110 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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| 111 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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| 112 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 113 | *
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| 114 | ******************************************************************************
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| 115 | */
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| 116 |
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| 117 | /* Includes ------------------------------------------------------------------*/
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| 118 | #include "stm32f4xx_hal.h"
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| 119 |
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| 120 | /** @addtogroup STM32F4xx_HAL_Driver
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| 121 | * @{
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| 122 | */
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| 123 | /** @addtogroup DMA2D
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| 124 | * @brief DMA2D HAL module driver
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| 125 | * @{
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| 126 | */
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| 127 |
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| 128 | #ifdef HAL_DMA2D_MODULE_ENABLED
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| 129 |
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| 130 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
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| 131 |
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| 132 | /* Private types -------------------------------------------------------------*/
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| 133 | /* Private define ------------------------------------------------------------*/
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| 134 | /** @addtogroup DMA2D_Private_Defines
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| 135 | * @{
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| 136 | */
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| 137 | #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
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| 138 | #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
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| 139 | /**
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| 140 | * @}
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| 141 | */
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| 142 |
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| 143 | /* Private variables ---------------------------------------------------------*/
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| 144 | /* Private constants ---------------------------------------------------------*/
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| 145 | /* Private macro -------------------------------------------------------------*/
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| 146 | /* Private function prototypes -----------------------------------------------*/
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| 147 | /** @addtogroup DMA2D_Private_Functions_Prototypes
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| 148 | * @{
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| 149 | */
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| 150 | static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
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| 151 | /**
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| 152 | * @}
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| 153 | */
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| 154 |
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| 155 | /* Private functions ---------------------------------------------------------*/
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| 156 | /* Exported functions --------------------------------------------------------*/
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| 157 | /** @addtogroup DMA2D_Exported_Functions
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| 158 | * @{
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| 159 | */
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| 160 |
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| 161 | /** @defgroup DMA2D_Group1 Initialization and Configuration functions
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| 162 | * @brief Initialization and Configuration functions
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| 163 | *
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| 164 | @verbatim
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| 165 | ===============================================================================
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| 166 | ##### Initialization and Configuration functions #####
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| 167 | ===============================================================================
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| 168 | [..] This section provides functions allowing to:
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| 169 | (+) Initialize and configure the DMA2D
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| 170 | (+) De-initialize the DMA2D
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| 171 |
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| 172 | @endverbatim
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| 173 | * @{
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| 174 | */
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| 175 |
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| 176 | /**
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| 177 | * @brief Initializes the DMA2D according to the specified
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| 178 | * parameters in the DMA2D_InitTypeDef and create the associated handle.
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| 179 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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| 180 | * the configuration information for the DMA2D.
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| 181 | * @retval HAL status
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| 182 | */
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| 183 | HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
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| 184 | {
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| 185 | uint32_t tmp = 0;
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| 186 |
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| 187 | /* Check the DMA2D peripheral state */
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| 188 | if(hdma2d == NULL)
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| 189 | {
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| 190 | return HAL_ERROR;
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| 191 | }
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| 192 |
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| 193 | /* Check the parameters */
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| 194 | assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
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| 195 | assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
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| 196 | assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
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| 197 | assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
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| 198 |
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| 199 | if(hdma2d->State == HAL_DMA2D_STATE_RESET)
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| 200 | {
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| 201 | /* Allocate lock resource and initialize it */
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| 202 | hdma2d->Lock = HAL_UNLOCKED;
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| 203 | /* Init the low level hardware */
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| 204 | HAL_DMA2D_MspInit(hdma2d);
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| 205 | }
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| 206 |
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| 207 | /* Change DMA2D peripheral state */
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| 208 | hdma2d->State = HAL_DMA2D_STATE_BUSY;
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| 209 |
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| 210 | /* DMA2D CR register configuration -------------------------------------------*/
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| 211 | /* Get the CR register value */
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| 212 | tmp = hdma2d->Instance->CR;
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| 213 |
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| 214 | /* Clear Mode bits */
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| 215 | tmp &= (uint32_t)~DMA2D_CR_MODE;
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| 216 |
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| 217 | /* Prepare the value to be wrote to the CR register */
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| 218 | tmp |= hdma2d->Init.Mode;
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| 219 |
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| 220 | /* Write to DMA2D CR register */
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| 221 | hdma2d->Instance->CR = tmp;
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| 222 |
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| 223 | /* DMA2D OPFCCR register configuration ---------------------------------------*/
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| 224 | /* Get the OPFCCR register value */
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| 225 | tmp = hdma2d->Instance->OPFCCR;
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| 226 |
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| 227 | /* Clear Color Mode bits */
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| 228 | tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
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| 229 |
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| 230 | /* Prepare the value to be wrote to the OPFCCR register */
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| 231 | tmp |= hdma2d->Init.ColorMode;
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| 232 |
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| 233 | /* Write to DMA2D OPFCCR register */
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| 234 | hdma2d->Instance->OPFCCR = tmp;
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| 235 |
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| 236 | /* DMA2D OOR register configuration ------------------------------------------*/
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| 237 | /* Get the OOR register value */
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| 238 | tmp = hdma2d->Instance->OOR;
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| 239 |
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| 240 | /* Clear Offset bits */
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| 241 | tmp &= (uint32_t)~DMA2D_OOR_LO;
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| 242 |
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| 243 | /* Prepare the value to be wrote to the OOR register */
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| 244 | tmp |= hdma2d->Init.OutputOffset;
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| 245 |
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| 246 | /* Write to DMA2D OOR register */
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| 247 | hdma2d->Instance->OOR = tmp;
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| 248 |
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| 249 | /* Update error code */
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| 250 | hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
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| 251 |
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| 252 | /* Initialize the DMA2D state*/
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| 253 | hdma2d->State = HAL_DMA2D_STATE_READY;
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| 254 |
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| 255 | return HAL_OK;
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| 256 | }
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| 257 |
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| 258 | /**
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| 259 | * @brief Deinitializes the DMA2D peripheral registers to their default reset
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| 260 | * values.
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| 261 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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| 262 | * the configuration information for the DMA2D.
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| 263 | * @retval None
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| 264 | */
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| 265 |
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| 266 | HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
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| 267 | {
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| 268 | /* Check the DMA2D peripheral state */
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| 269 | if(hdma2d == NULL)
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| 270 | {
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| 271 | return HAL_ERROR;
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| 272 | }
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| 273 |
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| 274 | /* DeInit the low level hardware */
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| 275 | HAL_DMA2D_MspDeInit(hdma2d);
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| 276 |
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| 277 | /* Update error code */
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| 278 | hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
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| 279 |
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| 280 | /* Initialize the DMA2D state*/
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| 281 | hdma2d->State = HAL_DMA2D_STATE_RESET;
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| 282 |
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| 283 | /* Release Lock */
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| 284 | __HAL_UNLOCK(hdma2d);
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| 285 |
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| 286 | return HAL_OK;
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| 287 | }
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| 288 |
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| 289 | /**
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| 290 | * @brief Initializes the DMA2D MSP.
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| 291 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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| 292 | * the configuration information for the DMA2D.
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| 293 | * @retval None
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| 294 | */
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| 295 | __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
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| 296 | {
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| 297 | /* NOTE : This function Should not be modified, when the callback is needed,
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| 298 | the HAL_DMA2D_MspInit could be implemented in the user file
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| 299 | */
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| 300 | }
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| 301 |
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| 302 | /**
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| 303 | * @brief DeInitializes the DMA2D MSP.
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| 304 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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| 305 | * the configuration information for the DMA2D.
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| 306 | * @retval None
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| 307 | */
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| 308 | __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
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| 309 | {
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| 310 | /* NOTE : This function Should not be modified, when the callback is needed,
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| 311 | the HAL_DMA2D_MspDeInit could be implemented in the user file
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| 312 | */
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| 313 | }
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| 314 |
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| 315 | /**
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| 316 | * @}
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| 317 | */
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| 318 |
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| 319 | /** @defgroup DMA2D_Group2 IO operation functions
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| 320 | * @brief IO operation functions
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| 321 | *
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| 322 | @verbatim
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| 323 | ===============================================================================
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| 324 | ##### IO operation functions #####
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| 325 | ===============================================================================
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| 326 | [..] This section provides functions allowing to:
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| 327 | (+) Configure the pdata, destination address and data size and
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| 328 | Start DMA2D transfer.
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| 329 | (+) Configure the source for foreground and background, destination address
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| 330 | and data size and Start MultiBuffer DMA2D transfer.
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| 331 | (+) Configure the pdata, destination address and data size and
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| 332 | Start DMA2D transfer with interrupt.
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| 333 | (+) Configure the source for foreground and background, destination address
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| 334 | and data size and Start MultiBuffer DMA2D transfer with interrupt.
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| 335 | (+) Abort DMA2D transfer.
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| 336 | (+) Suspend DMA2D transfer.
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| 337 | (+) Continue DMA2D transfer.
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| 338 | (+) Poll for transfer complete.
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| 339 | (+) handle DMA2D interrupt request.
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| 340 |
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| 341 | @endverbatim
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| 342 | * @{
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| 343 | */
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| 344 |
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| 345 | /**
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| 346 | * @brief Start the DMA2D Transfer.
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| 347 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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| 348 | * the configuration information for the DMA2D.
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| 349 | * @param pdata: Configure the source memory Buffer address if
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| 350 | * the memory to memory or memory to memory with pixel format
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| 351 | * conversion DMA2D mode is selected, and configure
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| 352 | * the color value if register to memory DMA2D mode is selected.
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| 353 | * @param DstAddress: The destination memory Buffer address.
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| 354 | * @param Width: The width of data to be transferred from source to destination.
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| 355 | * @param Height: The height of data to be transferred from source to destination.
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| 356 | * @retval HAL status
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| 357 | */
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| 358 | HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
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| 359 | {
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| 360 | /* Process locked */
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| 361 | __HAL_LOCK(hdma2d);
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| 362 |
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| 363 | /* Change DMA2D peripheral state */
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| 364 | hdma2d->State = HAL_DMA2D_STATE_BUSY;
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| 365 |
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| 366 | /* Check the parameters */
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| 367 | assert_param(IS_DMA2D_LINE(Height));
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| 368 | assert_param(IS_DMA2D_PIXEL(Width));
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| 369 |
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| 370 | /* Disable the Peripheral */
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| 371 | __HAL_DMA2D_DISABLE(hdma2d);
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| 372 |
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| 373 | /* Configure the source, destination address and the data size */
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| 374 | DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
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| 375 |
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| 376 | /* Enable the Peripheral */
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| 377 | __HAL_DMA2D_ENABLE(hdma2d);
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| 378 |
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| 379 | return HAL_OK;
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| 380 | }
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| 381 |
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| 382 | /**
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| 383 | * @brief Start the DMA2D Transfer with interrupt enabled.
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| 384 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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| 385 | * the configuration information for the DMA2D.
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| 386 | * @param pdata: Configure the source memory Buffer address if
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| 387 | * the memory to memory or memory to memory with pixel format
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| 388 | * conversion DMA2D mode is selected, and configure
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| 389 | * the color value if register to memory DMA2D mode is selected.
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| 390 | * @param DstAddress: The destination memory Buffer address.
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| 391 | * @param Width: The width of data to be transferred from source to destination.
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| 392 | * @param Height: The height of data to be transferred from source to destination.
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| 393 | * @retval HAL status
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| 394 | */
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| 395 | HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
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| 396 | {
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| 397 | /* Process locked */
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| 398 | __HAL_LOCK(hdma2d);
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| 399 |
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| 400 | /* Change DMA2D peripheral state */
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| 401 | hdma2d->State = HAL_DMA2D_STATE_BUSY;
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| 402 |
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| 403 | /* Check the parameters */
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| 404 | assert_param(IS_DMA2D_LINE(Height));
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| 405 | assert_param(IS_DMA2D_PIXEL(Width));
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| 406 |
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| 407 | /* Disable the Peripheral */
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| 408 | __HAL_DMA2D_DISABLE(hdma2d);
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| 409 |
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| 410 | /* Configure the source, destination address and the data size */
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| 411 | DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
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| 412 |
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| 413 | /* Enable the transfer complete interrupt */
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| 414 | __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
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| 415 |
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| 416 | /* Enable the transfer Error interrupt */
|
---|
| 417 | __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
|
---|
| 418 |
|
---|
| 419 | /* Enable the Peripheral */
|
---|
| 420 | __HAL_DMA2D_ENABLE(hdma2d);
|
---|
| 421 |
|
---|
| 422 | /* Enable the configuration error interrupt */
|
---|
| 423 | __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
|
---|
| 424 |
|
---|
| 425 | return HAL_OK;
|
---|
| 426 | }
|
---|
| 427 |
|
---|
| 428 | /**
|
---|
| 429 | * @brief Start the multi-source DMA2D Transfer.
|
---|
| 430 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 431 | * the configuration information for the DMA2D.
|
---|
| 432 | * @param SrcAddress1: The source memory Buffer address of the foreground layer.
|
---|
| 433 | * @param SrcAddress2: The source memory Buffer address of the background layer.
|
---|
| 434 | * @param DstAddress: The destination memory Buffer address
|
---|
| 435 | * @param Width: The width of data to be transferred from source to destination.
|
---|
| 436 | * @param Height: The height of data to be transferred from source to destination.
|
---|
| 437 | * @retval HAL status
|
---|
| 438 | */
|
---|
| 439 | HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
|
---|
| 440 | {
|
---|
| 441 | /* Process locked */
|
---|
| 442 | __HAL_LOCK(hdma2d);
|
---|
| 443 |
|
---|
| 444 | /* Change DMA2D peripheral state */
|
---|
| 445 | hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
---|
| 446 |
|
---|
| 447 | /* Check the parameters */
|
---|
| 448 | assert_param(IS_DMA2D_LINE(Height));
|
---|
| 449 | assert_param(IS_DMA2D_PIXEL(Width));
|
---|
| 450 |
|
---|
| 451 | /* Disable the Peripheral */
|
---|
| 452 | __HAL_DMA2D_DISABLE(hdma2d);
|
---|
| 453 |
|
---|
| 454 | /* Configure DMA2D Stream source2 address */
|
---|
| 455 | hdma2d->Instance->BGMAR = SrcAddress2;
|
---|
| 456 |
|
---|
| 457 | /* Configure the source, destination address and the data size */
|
---|
| 458 | DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
|
---|
| 459 |
|
---|
| 460 | /* Enable the Peripheral */
|
---|
| 461 | __HAL_DMA2D_ENABLE(hdma2d);
|
---|
| 462 |
|
---|
| 463 | return HAL_OK;
|
---|
| 464 | }
|
---|
| 465 |
|
---|
| 466 | /**
|
---|
| 467 | * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
|
---|
| 468 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 469 | * the configuration information for the DMA2D.
|
---|
| 470 | * @param SrcAddress1: The source memory Buffer address of the foreground layer.
|
---|
| 471 | * @param SrcAddress2: The source memory Buffer address of the background layer.
|
---|
| 472 | * @param DstAddress: The destination memory Buffer address.
|
---|
| 473 | * @param Width: The width of data to be transferred from source to destination.
|
---|
| 474 | * @param Height: The height of data to be transferred from source to destination.
|
---|
| 475 | * @retval HAL status
|
---|
| 476 | */
|
---|
| 477 | HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
|
---|
| 478 | {
|
---|
| 479 | /* Process locked */
|
---|
| 480 | __HAL_LOCK(hdma2d);
|
---|
| 481 |
|
---|
| 482 | /* Change DMA2D peripheral state */
|
---|
| 483 | hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
---|
| 484 |
|
---|
| 485 | /* Check the parameters */
|
---|
| 486 | assert_param(IS_DMA2D_LINE(Height));
|
---|
| 487 | assert_param(IS_DMA2D_PIXEL(Width));
|
---|
| 488 |
|
---|
| 489 | /* Disable the Peripheral */
|
---|
| 490 | __HAL_DMA2D_DISABLE(hdma2d);
|
---|
| 491 |
|
---|
| 492 | /* Configure DMA2D Stream source2 address */
|
---|
| 493 | hdma2d->Instance->BGMAR = SrcAddress2;
|
---|
| 494 |
|
---|
| 495 | /* Configure the source, destination address and the data size */
|
---|
| 496 | DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
|
---|
| 497 |
|
---|
| 498 | /* Enable the configuration error interrupt */
|
---|
| 499 | __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
|
---|
| 500 |
|
---|
| 501 | /* Enable the transfer complete interrupt */
|
---|
| 502 | __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
|
---|
| 503 |
|
---|
| 504 | /* Enable the transfer Error interrupt */
|
---|
| 505 | __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
|
---|
| 506 |
|
---|
| 507 | /* Enable the Peripheral */
|
---|
| 508 | __HAL_DMA2D_ENABLE(hdma2d);
|
---|
| 509 |
|
---|
| 510 | return HAL_OK;
|
---|
| 511 | }
|
---|
| 512 |
|
---|
| 513 | /**
|
---|
| 514 | * @brief Abort the DMA2D Transfer.
|
---|
| 515 | * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 516 | * the configuration information for the DMA2D.
|
---|
| 517 | * @retval HAL status
|
---|
| 518 | */
|
---|
| 519 | HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
|
---|
| 520 | {
|
---|
| 521 | uint32_t tickstart = 0;
|
---|
| 522 |
|
---|
| 523 | /* Disable the DMA2D */
|
---|
| 524 | __HAL_DMA2D_DISABLE(hdma2d);
|
---|
| 525 |
|
---|
| 526 | /* Get tick */
|
---|
| 527 | tickstart = HAL_GetTick();
|
---|
| 528 |
|
---|
| 529 | /* Check if the DMA2D is effectively disabled */
|
---|
| 530 | while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
|
---|
| 531 | {
|
---|
| 532 | if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
|
---|
| 533 | {
|
---|
| 534 | /* Update error code */
|
---|
| 535 | hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
---|
| 536 |
|
---|
| 537 | /* Change the DMA2D state */
|
---|
| 538 | hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
|
---|
| 539 |
|
---|
| 540 | /* Process Unlocked */
|
---|
| 541 | __HAL_UNLOCK(hdma2d);
|
---|
| 542 |
|
---|
| 543 | return HAL_TIMEOUT;
|
---|
| 544 | }
|
---|
| 545 | }
|
---|
| 546 | /* Process Unlocked */
|
---|
| 547 | __HAL_UNLOCK(hdma2d);
|
---|
| 548 |
|
---|
| 549 | /* Change the DMA2D state*/
|
---|
| 550 | hdma2d->State = HAL_DMA2D_STATE_READY;
|
---|
| 551 |
|
---|
| 552 | return HAL_OK;
|
---|
| 553 | }
|
---|
| 554 |
|
---|
| 555 | /**
|
---|
| 556 | * @brief Suspend the DMA2D Transfer.
|
---|
| 557 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 558 | * the configuration information for the DMA2D.
|
---|
| 559 | * @retval HAL status
|
---|
| 560 | */
|
---|
| 561 | HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
|
---|
| 562 | {
|
---|
| 563 | uint32_t tickstart = 0;
|
---|
| 564 |
|
---|
| 565 | /* Suspend the DMA2D transfer */
|
---|
| 566 | hdma2d->Instance->CR |= DMA2D_CR_SUSP;
|
---|
| 567 |
|
---|
| 568 | /* Get tick */
|
---|
| 569 | tickstart = HAL_GetTick();
|
---|
| 570 |
|
---|
| 571 | /* Check if the DMA2D is effectively suspended */
|
---|
| 572 | while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
|
---|
| 573 | {
|
---|
| 574 | if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
|
---|
| 575 | {
|
---|
| 576 | /* Update error code */
|
---|
| 577 | hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
---|
| 578 |
|
---|
| 579 | /* Change the DMA2D state */
|
---|
| 580 | hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
|
---|
| 581 |
|
---|
| 582 | return HAL_TIMEOUT;
|
---|
| 583 | }
|
---|
| 584 | }
|
---|
| 585 | /* Change the DMA2D state*/
|
---|
| 586 | hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
|
---|
| 587 |
|
---|
| 588 | return HAL_OK;
|
---|
| 589 | }
|
---|
| 590 |
|
---|
| 591 | /**
|
---|
| 592 | * @brief Resume the DMA2D Transfer.
|
---|
| 593 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 594 | * the configuration information for the DMA2D.
|
---|
| 595 | * @retval HAL status
|
---|
| 596 | */
|
---|
| 597 | HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
|
---|
| 598 | {
|
---|
| 599 | /* Resume the DMA2D transfer */
|
---|
| 600 | hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
|
---|
| 601 |
|
---|
| 602 | /* Change the DMA2D state*/
|
---|
| 603 | hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
---|
| 604 |
|
---|
| 605 | return HAL_OK;
|
---|
| 606 | }
|
---|
| 607 |
|
---|
| 608 | /**
|
---|
| 609 | * @brief Polling for transfer complete or CLUT loading.
|
---|
| 610 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 611 | * the configuration information for the DMA2D.
|
---|
| 612 | * @param Timeout: Timeout duration
|
---|
| 613 | * @retval HAL status
|
---|
| 614 | */
|
---|
| 615 | HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
|
---|
| 616 | {
|
---|
| 617 | uint32_t tmp, tmp1;
|
---|
| 618 | uint32_t tickstart = 0;
|
---|
| 619 |
|
---|
| 620 | /* Polling for DMA2D transfer */
|
---|
| 621 | if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
|
---|
| 622 | {
|
---|
| 623 | /* Get tick */
|
---|
| 624 | tickstart = HAL_GetTick();
|
---|
| 625 |
|
---|
| 626 | while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
|
---|
| 627 | {
|
---|
| 628 | tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
|
---|
| 629 | tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
|
---|
| 630 |
|
---|
| 631 | if((tmp != RESET) || (tmp1 != RESET))
|
---|
| 632 | {
|
---|
| 633 | /* Clear the transfer and configuration error flags */
|
---|
| 634 | __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
|
---|
| 635 | __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
|
---|
| 636 |
|
---|
| 637 | /* Change DMA2D state */
|
---|
| 638 | hdma2d->State= HAL_DMA2D_STATE_ERROR;
|
---|
| 639 |
|
---|
| 640 | /* Process unlocked */
|
---|
| 641 | __HAL_UNLOCK(hdma2d);
|
---|
| 642 |
|
---|
| 643 | return HAL_ERROR;
|
---|
| 644 | }
|
---|
| 645 | /* Check for the Timeout */
|
---|
| 646 | if(Timeout != HAL_MAX_DELAY)
|
---|
| 647 | {
|
---|
| 648 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
---|
| 649 | {
|
---|
| 650 | /* Process unlocked */
|
---|
| 651 | __HAL_UNLOCK(hdma2d);
|
---|
| 652 |
|
---|
| 653 | /* Update error code */
|
---|
| 654 | hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
---|
| 655 |
|
---|
| 656 | /* Change the DMA2D state */
|
---|
| 657 | hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
|
---|
| 658 |
|
---|
| 659 | return HAL_TIMEOUT;
|
---|
| 660 | }
|
---|
| 661 | }
|
---|
| 662 | }
|
---|
| 663 | }
|
---|
| 664 | /* Polling for CLUT loading */
|
---|
| 665 | if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
|
---|
| 666 | {
|
---|
| 667 | /* Get tick */
|
---|
| 668 | tickstart = HAL_GetTick();
|
---|
| 669 |
|
---|
| 670 | while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
|
---|
| 671 | {
|
---|
| 672 | if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
|
---|
| 673 | {
|
---|
| 674 | /* Clear the transfer and configuration error flags */
|
---|
| 675 | __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
|
---|
| 676 |
|
---|
| 677 | /* Change DMA2D state */
|
---|
| 678 | hdma2d->State= HAL_DMA2D_STATE_ERROR;
|
---|
| 679 |
|
---|
| 680 | return HAL_ERROR;
|
---|
| 681 | }
|
---|
| 682 | /* Check for the Timeout */
|
---|
| 683 | if(Timeout != HAL_MAX_DELAY)
|
---|
| 684 | {
|
---|
| 685 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
---|
| 686 | {
|
---|
| 687 | /* Update error code */
|
---|
| 688 | hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
---|
| 689 |
|
---|
| 690 | /* Change the DMA2D state */
|
---|
| 691 | hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
|
---|
| 692 |
|
---|
| 693 | return HAL_TIMEOUT;
|
---|
| 694 | }
|
---|
| 695 | }
|
---|
| 696 | }
|
---|
| 697 | }
|
---|
| 698 | /* Clear the transfer complete flag */
|
---|
| 699 | __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
|
---|
| 700 |
|
---|
| 701 | /* Clear the CLUT loading flag */
|
---|
| 702 | __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
|
---|
| 703 |
|
---|
| 704 | /* Change DMA2D state */
|
---|
| 705 | hdma2d->State = HAL_DMA2D_STATE_READY;
|
---|
| 706 |
|
---|
| 707 | /* Process unlocked */
|
---|
| 708 | __HAL_UNLOCK(hdma2d);
|
---|
| 709 |
|
---|
| 710 | return HAL_OK;
|
---|
| 711 | }
|
---|
| 712 | /**
|
---|
| 713 | * @brief Handles DMA2D interrupt request.
|
---|
| 714 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 715 | * the configuration information for the DMA2D.
|
---|
| 716 | * @retval HAL status
|
---|
| 717 | */
|
---|
| 718 | void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
|
---|
| 719 | {
|
---|
| 720 | /* Transfer Error Interrupt management ***************************************/
|
---|
| 721 | if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
|
---|
| 722 | {
|
---|
| 723 | if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
|
---|
| 724 | {
|
---|
| 725 | /* Disable the transfer Error interrupt */
|
---|
| 726 | __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
|
---|
| 727 |
|
---|
| 728 | /* Update error code */
|
---|
| 729 | hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
|
---|
| 730 |
|
---|
| 731 | /* Clear the transfer error flag */
|
---|
| 732 | __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
|
---|
| 733 |
|
---|
| 734 | /* Change DMA2D state */
|
---|
| 735 | hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
---|
| 736 |
|
---|
| 737 | /* Process Unlocked */
|
---|
| 738 | __HAL_UNLOCK(hdma2d);
|
---|
| 739 |
|
---|
| 740 | if(hdma2d->XferErrorCallback != NULL)
|
---|
| 741 | {
|
---|
| 742 | /* Transfer error Callback */
|
---|
| 743 | hdma2d->XferErrorCallback(hdma2d);
|
---|
| 744 | }
|
---|
| 745 | }
|
---|
| 746 | }
|
---|
| 747 | /* Configuration Error Interrupt management **********************************/
|
---|
| 748 | if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
|
---|
| 749 | {
|
---|
| 750 | if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
|
---|
| 751 | {
|
---|
| 752 | /* Disable the Configuration Error interrupt */
|
---|
| 753 | __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
|
---|
| 754 |
|
---|
| 755 | /* Clear the Configuration error flag */
|
---|
| 756 | __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
|
---|
| 757 |
|
---|
| 758 | /* Update error code */
|
---|
| 759 | hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
|
---|
| 760 |
|
---|
| 761 | /* Change DMA2D state */
|
---|
| 762 | hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
---|
| 763 |
|
---|
| 764 | /* Process Unlocked */
|
---|
| 765 | __HAL_UNLOCK(hdma2d);
|
---|
| 766 |
|
---|
| 767 | if(hdma2d->XferErrorCallback != NULL)
|
---|
| 768 | {
|
---|
| 769 | /* Transfer error Callback */
|
---|
| 770 | hdma2d->XferErrorCallback(hdma2d);
|
---|
| 771 | }
|
---|
| 772 | }
|
---|
| 773 | }
|
---|
| 774 | /* Transfer Complete Interrupt management ************************************/
|
---|
| 775 | if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
|
---|
| 776 | {
|
---|
| 777 | if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
|
---|
| 778 | {
|
---|
| 779 | /* Disable the transfer complete interrupt */
|
---|
| 780 | __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
|
---|
| 781 |
|
---|
| 782 | /* Clear the transfer complete flag */
|
---|
| 783 | __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
|
---|
| 784 |
|
---|
| 785 | /* Update error code */
|
---|
| 786 | hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
|
---|
| 787 |
|
---|
| 788 | /* Change DMA2D state */
|
---|
| 789 | hdma2d->State = HAL_DMA2D_STATE_READY;
|
---|
| 790 |
|
---|
| 791 | /* Process Unlocked */
|
---|
| 792 | __HAL_UNLOCK(hdma2d);
|
---|
| 793 |
|
---|
| 794 | if(hdma2d->XferCpltCallback != NULL)
|
---|
| 795 | {
|
---|
| 796 | /* Transfer complete Callback */
|
---|
| 797 | hdma2d->XferCpltCallback(hdma2d);
|
---|
| 798 | }
|
---|
| 799 | }
|
---|
| 800 | }
|
---|
| 801 | }
|
---|
| 802 |
|
---|
| 803 | /**
|
---|
| 804 | * @}
|
---|
| 805 | */
|
---|
| 806 |
|
---|
| 807 | /** @defgroup DMA2D_Group3 Peripheral Control functions
|
---|
| 808 | * @brief Peripheral Control functions
|
---|
| 809 | *
|
---|
| 810 | @verbatim
|
---|
| 811 | ===============================================================================
|
---|
| 812 | ##### Peripheral Control functions #####
|
---|
| 813 | ===============================================================================
|
---|
| 814 | [..] This section provides functions allowing to:
|
---|
| 815 | (+) Configure the DMA2D foreground or/and background parameters.
|
---|
| 816 | (+) Configure the DMA2D CLUT transfer.
|
---|
| 817 | (+) Enable DMA2D CLUT.
|
---|
| 818 | (+) Disable DMA2D CLUT.
|
---|
| 819 | (+) Configure the line watermark
|
---|
| 820 |
|
---|
| 821 | @endverbatim
|
---|
| 822 | * @{
|
---|
| 823 | */
|
---|
| 824 | /**
|
---|
| 825 | * @brief Configure the DMA2D Layer according to the specified
|
---|
| 826 | * parameters in the DMA2D_InitTypeDef and create the associated handle.
|
---|
| 827 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 828 | * the configuration information for the DMA2D.
|
---|
| 829 | * @param LayerIdx: DMA2D Layer index.
|
---|
| 830 | * This parameter can be one of the following values:
|
---|
| 831 | * 0(background) / 1(foreground)
|
---|
| 832 | * @retval HAL status
|
---|
| 833 | */
|
---|
| 834 | HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
---|
| 835 | {
|
---|
| 836 | DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
|
---|
| 837 |
|
---|
| 838 | uint32_t tmp = 0;
|
---|
| 839 |
|
---|
| 840 | /* Process locked */
|
---|
| 841 | __HAL_LOCK(hdma2d);
|
---|
| 842 |
|
---|
| 843 | /* Change DMA2D peripheral state */
|
---|
| 844 | hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
---|
| 845 |
|
---|
| 846 | /* Check the parameters */
|
---|
| 847 | assert_param(IS_DMA2D_LAYER(LayerIdx));
|
---|
| 848 | assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
|
---|
| 849 | if(hdma2d->Init.Mode != DMA2D_R2M)
|
---|
| 850 | {
|
---|
| 851 | assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
|
---|
| 852 | if(hdma2d->Init.Mode != DMA2D_M2M)
|
---|
| 853 | {
|
---|
| 854 | assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
|
---|
| 855 | }
|
---|
| 856 | }
|
---|
| 857 |
|
---|
| 858 | /* Configure the background DMA2D layer */
|
---|
| 859 | if(LayerIdx == 0)
|
---|
| 860 | {
|
---|
| 861 | /* DMA2D BGPFCR register configuration -----------------------------------*/
|
---|
| 862 | /* Get the BGPFCCR register value */
|
---|
| 863 | tmp = hdma2d->Instance->BGPFCCR;
|
---|
| 864 |
|
---|
| 865 | /* Clear Input color mode, alpha value and alpha mode bits */
|
---|
| 866 | tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
|
---|
| 867 |
|
---|
| 868 | if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
|
---|
| 869 | {
|
---|
| 870 | /* Prepare the value to be wrote to the BGPFCCR register */
|
---|
| 871 | tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
|
---|
| 872 | }
|
---|
| 873 | else
|
---|
| 874 | {
|
---|
| 875 | /* Prepare the value to be wrote to the BGPFCCR register */
|
---|
| 876 | tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
|
---|
| 877 | }
|
---|
| 878 |
|
---|
| 879 | /* Write to DMA2D BGPFCCR register */
|
---|
| 880 | hdma2d->Instance->BGPFCCR = tmp;
|
---|
| 881 |
|
---|
| 882 | /* DMA2D BGOR register configuration -------------------------------------*/
|
---|
| 883 | /* Get the BGOR register value */
|
---|
| 884 | tmp = hdma2d->Instance->BGOR;
|
---|
| 885 |
|
---|
| 886 | /* Clear colors bits */
|
---|
| 887 | tmp &= (uint32_t)~DMA2D_BGOR_LO;
|
---|
| 888 |
|
---|
| 889 | /* Prepare the value to be wrote to the BGOR register */
|
---|
| 890 | tmp |= pLayerCfg->InputOffset;
|
---|
| 891 |
|
---|
| 892 | /* Write to DMA2D BGOR register */
|
---|
| 893 | hdma2d->Instance->BGOR = tmp;
|
---|
| 894 |
|
---|
| 895 | if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
|
---|
| 896 | {
|
---|
| 897 | /* Prepare the value to be wrote to the BGCOLR register */
|
---|
| 898 | tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
|
---|
| 899 |
|
---|
| 900 | /* Write to DMA2D BGCOLR register */
|
---|
| 901 | hdma2d->Instance->BGCOLR = tmp;
|
---|
| 902 | }
|
---|
| 903 | }
|
---|
| 904 | /* Configure the foreground DMA2D layer */
|
---|
| 905 | else
|
---|
| 906 | {
|
---|
| 907 | /* DMA2D FGPFCR register configuration -----------------------------------*/
|
---|
| 908 | /* Get the FGPFCCR register value */
|
---|
| 909 | tmp = hdma2d->Instance->FGPFCCR;
|
---|
| 910 |
|
---|
| 911 | /* Clear Input color mode, alpha value and alpha mode bits */
|
---|
| 912 | tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
|
---|
| 913 |
|
---|
| 914 | if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
|
---|
| 915 | {
|
---|
| 916 | /* Prepare the value to be wrote to the FGPFCCR register */
|
---|
| 917 | tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
|
---|
| 918 | }
|
---|
| 919 | else
|
---|
| 920 | {
|
---|
| 921 | /* Prepare the value to be wrote to the FGPFCCR register */
|
---|
| 922 | tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
|
---|
| 923 | }
|
---|
| 924 |
|
---|
| 925 | /* Write to DMA2D FGPFCCR register */
|
---|
| 926 | hdma2d->Instance->FGPFCCR = tmp;
|
---|
| 927 |
|
---|
| 928 | /* DMA2D FGOR register configuration -------------------------------------*/
|
---|
| 929 | /* Get the FGOR register value */
|
---|
| 930 | tmp = hdma2d->Instance->FGOR;
|
---|
| 931 |
|
---|
| 932 | /* Clear colors bits */
|
---|
| 933 | tmp &= (uint32_t)~DMA2D_FGOR_LO;
|
---|
| 934 |
|
---|
| 935 | /* Prepare the value to be wrote to the FGOR register */
|
---|
| 936 | tmp |= pLayerCfg->InputOffset;
|
---|
| 937 |
|
---|
| 938 | /* Write to DMA2D FGOR register */
|
---|
| 939 | hdma2d->Instance->FGOR = tmp;
|
---|
| 940 |
|
---|
| 941 | if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
|
---|
| 942 | {
|
---|
| 943 | /* Prepare the value to be wrote to the FGCOLR register */
|
---|
| 944 | tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
|
---|
| 945 |
|
---|
| 946 | /* Write to DMA2D FGCOLR register */
|
---|
| 947 | hdma2d->Instance->FGCOLR = tmp;
|
---|
| 948 | }
|
---|
| 949 | }
|
---|
| 950 | /* Initialize the DMA2D state*/
|
---|
| 951 | hdma2d->State = HAL_DMA2D_STATE_READY;
|
---|
| 952 |
|
---|
| 953 | /* Process unlocked */
|
---|
| 954 | __HAL_UNLOCK(hdma2d);
|
---|
| 955 |
|
---|
| 956 | return HAL_OK;
|
---|
| 957 | }
|
---|
| 958 |
|
---|
| 959 | /**
|
---|
| 960 | * @brief Configure the DMA2D CLUT Transfer.
|
---|
| 961 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 962 | * the configuration information for the DMA2D.
|
---|
| 963 | * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
|
---|
| 964 | * the configuration information for the color look up table.
|
---|
| 965 | * @param LayerIdx: DMA2D Layer index.
|
---|
| 966 | * This parameter can be one of the following values:
|
---|
| 967 | * 0(background) / 1(foreground)
|
---|
| 968 | * @retval HAL status
|
---|
| 969 | */
|
---|
| 970 | HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
|
---|
| 971 | {
|
---|
| 972 | uint32_t tmp = 0, tmp1 = 0;
|
---|
| 973 |
|
---|
| 974 | /* Check the parameters */
|
---|
| 975 | assert_param(IS_DMA2D_LAYER(LayerIdx));
|
---|
| 976 | assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
|
---|
| 977 | assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
|
---|
| 978 |
|
---|
| 979 | /* Configure the CLUT of the background DMA2D layer */
|
---|
| 980 | if(LayerIdx == 0)
|
---|
| 981 | {
|
---|
| 982 | /* Get the BGCMAR register value */
|
---|
| 983 | tmp = hdma2d->Instance->BGCMAR;
|
---|
| 984 |
|
---|
| 985 | /* Clear CLUT address bits */
|
---|
| 986 | tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
|
---|
| 987 |
|
---|
| 988 | /* Prepare the value to be wrote to the BGCMAR register */
|
---|
| 989 | tmp |= (uint32_t)CLUTCfg.pCLUT;
|
---|
| 990 |
|
---|
| 991 | /* Write to DMA2D BGCMAR register */
|
---|
| 992 | hdma2d->Instance->BGCMAR = tmp;
|
---|
| 993 |
|
---|
| 994 | /* Get the BGPFCCR register value */
|
---|
| 995 | tmp = hdma2d->Instance->BGPFCCR;
|
---|
| 996 |
|
---|
| 997 | /* Clear CLUT size and CLUT address bits */
|
---|
| 998 | tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
|
---|
| 999 |
|
---|
| 1000 | /* Get the CLUT size */
|
---|
| 1001 | tmp1 = CLUTCfg.Size << 16;
|
---|
| 1002 |
|
---|
| 1003 | /* Prepare the value to be wrote to the BGPFCCR register */
|
---|
| 1004 | tmp |= (CLUTCfg.CLUTColorMode | tmp1);
|
---|
| 1005 |
|
---|
| 1006 | /* Write to DMA2D BGPFCCR register */
|
---|
| 1007 | hdma2d->Instance->BGPFCCR = tmp;
|
---|
| 1008 | }
|
---|
| 1009 | /* Configure the CLUT of the foreground DMA2D layer */
|
---|
| 1010 | else
|
---|
| 1011 | {
|
---|
| 1012 | /* Get the FGCMAR register value */
|
---|
| 1013 | tmp = hdma2d->Instance->FGCMAR;
|
---|
| 1014 |
|
---|
| 1015 | /* Clear CLUT address bits */
|
---|
| 1016 | tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
|
---|
| 1017 |
|
---|
| 1018 | /* Prepare the value to be wrote to the FGCMAR register */
|
---|
| 1019 | tmp |= (uint32_t)CLUTCfg.pCLUT;
|
---|
| 1020 |
|
---|
| 1021 | /* Write to DMA2D FGCMAR register */
|
---|
| 1022 | hdma2d->Instance->FGCMAR = tmp;
|
---|
| 1023 |
|
---|
| 1024 | /* Get the FGPFCCR register value */
|
---|
| 1025 | tmp = hdma2d->Instance->FGPFCCR;
|
---|
| 1026 |
|
---|
| 1027 | /* Clear CLUT size and CLUT address bits */
|
---|
| 1028 | tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
|
---|
| 1029 |
|
---|
| 1030 | /* Get the CLUT size */
|
---|
| 1031 | tmp1 = CLUTCfg.Size << 8;
|
---|
| 1032 |
|
---|
| 1033 | /* Prepare the value to be wrote to the FGPFCCR register */
|
---|
| 1034 | tmp |= (CLUTCfg.CLUTColorMode | tmp1);
|
---|
| 1035 |
|
---|
| 1036 | /* Write to DMA2D FGPFCCR register */
|
---|
| 1037 | hdma2d->Instance->FGPFCCR = tmp;
|
---|
| 1038 | }
|
---|
| 1039 |
|
---|
| 1040 | return HAL_OK;
|
---|
| 1041 | }
|
---|
| 1042 |
|
---|
| 1043 | /**
|
---|
| 1044 | * @brief Enable the DMA2D CLUT Transfer.
|
---|
| 1045 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 1046 | * the configuration information for the DMA2D.
|
---|
| 1047 | * @param LayerIdx: DMA2D Layer index.
|
---|
| 1048 | * This parameter can be one of the following values:
|
---|
| 1049 | * 0(background) / 1(foreground)
|
---|
| 1050 | * @retval HAL status
|
---|
| 1051 | */
|
---|
| 1052 | HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
---|
| 1053 | {
|
---|
| 1054 | /* Check the parameters */
|
---|
| 1055 | assert_param(IS_DMA2D_LAYER(LayerIdx));
|
---|
| 1056 |
|
---|
| 1057 | if(LayerIdx == 0)
|
---|
| 1058 | {
|
---|
| 1059 | /* Enable the CLUT loading for the background */
|
---|
| 1060 | hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
|
---|
| 1061 | }
|
---|
| 1062 | else
|
---|
| 1063 | {
|
---|
| 1064 | /* Enable the CLUT loading for the foreground */
|
---|
| 1065 | hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
|
---|
| 1066 | }
|
---|
| 1067 |
|
---|
| 1068 | return HAL_OK;
|
---|
| 1069 | }
|
---|
| 1070 |
|
---|
| 1071 | /**
|
---|
| 1072 | * @brief Disable the DMA2D CLUT Transfer.
|
---|
| 1073 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 1074 | * the configuration information for the DMA2D.
|
---|
| 1075 | * @param LayerIdx: DMA2D Layer index.
|
---|
| 1076 | * This parameter can be one of the following values:
|
---|
| 1077 | * 0(background) / 1(foreground)
|
---|
| 1078 | * @retval HAL status
|
---|
| 1079 | */
|
---|
| 1080 | HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
---|
| 1081 | {
|
---|
| 1082 | /* Check the parameters */
|
---|
| 1083 | assert_param(IS_DMA2D_LAYER(LayerIdx));
|
---|
| 1084 |
|
---|
| 1085 | if(LayerIdx == 0)
|
---|
| 1086 | {
|
---|
| 1087 | /* Disable the CLUT loading for the background */
|
---|
| 1088 | hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
|
---|
| 1089 | }
|
---|
| 1090 | else
|
---|
| 1091 | {
|
---|
| 1092 | /* Disable the CLUT loading for the foreground */
|
---|
| 1093 | hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
|
---|
| 1094 | }
|
---|
| 1095 |
|
---|
| 1096 | return HAL_OK;
|
---|
| 1097 | }
|
---|
| 1098 |
|
---|
| 1099 | /**
|
---|
| 1100 | * @brief Define the configuration of the line watermark .
|
---|
| 1101 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 1102 | * the configuration information for the DMA2D.
|
---|
| 1103 | * @param Line: Line Watermark configuration.
|
---|
| 1104 | * @retval HAL status
|
---|
| 1105 | */
|
---|
| 1106 |
|
---|
| 1107 | HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
|
---|
| 1108 | {
|
---|
| 1109 | /* Process locked */
|
---|
| 1110 | __HAL_LOCK(hdma2d);
|
---|
| 1111 |
|
---|
| 1112 | /* Change DMA2D peripheral state */
|
---|
| 1113 | hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
---|
| 1114 |
|
---|
| 1115 | /* Check the parameters */
|
---|
| 1116 | assert_param(IS_DMA2D_LineWatermark(Line));
|
---|
| 1117 |
|
---|
| 1118 | /* Sets the Line watermark configuration */
|
---|
| 1119 | DMA2D->LWR = (uint32_t)Line;
|
---|
| 1120 |
|
---|
| 1121 | /* Initialize the DMA2D state*/
|
---|
| 1122 | hdma2d->State = HAL_DMA2D_STATE_READY;
|
---|
| 1123 |
|
---|
| 1124 | /* Process unlocked */
|
---|
| 1125 | __HAL_UNLOCK(hdma2d);
|
---|
| 1126 |
|
---|
| 1127 | return HAL_OK;
|
---|
| 1128 | }
|
---|
| 1129 |
|
---|
| 1130 | /**
|
---|
| 1131 | * @}
|
---|
| 1132 | */
|
---|
| 1133 |
|
---|
| 1134 | /** @defgroup DMA2D_Group4 Peripheral State functions
|
---|
| 1135 | * @brief Peripheral State functions
|
---|
| 1136 | *
|
---|
| 1137 | @verbatim
|
---|
| 1138 | ===============================================================================
|
---|
| 1139 | ##### Peripheral State and Errors functions #####
|
---|
| 1140 | ===============================================================================
|
---|
| 1141 | [..]
|
---|
| 1142 | This subsection provides functions allowing to :
|
---|
| 1143 | (+) Check the DMA2D state
|
---|
| 1144 | (+) Get error code
|
---|
| 1145 |
|
---|
| 1146 | @endverbatim
|
---|
| 1147 | * @{
|
---|
| 1148 | */
|
---|
| 1149 |
|
---|
| 1150 | /**
|
---|
| 1151 | * @brief Return the DMA2D state
|
---|
| 1152 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 1153 | * the configuration information for the DMA2D.
|
---|
| 1154 | * @retval HAL state
|
---|
| 1155 | */
|
---|
| 1156 | HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
|
---|
| 1157 | {
|
---|
| 1158 | return hdma2d->State;
|
---|
| 1159 | }
|
---|
| 1160 |
|
---|
| 1161 | /**
|
---|
| 1162 | * @brief Return the DMA2D error code
|
---|
| 1163 | * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 1164 | * the configuration information for DMA2D.
|
---|
| 1165 | * @retval DMA2D Error Code
|
---|
| 1166 | */
|
---|
| 1167 | uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
|
---|
| 1168 | {
|
---|
| 1169 | return hdma2d->ErrorCode;
|
---|
| 1170 | }
|
---|
| 1171 |
|
---|
| 1172 | /**
|
---|
| 1173 | * @}
|
---|
| 1174 | */
|
---|
| 1175 |
|
---|
| 1176 |
|
---|
| 1177 | /**
|
---|
| 1178 | * @brief Set the DMA2D Transfer parameter.
|
---|
| 1179 | * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
---|
| 1180 | * the configuration information for the specified DMA2D.
|
---|
| 1181 | * @param pdata: The source memory Buffer address
|
---|
| 1182 | * @param DstAddress: The destination memory Buffer address
|
---|
| 1183 | * @param Width: The width of data to be transferred from source to destination.
|
---|
| 1184 | * @param Height: The height of data to be transferred from source to destination.
|
---|
| 1185 | * @retval HAL status
|
---|
| 1186 | */
|
---|
| 1187 | static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
|
---|
| 1188 | {
|
---|
| 1189 | uint32_t tmp = 0;
|
---|
| 1190 | uint32_t tmp1 = 0;
|
---|
| 1191 | uint32_t tmp2 = 0;
|
---|
| 1192 | uint32_t tmp3 = 0;
|
---|
| 1193 | uint32_t tmp4 = 0;
|
---|
| 1194 |
|
---|
| 1195 | tmp = Width << 16;
|
---|
| 1196 |
|
---|
| 1197 | /* Configure DMA2D data size */
|
---|
| 1198 | hdma2d->Instance->NLR = (Height | tmp);
|
---|
| 1199 |
|
---|
| 1200 | /* Configure DMA2D destination address */
|
---|
| 1201 | hdma2d->Instance->OMAR = DstAddress;
|
---|
| 1202 |
|
---|
| 1203 | /* Register to memory DMA2D mode selected */
|
---|
| 1204 | if (hdma2d->Init.Mode == DMA2D_R2M)
|
---|
| 1205 | {
|
---|
| 1206 | tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
|
---|
| 1207 | tmp2 = pdata & DMA2D_OCOLR_RED_1;
|
---|
| 1208 | tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
|
---|
| 1209 | tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
|
---|
| 1210 |
|
---|
| 1211 | /* Prepare the value to be wrote to the OCOLR register according to the color mode */
|
---|
| 1212 | if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
|
---|
| 1213 | {
|
---|
| 1214 | tmp = (tmp3 | tmp2 | tmp1| tmp4);
|
---|
| 1215 | }
|
---|
| 1216 | else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
|
---|
| 1217 | {
|
---|
| 1218 | tmp = (tmp3 | tmp2 | tmp4);
|
---|
| 1219 | }
|
---|
| 1220 | else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
|
---|
| 1221 | {
|
---|
| 1222 | tmp2 = (tmp2 >> 19);
|
---|
| 1223 | tmp3 = (tmp3 >> 10);
|
---|
| 1224 | tmp4 = (tmp4 >> 3 );
|
---|
| 1225 | tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
|
---|
| 1226 | }
|
---|
| 1227 | else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
|
---|
| 1228 | {
|
---|
| 1229 | tmp1 = (tmp1 >> 31);
|
---|
| 1230 | tmp2 = (tmp2 >> 19);
|
---|
| 1231 | tmp3 = (tmp3 >> 11);
|
---|
| 1232 | tmp4 = (tmp4 >> 3 );
|
---|
| 1233 | tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
|
---|
| 1234 | }
|
---|
| 1235 | else /* DMA2D_CMode = DMA2D_ARGB4444 */
|
---|
| 1236 | {
|
---|
| 1237 | tmp1 = (tmp1 >> 28);
|
---|
| 1238 | tmp2 = (tmp2 >> 20);
|
---|
| 1239 | tmp3 = (tmp3 >> 12);
|
---|
| 1240 | tmp4 = (tmp4 >> 4 );
|
---|
| 1241 | tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
|
---|
| 1242 | }
|
---|
| 1243 | /* Write to DMA2D OCOLR register */
|
---|
| 1244 | hdma2d->Instance->OCOLR = tmp;
|
---|
| 1245 | }
|
---|
| 1246 | else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
|
---|
| 1247 | {
|
---|
| 1248 | /* Configure DMA2D source address */
|
---|
| 1249 | hdma2d->Instance->FGMAR = pdata;
|
---|
| 1250 | }
|
---|
| 1251 | }
|
---|
| 1252 |
|
---|
| 1253 | /**
|
---|
| 1254 | * @}
|
---|
| 1255 | */
|
---|
| 1256 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
|
---|
| 1257 | #endif /* HAL_DMA2D_MODULE_ENABLED */
|
---|
| 1258 | /**
|
---|
| 1259 | * @}
|
---|
| 1260 | */
|
---|
| 1261 |
|
---|
| 1262 | /**
|
---|
| 1263 | * @}
|
---|
| 1264 | */
|
---|
| 1265 |
|
---|
| 1266 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
---|