source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c@ 303

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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_dma2d.c
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief DMA2D HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the DMA2D peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State and Errors functions
14 *
15 @verbatim
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
19 [..]
20 (#) Program the required configuration through following parameters:
21 the Transfer Mode, the output color mode and the output offset using
22 HAL_DMA2D_Init() function.
23
24 (#) Program the required configuration through following parameters:
25 the input color mode, the input color, input alpha value, alpha mode
26 and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
27 or/and background layer.
28
29 *** Polling mode IO operation ***
30 =================================
31 [..]
32 (+) Configure the pdata, Destination and data length and Enable
33 the transfer using HAL_DMA2D_Start()
34 (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
35 user can specify the value of timeout according to his end application.
36
37 *** Interrupt mode IO operation ***
38 ===================================
39 [..]
40 (#) Configure the pdata, Destination and data length and Enable
41 the transfer using HAL_DMA2D_Start_IT()
42 (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
43 (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
44 add his own function by customization of function pointer XferCpltCallback and
45 XferErrorCallback (i.e a member of DMA2D handle structure).
46
47 -@- In Register-to-Memory transfer mode, the pdata parameter is the register
48 color, in Memory-to-memory or memory-to-memory with pixel format
49 conversion the pdata is the source address.
50
51 -@- Configure the foreground source address, the background source address,
52 the Destination and data length and Enable the transfer using
53 HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
54 in interrupt mode.
55
56 -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
57 are used if the memory to memory with blending transfer mode is selected.
58
59 (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
60 HAL_DMA2D_EnableCLUT() functions.
61
62 (#) Optionally, configure and enable LineInterrupt using the following function:
63 HAL_DMA2D_ProgramLineEvent().
64
65 (#) The transfer can be suspended, continued and aborted using the following
66 functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
67
68 (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
69
70 *** DMA2D HAL driver macros list ***
71 =============================================
72 [..]
73 Below the list of most used macros in DMA2D HAL driver :
74
75 (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
76 (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
77 (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
78 (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
79 (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
80 (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
81 (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
82
83 [..]
84 (@) You can refer to the DMA2D HAL driver header file for more useful macros
85
86 @endverbatim
87 ******************************************************************************
88 * @attention
89 *
90 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
91 *
92 * Redistribution and use in source and binary forms, with or without modification,
93 * are permitted provided that the following conditions are met:
94 * 1. Redistributions of source code must retain the above copyright notice,
95 * this list of conditions and the following disclaimer.
96 * 2. Redistributions in binary form must reproduce the above copyright notice,
97 * this list of conditions and the following disclaimer in the documentation
98 * and/or other materials provided with the distribution.
99 * 3. Neither the name of STMicroelectronics nor the names of its contributors
100 * may be used to endorse or promote products derived from this software
101 * without specific prior written permission.
102 *
103 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
104 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
105 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
106 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
107 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
108 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
109 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
110 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
111 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
112 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
113 *
114 ******************************************************************************
115 */
116
117/* Includes ------------------------------------------------------------------*/
118#include "stm32f4xx_hal.h"
119
120/** @addtogroup STM32F4xx_HAL_Driver
121 * @{
122 */
123/** @addtogroup DMA2D
124 * @brief DMA2D HAL module driver
125 * @{
126 */
127
128#ifdef HAL_DMA2D_MODULE_ENABLED
129
130#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
131
132/* Private types -------------------------------------------------------------*/
133/* Private define ------------------------------------------------------------*/
134/** @addtogroup DMA2D_Private_Defines
135 * @{
136 */
137#define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
138#define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
139/**
140 * @}
141 */
142
143/* Private variables ---------------------------------------------------------*/
144/* Private constants ---------------------------------------------------------*/
145/* Private macro -------------------------------------------------------------*/
146/* Private function prototypes -----------------------------------------------*/
147/** @addtogroup DMA2D_Private_Functions_Prototypes
148 * @{
149 */
150static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
151/**
152 * @}
153 */
154
155/* Private functions ---------------------------------------------------------*/
156/* Exported functions --------------------------------------------------------*/
157/** @addtogroup DMA2D_Exported_Functions
158 * @{
159 */
160
161/** @defgroup DMA2D_Group1 Initialization and Configuration functions
162 * @brief Initialization and Configuration functions
163 *
164@verbatim
165 ===============================================================================
166 ##### Initialization and Configuration functions #####
167 ===============================================================================
168 [..] This section provides functions allowing to:
169 (+) Initialize and configure the DMA2D
170 (+) De-initialize the DMA2D
171
172@endverbatim
173 * @{
174 */
175
176/**
177 * @brief Initializes the DMA2D according to the specified
178 * parameters in the DMA2D_InitTypeDef and create the associated handle.
179 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
180 * the configuration information for the DMA2D.
181 * @retval HAL status
182 */
183HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
184{
185 uint32_t tmp = 0;
186
187 /* Check the DMA2D peripheral state */
188 if(hdma2d == NULL)
189 {
190 return HAL_ERROR;
191 }
192
193 /* Check the parameters */
194 assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
195 assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
196 assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
197 assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
198
199 if(hdma2d->State == HAL_DMA2D_STATE_RESET)
200 {
201 /* Allocate lock resource and initialize it */
202 hdma2d->Lock = HAL_UNLOCKED;
203 /* Init the low level hardware */
204 HAL_DMA2D_MspInit(hdma2d);
205 }
206
207 /* Change DMA2D peripheral state */
208 hdma2d->State = HAL_DMA2D_STATE_BUSY;
209
210/* DMA2D CR register configuration -------------------------------------------*/
211 /* Get the CR register value */
212 tmp = hdma2d->Instance->CR;
213
214 /* Clear Mode bits */
215 tmp &= (uint32_t)~DMA2D_CR_MODE;
216
217 /* Prepare the value to be wrote to the CR register */
218 tmp |= hdma2d->Init.Mode;
219
220 /* Write to DMA2D CR register */
221 hdma2d->Instance->CR = tmp;
222
223/* DMA2D OPFCCR register configuration ---------------------------------------*/
224 /* Get the OPFCCR register value */
225 tmp = hdma2d->Instance->OPFCCR;
226
227 /* Clear Color Mode bits */
228 tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
229
230 /* Prepare the value to be wrote to the OPFCCR register */
231 tmp |= hdma2d->Init.ColorMode;
232
233 /* Write to DMA2D OPFCCR register */
234 hdma2d->Instance->OPFCCR = tmp;
235
236/* DMA2D OOR register configuration ------------------------------------------*/
237 /* Get the OOR register value */
238 tmp = hdma2d->Instance->OOR;
239
240 /* Clear Offset bits */
241 tmp &= (uint32_t)~DMA2D_OOR_LO;
242
243 /* Prepare the value to be wrote to the OOR register */
244 tmp |= hdma2d->Init.OutputOffset;
245
246 /* Write to DMA2D OOR register */
247 hdma2d->Instance->OOR = tmp;
248
249 /* Update error code */
250 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
251
252 /* Initialize the DMA2D state*/
253 hdma2d->State = HAL_DMA2D_STATE_READY;
254
255 return HAL_OK;
256}
257
258/**
259 * @brief Deinitializes the DMA2D peripheral registers to their default reset
260 * values.
261 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
262 * the configuration information for the DMA2D.
263 * @retval None
264 */
265
266HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
267{
268 /* Check the DMA2D peripheral state */
269 if(hdma2d == NULL)
270 {
271 return HAL_ERROR;
272 }
273
274 /* DeInit the low level hardware */
275 HAL_DMA2D_MspDeInit(hdma2d);
276
277 /* Update error code */
278 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
279
280 /* Initialize the DMA2D state*/
281 hdma2d->State = HAL_DMA2D_STATE_RESET;
282
283 /* Release Lock */
284 __HAL_UNLOCK(hdma2d);
285
286 return HAL_OK;
287}
288
289/**
290 * @brief Initializes the DMA2D MSP.
291 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
292 * the configuration information for the DMA2D.
293 * @retval None
294 */
295__weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
296{
297 /* NOTE : This function Should not be modified, when the callback is needed,
298 the HAL_DMA2D_MspInit could be implemented in the user file
299 */
300}
301
302/**
303 * @brief DeInitializes the DMA2D MSP.
304 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
305 * the configuration information for the DMA2D.
306 * @retval None
307 */
308__weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
309{
310 /* NOTE : This function Should not be modified, when the callback is needed,
311 the HAL_DMA2D_MspDeInit could be implemented in the user file
312 */
313}
314
315/**
316 * @}
317 */
318
319/** @defgroup DMA2D_Group2 IO operation functions
320 * @brief IO operation functions
321 *
322@verbatim
323 ===============================================================================
324 ##### IO operation functions #####
325 ===============================================================================
326 [..] This section provides functions allowing to:
327 (+) Configure the pdata, destination address and data size and
328 Start DMA2D transfer.
329 (+) Configure the source for foreground and background, destination address
330 and data size and Start MultiBuffer DMA2D transfer.
331 (+) Configure the pdata, destination address and data size and
332 Start DMA2D transfer with interrupt.
333 (+) Configure the source for foreground and background, destination address
334 and data size and Start MultiBuffer DMA2D transfer with interrupt.
335 (+) Abort DMA2D transfer.
336 (+) Suspend DMA2D transfer.
337 (+) Continue DMA2D transfer.
338 (+) Poll for transfer complete.
339 (+) handle DMA2D interrupt request.
340
341@endverbatim
342 * @{
343 */
344
345/**
346 * @brief Start the DMA2D Transfer.
347 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
348 * the configuration information for the DMA2D.
349 * @param pdata: Configure the source memory Buffer address if
350 * the memory to memory or memory to memory with pixel format
351 * conversion DMA2D mode is selected, and configure
352 * the color value if register to memory DMA2D mode is selected.
353 * @param DstAddress: The destination memory Buffer address.
354 * @param Width: The width of data to be transferred from source to destination.
355 * @param Height: The height of data to be transferred from source to destination.
356 * @retval HAL status
357 */
358HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
359{
360 /* Process locked */
361 __HAL_LOCK(hdma2d);
362
363 /* Change DMA2D peripheral state */
364 hdma2d->State = HAL_DMA2D_STATE_BUSY;
365
366 /* Check the parameters */
367 assert_param(IS_DMA2D_LINE(Height));
368 assert_param(IS_DMA2D_PIXEL(Width));
369
370 /* Disable the Peripheral */
371 __HAL_DMA2D_DISABLE(hdma2d);
372
373 /* Configure the source, destination address and the data size */
374 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
375
376 /* Enable the Peripheral */
377 __HAL_DMA2D_ENABLE(hdma2d);
378
379 return HAL_OK;
380}
381
382/**
383 * @brief Start the DMA2D Transfer with interrupt enabled.
384 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
385 * the configuration information for the DMA2D.
386 * @param pdata: Configure the source memory Buffer address if
387 * the memory to memory or memory to memory with pixel format
388 * conversion DMA2D mode is selected, and configure
389 * the color value if register to memory DMA2D mode is selected.
390 * @param DstAddress: The destination memory Buffer address.
391 * @param Width: The width of data to be transferred from source to destination.
392 * @param Height: The height of data to be transferred from source to destination.
393 * @retval HAL status
394 */
395HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
396{
397 /* Process locked */
398 __HAL_LOCK(hdma2d);
399
400 /* Change DMA2D peripheral state */
401 hdma2d->State = HAL_DMA2D_STATE_BUSY;
402
403 /* Check the parameters */
404 assert_param(IS_DMA2D_LINE(Height));
405 assert_param(IS_DMA2D_PIXEL(Width));
406
407 /* Disable the Peripheral */
408 __HAL_DMA2D_DISABLE(hdma2d);
409
410 /* Configure the source, destination address and the data size */
411 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
412
413 /* Enable the transfer complete interrupt */
414 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
415
416 /* Enable the transfer Error interrupt */
417 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
418
419 /* Enable the Peripheral */
420 __HAL_DMA2D_ENABLE(hdma2d);
421
422 /* Enable the configuration error interrupt */
423 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
424
425 return HAL_OK;
426}
427
428/**
429 * @brief Start the multi-source DMA2D Transfer.
430 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
431 * the configuration information for the DMA2D.
432 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
433 * @param SrcAddress2: The source memory Buffer address of the background layer.
434 * @param DstAddress: The destination memory Buffer address
435 * @param Width: The width of data to be transferred from source to destination.
436 * @param Height: The height of data to be transferred from source to destination.
437 * @retval HAL status
438 */
439HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
440{
441 /* Process locked */
442 __HAL_LOCK(hdma2d);
443
444 /* Change DMA2D peripheral state */
445 hdma2d->State = HAL_DMA2D_STATE_BUSY;
446
447 /* Check the parameters */
448 assert_param(IS_DMA2D_LINE(Height));
449 assert_param(IS_DMA2D_PIXEL(Width));
450
451 /* Disable the Peripheral */
452 __HAL_DMA2D_DISABLE(hdma2d);
453
454 /* Configure DMA2D Stream source2 address */
455 hdma2d->Instance->BGMAR = SrcAddress2;
456
457 /* Configure the source, destination address and the data size */
458 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
459
460 /* Enable the Peripheral */
461 __HAL_DMA2D_ENABLE(hdma2d);
462
463 return HAL_OK;
464}
465
466/**
467 * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
468 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
469 * the configuration information for the DMA2D.
470 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
471 * @param SrcAddress2: The source memory Buffer address of the background layer.
472 * @param DstAddress: The destination memory Buffer address.
473 * @param Width: The width of data to be transferred from source to destination.
474 * @param Height: The height of data to be transferred from source to destination.
475 * @retval HAL status
476 */
477HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
478{
479 /* Process locked */
480 __HAL_LOCK(hdma2d);
481
482 /* Change DMA2D peripheral state */
483 hdma2d->State = HAL_DMA2D_STATE_BUSY;
484
485 /* Check the parameters */
486 assert_param(IS_DMA2D_LINE(Height));
487 assert_param(IS_DMA2D_PIXEL(Width));
488
489 /* Disable the Peripheral */
490 __HAL_DMA2D_DISABLE(hdma2d);
491
492 /* Configure DMA2D Stream source2 address */
493 hdma2d->Instance->BGMAR = SrcAddress2;
494
495 /* Configure the source, destination address and the data size */
496 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
497
498 /* Enable the configuration error interrupt */
499 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
500
501 /* Enable the transfer complete interrupt */
502 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
503
504 /* Enable the transfer Error interrupt */
505 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
506
507 /* Enable the Peripheral */
508 __HAL_DMA2D_ENABLE(hdma2d);
509
510 return HAL_OK;
511}
512
513/**
514 * @brief Abort the DMA2D Transfer.
515 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
516 * the configuration information for the DMA2D.
517 * @retval HAL status
518 */
519HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
520{
521 uint32_t tickstart = 0;
522
523 /* Disable the DMA2D */
524 __HAL_DMA2D_DISABLE(hdma2d);
525
526 /* Get tick */
527 tickstart = HAL_GetTick();
528
529 /* Check if the DMA2D is effectively disabled */
530 while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
531 {
532 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
533 {
534 /* Update error code */
535 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
536
537 /* Change the DMA2D state */
538 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
539
540 /* Process Unlocked */
541 __HAL_UNLOCK(hdma2d);
542
543 return HAL_TIMEOUT;
544 }
545 }
546 /* Process Unlocked */
547 __HAL_UNLOCK(hdma2d);
548
549 /* Change the DMA2D state*/
550 hdma2d->State = HAL_DMA2D_STATE_READY;
551
552 return HAL_OK;
553}
554
555/**
556 * @brief Suspend the DMA2D Transfer.
557 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
558 * the configuration information for the DMA2D.
559 * @retval HAL status
560 */
561HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
562{
563 uint32_t tickstart = 0;
564
565 /* Suspend the DMA2D transfer */
566 hdma2d->Instance->CR |= DMA2D_CR_SUSP;
567
568 /* Get tick */
569 tickstart = HAL_GetTick();
570
571 /* Check if the DMA2D is effectively suspended */
572 while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
573 {
574 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
575 {
576 /* Update error code */
577 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
578
579 /* Change the DMA2D state */
580 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
581
582 return HAL_TIMEOUT;
583 }
584 }
585 /* Change the DMA2D state*/
586 hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
587
588 return HAL_OK;
589}
590
591/**
592 * @brief Resume the DMA2D Transfer.
593 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
594 * the configuration information for the DMA2D.
595 * @retval HAL status
596 */
597HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
598{
599 /* Resume the DMA2D transfer */
600 hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
601
602 /* Change the DMA2D state*/
603 hdma2d->State = HAL_DMA2D_STATE_BUSY;
604
605 return HAL_OK;
606}
607
608/**
609 * @brief Polling for transfer complete or CLUT loading.
610 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
611 * the configuration information for the DMA2D.
612 * @param Timeout: Timeout duration
613 * @retval HAL status
614 */
615HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
616{
617 uint32_t tmp, tmp1;
618 uint32_t tickstart = 0;
619
620 /* Polling for DMA2D transfer */
621 if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
622 {
623 /* Get tick */
624 tickstart = HAL_GetTick();
625
626 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
627 {
628 tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
629 tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
630
631 if((tmp != RESET) || (tmp1 != RESET))
632 {
633 /* Clear the transfer and configuration error flags */
634 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
635 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
636
637 /* Change DMA2D state */
638 hdma2d->State= HAL_DMA2D_STATE_ERROR;
639
640 /* Process unlocked */
641 __HAL_UNLOCK(hdma2d);
642
643 return HAL_ERROR;
644 }
645 /* Check for the Timeout */
646 if(Timeout != HAL_MAX_DELAY)
647 {
648 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
649 {
650 /* Process unlocked */
651 __HAL_UNLOCK(hdma2d);
652
653 /* Update error code */
654 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
655
656 /* Change the DMA2D state */
657 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
658
659 return HAL_TIMEOUT;
660 }
661 }
662 }
663 }
664 /* Polling for CLUT loading */
665 if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
666 {
667 /* Get tick */
668 tickstart = HAL_GetTick();
669
670 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
671 {
672 if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
673 {
674 /* Clear the transfer and configuration error flags */
675 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
676
677 /* Change DMA2D state */
678 hdma2d->State= HAL_DMA2D_STATE_ERROR;
679
680 return HAL_ERROR;
681 }
682 /* Check for the Timeout */
683 if(Timeout != HAL_MAX_DELAY)
684 {
685 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
686 {
687 /* Update error code */
688 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
689
690 /* Change the DMA2D state */
691 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
692
693 return HAL_TIMEOUT;
694 }
695 }
696 }
697 }
698 /* Clear the transfer complete flag */
699 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
700
701 /* Clear the CLUT loading flag */
702 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
703
704 /* Change DMA2D state */
705 hdma2d->State = HAL_DMA2D_STATE_READY;
706
707 /* Process unlocked */
708 __HAL_UNLOCK(hdma2d);
709
710 return HAL_OK;
711}
712/**
713 * @brief Handles DMA2D interrupt request.
714 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
715 * the configuration information for the DMA2D.
716 * @retval HAL status
717 */
718void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
719{
720 /* Transfer Error Interrupt management ***************************************/
721 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
722 {
723 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
724 {
725 /* Disable the transfer Error interrupt */
726 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
727
728 /* Update error code */
729 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
730
731 /* Clear the transfer error flag */
732 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
733
734 /* Change DMA2D state */
735 hdma2d->State = HAL_DMA2D_STATE_ERROR;
736
737 /* Process Unlocked */
738 __HAL_UNLOCK(hdma2d);
739
740 if(hdma2d->XferErrorCallback != NULL)
741 {
742 /* Transfer error Callback */
743 hdma2d->XferErrorCallback(hdma2d);
744 }
745 }
746 }
747 /* Configuration Error Interrupt management **********************************/
748 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
749 {
750 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
751 {
752 /* Disable the Configuration Error interrupt */
753 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
754
755 /* Clear the Configuration error flag */
756 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
757
758 /* Update error code */
759 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
760
761 /* Change DMA2D state */
762 hdma2d->State = HAL_DMA2D_STATE_ERROR;
763
764 /* Process Unlocked */
765 __HAL_UNLOCK(hdma2d);
766
767 if(hdma2d->XferErrorCallback != NULL)
768 {
769 /* Transfer error Callback */
770 hdma2d->XferErrorCallback(hdma2d);
771 }
772 }
773 }
774 /* Transfer Complete Interrupt management ************************************/
775 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
776 {
777 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
778 {
779 /* Disable the transfer complete interrupt */
780 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
781
782 /* Clear the transfer complete flag */
783 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
784
785 /* Update error code */
786 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
787
788 /* Change DMA2D state */
789 hdma2d->State = HAL_DMA2D_STATE_READY;
790
791 /* Process Unlocked */
792 __HAL_UNLOCK(hdma2d);
793
794 if(hdma2d->XferCpltCallback != NULL)
795 {
796 /* Transfer complete Callback */
797 hdma2d->XferCpltCallback(hdma2d);
798 }
799 }
800 }
801}
802
803/**
804 * @}
805 */
806
807/** @defgroup DMA2D_Group3 Peripheral Control functions
808 * @brief Peripheral Control functions
809 *
810@verbatim
811 ===============================================================================
812 ##### Peripheral Control functions #####
813 ===============================================================================
814 [..] This section provides functions allowing to:
815 (+) Configure the DMA2D foreground or/and background parameters.
816 (+) Configure the DMA2D CLUT transfer.
817 (+) Enable DMA2D CLUT.
818 (+) Disable DMA2D CLUT.
819 (+) Configure the line watermark
820
821@endverbatim
822 * @{
823 */
824/**
825 * @brief Configure the DMA2D Layer according to the specified
826 * parameters in the DMA2D_InitTypeDef and create the associated handle.
827 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
828 * the configuration information for the DMA2D.
829 * @param LayerIdx: DMA2D Layer index.
830 * This parameter can be one of the following values:
831 * 0(background) / 1(foreground)
832 * @retval HAL status
833 */
834HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
835{
836 DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
837
838 uint32_t tmp = 0;
839
840 /* Process locked */
841 __HAL_LOCK(hdma2d);
842
843 /* Change DMA2D peripheral state */
844 hdma2d->State = HAL_DMA2D_STATE_BUSY;
845
846 /* Check the parameters */
847 assert_param(IS_DMA2D_LAYER(LayerIdx));
848 assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
849 if(hdma2d->Init.Mode != DMA2D_R2M)
850 {
851 assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
852 if(hdma2d->Init.Mode != DMA2D_M2M)
853 {
854 assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
855 }
856 }
857
858 /* Configure the background DMA2D layer */
859 if(LayerIdx == 0)
860 {
861 /* DMA2D BGPFCR register configuration -----------------------------------*/
862 /* Get the BGPFCCR register value */
863 tmp = hdma2d->Instance->BGPFCCR;
864
865 /* Clear Input color mode, alpha value and alpha mode bits */
866 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
867
868 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
869 {
870 /* Prepare the value to be wrote to the BGPFCCR register */
871 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
872 }
873 else
874 {
875 /* Prepare the value to be wrote to the BGPFCCR register */
876 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
877 }
878
879 /* Write to DMA2D BGPFCCR register */
880 hdma2d->Instance->BGPFCCR = tmp;
881
882 /* DMA2D BGOR register configuration -------------------------------------*/
883 /* Get the BGOR register value */
884 tmp = hdma2d->Instance->BGOR;
885
886 /* Clear colors bits */
887 tmp &= (uint32_t)~DMA2D_BGOR_LO;
888
889 /* Prepare the value to be wrote to the BGOR register */
890 tmp |= pLayerCfg->InputOffset;
891
892 /* Write to DMA2D BGOR register */
893 hdma2d->Instance->BGOR = tmp;
894
895 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
896 {
897 /* Prepare the value to be wrote to the BGCOLR register */
898 tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
899
900 /* Write to DMA2D BGCOLR register */
901 hdma2d->Instance->BGCOLR = tmp;
902 }
903 }
904 /* Configure the foreground DMA2D layer */
905 else
906 {
907 /* DMA2D FGPFCR register configuration -----------------------------------*/
908 /* Get the FGPFCCR register value */
909 tmp = hdma2d->Instance->FGPFCCR;
910
911 /* Clear Input color mode, alpha value and alpha mode bits */
912 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
913
914 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
915 {
916 /* Prepare the value to be wrote to the FGPFCCR register */
917 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
918 }
919 else
920 {
921 /* Prepare the value to be wrote to the FGPFCCR register */
922 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
923 }
924
925 /* Write to DMA2D FGPFCCR register */
926 hdma2d->Instance->FGPFCCR = tmp;
927
928 /* DMA2D FGOR register configuration -------------------------------------*/
929 /* Get the FGOR register value */
930 tmp = hdma2d->Instance->FGOR;
931
932 /* Clear colors bits */
933 tmp &= (uint32_t)~DMA2D_FGOR_LO;
934
935 /* Prepare the value to be wrote to the FGOR register */
936 tmp |= pLayerCfg->InputOffset;
937
938 /* Write to DMA2D FGOR register */
939 hdma2d->Instance->FGOR = tmp;
940
941 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
942 {
943 /* Prepare the value to be wrote to the FGCOLR register */
944 tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
945
946 /* Write to DMA2D FGCOLR register */
947 hdma2d->Instance->FGCOLR = tmp;
948 }
949 }
950 /* Initialize the DMA2D state*/
951 hdma2d->State = HAL_DMA2D_STATE_READY;
952
953 /* Process unlocked */
954 __HAL_UNLOCK(hdma2d);
955
956 return HAL_OK;
957}
958
959/**
960 * @brief Configure the DMA2D CLUT Transfer.
961 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
962 * the configuration information for the DMA2D.
963 * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
964 * the configuration information for the color look up table.
965 * @param LayerIdx: DMA2D Layer index.
966 * This parameter can be one of the following values:
967 * 0(background) / 1(foreground)
968 * @retval HAL status
969 */
970HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
971{
972 uint32_t tmp = 0, tmp1 = 0;
973
974 /* Check the parameters */
975 assert_param(IS_DMA2D_LAYER(LayerIdx));
976 assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
977 assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
978
979 /* Configure the CLUT of the background DMA2D layer */
980 if(LayerIdx == 0)
981 {
982 /* Get the BGCMAR register value */
983 tmp = hdma2d->Instance->BGCMAR;
984
985 /* Clear CLUT address bits */
986 tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
987
988 /* Prepare the value to be wrote to the BGCMAR register */
989 tmp |= (uint32_t)CLUTCfg.pCLUT;
990
991 /* Write to DMA2D BGCMAR register */
992 hdma2d->Instance->BGCMAR = tmp;
993
994 /* Get the BGPFCCR register value */
995 tmp = hdma2d->Instance->BGPFCCR;
996
997 /* Clear CLUT size and CLUT address bits */
998 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
999
1000 /* Get the CLUT size */
1001 tmp1 = CLUTCfg.Size << 16;
1002
1003 /* Prepare the value to be wrote to the BGPFCCR register */
1004 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
1005
1006 /* Write to DMA2D BGPFCCR register */
1007 hdma2d->Instance->BGPFCCR = tmp;
1008 }
1009 /* Configure the CLUT of the foreground DMA2D layer */
1010 else
1011 {
1012 /* Get the FGCMAR register value */
1013 tmp = hdma2d->Instance->FGCMAR;
1014
1015 /* Clear CLUT address bits */
1016 tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
1017
1018 /* Prepare the value to be wrote to the FGCMAR register */
1019 tmp |= (uint32_t)CLUTCfg.pCLUT;
1020
1021 /* Write to DMA2D FGCMAR register */
1022 hdma2d->Instance->FGCMAR = tmp;
1023
1024 /* Get the FGPFCCR register value */
1025 tmp = hdma2d->Instance->FGPFCCR;
1026
1027 /* Clear CLUT size and CLUT address bits */
1028 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
1029
1030 /* Get the CLUT size */
1031 tmp1 = CLUTCfg.Size << 8;
1032
1033 /* Prepare the value to be wrote to the FGPFCCR register */
1034 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
1035
1036 /* Write to DMA2D FGPFCCR register */
1037 hdma2d->Instance->FGPFCCR = tmp;
1038 }
1039
1040 return HAL_OK;
1041}
1042
1043/**
1044 * @brief Enable the DMA2D CLUT Transfer.
1045 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1046 * the configuration information for the DMA2D.
1047 * @param LayerIdx: DMA2D Layer index.
1048 * This parameter can be one of the following values:
1049 * 0(background) / 1(foreground)
1050 * @retval HAL status
1051 */
1052HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
1053{
1054 /* Check the parameters */
1055 assert_param(IS_DMA2D_LAYER(LayerIdx));
1056
1057 if(LayerIdx == 0)
1058 {
1059 /* Enable the CLUT loading for the background */
1060 hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
1061 }
1062 else
1063 {
1064 /* Enable the CLUT loading for the foreground */
1065 hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
1066 }
1067
1068 return HAL_OK;
1069}
1070
1071/**
1072 * @brief Disable the DMA2D CLUT Transfer.
1073 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1074 * the configuration information for the DMA2D.
1075 * @param LayerIdx: DMA2D Layer index.
1076 * This parameter can be one of the following values:
1077 * 0(background) / 1(foreground)
1078 * @retval HAL status
1079 */
1080HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
1081{
1082 /* Check the parameters */
1083 assert_param(IS_DMA2D_LAYER(LayerIdx));
1084
1085 if(LayerIdx == 0)
1086 {
1087 /* Disable the CLUT loading for the background */
1088 hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
1089 }
1090 else
1091 {
1092 /* Disable the CLUT loading for the foreground */
1093 hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
1094 }
1095
1096 return HAL_OK;
1097}
1098
1099/**
1100 * @brief Define the configuration of the line watermark .
1101 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1102 * the configuration information for the DMA2D.
1103 * @param Line: Line Watermark configuration.
1104 * @retval HAL status
1105 */
1106
1107HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
1108{
1109 /* Process locked */
1110 __HAL_LOCK(hdma2d);
1111
1112 /* Change DMA2D peripheral state */
1113 hdma2d->State = HAL_DMA2D_STATE_BUSY;
1114
1115 /* Check the parameters */
1116 assert_param(IS_DMA2D_LineWatermark(Line));
1117
1118 /* Sets the Line watermark configuration */
1119 DMA2D->LWR = (uint32_t)Line;
1120
1121 /* Initialize the DMA2D state*/
1122 hdma2d->State = HAL_DMA2D_STATE_READY;
1123
1124 /* Process unlocked */
1125 __HAL_UNLOCK(hdma2d);
1126
1127 return HAL_OK;
1128}
1129
1130/**
1131 * @}
1132 */
1133
1134/** @defgroup DMA2D_Group4 Peripheral State functions
1135 * @brief Peripheral State functions
1136 *
1137@verbatim
1138 ===============================================================================
1139 ##### Peripheral State and Errors functions #####
1140 ===============================================================================
1141 [..]
1142 This subsection provides functions allowing to :
1143 (+) Check the DMA2D state
1144 (+) Get error code
1145
1146@endverbatim
1147 * @{
1148 */
1149
1150/**
1151 * @brief Return the DMA2D state
1152 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1153 * the configuration information for the DMA2D.
1154 * @retval HAL state
1155 */
1156HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
1157{
1158 return hdma2d->State;
1159}
1160
1161/**
1162 * @brief Return the DMA2D error code
1163 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
1164 * the configuration information for DMA2D.
1165 * @retval DMA2D Error Code
1166 */
1167uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
1168{
1169 return hdma2d->ErrorCode;
1170}
1171
1172/**
1173 * @}
1174 */
1175
1176
1177/**
1178 * @brief Set the DMA2D Transfer parameter.
1179 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1180 * the configuration information for the specified DMA2D.
1181 * @param pdata: The source memory Buffer address
1182 * @param DstAddress: The destination memory Buffer address
1183 * @param Width: The width of data to be transferred from source to destination.
1184 * @param Height: The height of data to be transferred from source to destination.
1185 * @retval HAL status
1186 */
1187static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
1188{
1189 uint32_t tmp = 0;
1190 uint32_t tmp1 = 0;
1191 uint32_t tmp2 = 0;
1192 uint32_t tmp3 = 0;
1193 uint32_t tmp4 = 0;
1194
1195 tmp = Width << 16;
1196
1197 /* Configure DMA2D data size */
1198 hdma2d->Instance->NLR = (Height | tmp);
1199
1200 /* Configure DMA2D destination address */
1201 hdma2d->Instance->OMAR = DstAddress;
1202
1203 /* Register to memory DMA2D mode selected */
1204 if (hdma2d->Init.Mode == DMA2D_R2M)
1205 {
1206 tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
1207 tmp2 = pdata & DMA2D_OCOLR_RED_1;
1208 tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
1209 tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
1210
1211 /* Prepare the value to be wrote to the OCOLR register according to the color mode */
1212 if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
1213 {
1214 tmp = (tmp3 | tmp2 | tmp1| tmp4);
1215 }
1216 else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
1217 {
1218 tmp = (tmp3 | tmp2 | tmp4);
1219 }
1220 else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
1221 {
1222 tmp2 = (tmp2 >> 19);
1223 tmp3 = (tmp3 >> 10);
1224 tmp4 = (tmp4 >> 3 );
1225 tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
1226 }
1227 else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
1228 {
1229 tmp1 = (tmp1 >> 31);
1230 tmp2 = (tmp2 >> 19);
1231 tmp3 = (tmp3 >> 11);
1232 tmp4 = (tmp4 >> 3 );
1233 tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
1234 }
1235 else /* DMA2D_CMode = DMA2D_ARGB4444 */
1236 {
1237 tmp1 = (tmp1 >> 28);
1238 tmp2 = (tmp2 >> 20);
1239 tmp3 = (tmp3 >> 12);
1240 tmp4 = (tmp4 >> 4 );
1241 tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
1242 }
1243 /* Write to DMA2D OCOLR register */
1244 hdma2d->Instance->OCOLR = tmp;
1245 }
1246 else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
1247 {
1248 /* Configure DMA2D source address */
1249 hdma2d->Instance->FGMAR = pdata;
1250 }
1251}
1252
1253/**
1254 * @}
1255 */
1256#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
1257#endif /* HAL_DMA2D_MODULE_ENABLED */
1258/**
1259 * @}
1260 */
1261
1262/**
1263 * @}
1264 */
1265
1266/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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