[303] | 1 | /**
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| 2 | ******************************************************************************
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| 3 | * @file stm32f4xx_hal_adc_ex.c
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| 4 | * @author MCD Application Team
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| 5 | * @version V1.4.1
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| 6 | * @date 09-October-2015
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| 7 | * @brief This file provides firmware functions to manage the following
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| 8 | * functionalities of the ADC extension peripheral:
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| 9 | * + Extended features functions
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| 10 | *
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| 11 | @verbatim
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| 12 | ==============================================================================
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| 13 | ##### How to use this driver #####
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| 14 | ==============================================================================
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| 15 | [..]
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| 16 | (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
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| 17 | (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
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| 18 | (##) ADC pins configuration
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| 19 | (+++) Enable the clock for the ADC GPIOs using the following function:
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| 20 | __HAL_RCC_GPIOx_CLK_ENABLE()
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| 21 | (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
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| 22 | (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
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| 23 | (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
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| 24 | (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
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| 25 | (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
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| 26 | (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
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| 27 | (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
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| 28 | (+++) Configure and enable two DMA streams stream for managing data
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| 29 | transfer from peripheral to memory (output stream)
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| 30 | (+++) Associate the initialized DMA handle to the ADC DMA handle
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| 31 | using __HAL_LINKDMA()
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| 32 | (+++) Configure the priority and enable the NVIC for the transfer complete
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| 33 | interrupt on the two DMA Streams. The output stream should have higher
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| 34 | priority than the input stream.
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| 35 | (#) Configure the ADC Prescaler, conversion resolution and data alignment
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| 36 | using the HAL_ADC_Init() function.
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| 37 |
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| 38 | (#) Configure the ADC Injected channels group features, use HAL_ADC_Init()
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| 39 | and HAL_ADC_ConfigChannel() functions.
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| 40 |
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| 41 | (#) Three operation modes are available within this driver :
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| 42 |
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| 43 | *** Polling mode IO operation ***
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| 44 | =================================
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| 45 | [..]
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| 46 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart()
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| 47 | (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
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| 48 | user can specify the value of timeout according to his end application
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| 49 | (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function.
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| 50 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop()
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| 51 |
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| 52 | *** Interrupt mode IO operation ***
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| 53 | ===================================
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| 54 | [..]
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| 55 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT()
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| 56 | (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
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| 57 | (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
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| 58 | add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
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| 59 | (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
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| 60 | add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
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| 61 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT()
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| 62 |
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| 63 |
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| 64 | *** DMA mode IO operation ***
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| 65 | ==============================
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| 66 | [..]
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| 67 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length
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| 68 | of data to be transferred at each end of conversion
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| 69 | (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
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| 70 | add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
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| 71 | (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
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| 72 | add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
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| 73 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA()
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| 74 |
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| 75 | *** Multi mode ADCs Regular channels configuration ***
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| 76 | ======================================================
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| 77 | [..]
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| 78 | (+) Select the Multi mode ADC regular channels features (dual or triple mode)
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| 79 | and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions.
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| 80 | (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length
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| 81 | of data to be transferred at each end of conversion
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| 82 | (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function.
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| 83 |
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| 84 |
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| 85 | @endverbatim
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| 86 | ******************************************************************************
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| 87 | * @attention
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| 88 | *
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| 89 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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| 90 | *
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| 91 | * Redistribution and use in source and binary forms, with or without modification,
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| 92 | * are permitted provided that the following conditions are met:
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| 93 | * 1. Redistributions of source code must retain the above copyright notice,
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| 94 | * this list of conditions and the following disclaimer.
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| 95 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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| 96 | * this list of conditions and the following disclaimer in the documentation
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| 97 | * and/or other materials provided with the distribution.
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| 98 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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| 99 | * may be used to endorse or promote products derived from this software
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| 100 | * without specific prior written permission.
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| 101 | *
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| 102 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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| 103 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| 104 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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| 105 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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| 106 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| 107 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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| 108 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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| 109 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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| 110 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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| 111 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 112 | *
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| 113 | ******************************************************************************
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| 114 | */
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| 115 |
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| 116 | /* Includes ------------------------------------------------------------------*/
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| 117 | #include "stm32f4xx_hal.h"
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| 118 |
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| 119 | /** @addtogroup STM32F4xx_HAL_Driver
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| 120 | * @{
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| 121 | */
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| 122 |
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| 123 | /** @defgroup ADCEx ADCEx
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| 124 | * @brief ADC Extended driver modules
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| 125 | * @{
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| 126 | */
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| 127 |
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| 128 | #ifdef HAL_ADC_MODULE_ENABLED
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| 129 |
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| 130 | /* Private typedef -----------------------------------------------------------*/
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| 131 | /* Private define ------------------------------------------------------------*/
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| 132 | /* Private macro -------------------------------------------------------------*/
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| 133 | /* Private variables ---------------------------------------------------------*/
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| 134 | /** @addtogroup ADCEx_Private_Functions
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| 135 | * @{
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| 136 | */
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| 137 | /* Private function prototypes -----------------------------------------------*/
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| 138 | static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma);
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| 139 | static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma);
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| 140 | static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma);
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| 141 | /**
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| 142 | * @}
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| 143 | */
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| 144 |
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| 145 | /* Exported functions --------------------------------------------------------*/
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| 146 | /** @defgroup ADCEx_Exported_Functions ADC Exported Functions
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| 147 | * @{
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| 148 | */
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| 149 |
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| 150 | /** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions
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| 151 | * @brief Extended features functions
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| 152 | *
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| 153 | @verbatim
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| 154 | ===============================================================================
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| 155 | ##### Extended features functions #####
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| 156 | ===============================================================================
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| 157 | [..] This section provides functions allowing to:
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| 158 | (+) Start conversion of injected channel.
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| 159 | (+) Stop conversion of injected channel.
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| 160 | (+) Start multimode and enable DMA transfer.
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| 161 | (+) Stop multimode and disable DMA transfer.
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| 162 | (+) Get result of injected channel conversion.
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| 163 | (+) Get result of multimode conversion.
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| 164 | (+) Configure injected channels.
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| 165 | (+) Configure multimode.
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| 166 |
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| 167 | @endverbatim
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| 168 | * @{
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| 169 | */
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| 170 |
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| 171 | /**
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| 172 | * @brief Enables the selected ADC software start conversion of the injected channels.
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| 173 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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| 174 | * the configuration information for the specified ADC.
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| 175 | * @retval HAL status
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| 176 | */
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| 177 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
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| 178 | {
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| 179 | __IO uint32_t counter = 0;
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| 180 | uint32_t tmp1 = 0, tmp2 = 0;
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| 181 |
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| 182 | /* Process locked */
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| 183 | __HAL_LOCK(hadc);
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| 184 |
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| 185 | /* Check if a regular conversion is ongoing */
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| 186 | if(hadc->State == HAL_ADC_STATE_BUSY_REG)
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| 187 | {
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| 188 | /* Change ADC state */
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| 189 | hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
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| 190 | }
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| 191 | else
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| 192 | {
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| 193 | /* Change ADC state */
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| 194 | hadc->State = HAL_ADC_STATE_BUSY_INJ;
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| 195 | }
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| 196 |
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| 197 | /* Check if ADC peripheral is disabled in order to enable it and wait during
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| 198 | Tstab time the ADC's stabilization */
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| 199 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
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| 200 | {
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| 201 | /* Enable the Peripheral */
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| 202 | __HAL_ADC_ENABLE(hadc);
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| 203 |
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| 204 | /* Delay for temperature sensor stabilization time */
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| 205 | /* Compute number of CPU cycles to wait for */
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| 206 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
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| 207 | while(counter != 0)
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| 208 | {
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| 209 | counter--;
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| 210 | }
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| 211 | }
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| 212 |
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| 213 | /* Check if Multimode enabled */
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| 214 | if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
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| 215 | {
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| 216 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
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| 217 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
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| 218 | if(tmp1 && tmp2)
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| 219 | {
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| 220 | /* Enable the selected ADC software conversion for injected group */
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| 221 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
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| 222 | }
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| 223 | }
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| 224 | else
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| 225 | {
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| 226 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
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| 227 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
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| 228 | if((hadc->Instance == ADC1) && tmp1 && tmp2)
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| 229 | {
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| 230 | /* Enable the selected ADC software conversion for injected group */
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| 231 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
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| 232 | }
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| 233 | }
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| 234 |
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| 235 | /* Process unlocked */
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| 236 | __HAL_UNLOCK(hadc);
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| 237 |
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| 238 | /* Return function status */
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| 239 | return HAL_OK;
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| 240 | }
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| 241 |
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| 242 | /**
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| 243 | * @brief Enables the interrupt and starts ADC conversion of injected channels.
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| 244 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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| 245 | * the configuration information for the specified ADC.
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| 246 | *
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| 247 | * @retval HAL status.
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| 248 | */
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| 249 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
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| 250 | {
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| 251 | __IO uint32_t counter = 0;
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| 252 | uint32_t tmp1 = 0, tmp2 =0;
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| 253 |
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| 254 | /* Process locked */
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| 255 | __HAL_LOCK(hadc);
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| 256 |
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| 257 | /* Check if a regular conversion is ongoing */
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| 258 | if(hadc->State == HAL_ADC_STATE_BUSY_REG)
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| 259 | {
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| 260 | /* Change ADC state */
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| 261 | hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
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| 262 | }
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| 263 | else
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| 264 | {
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| 265 | /* Change ADC state */
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| 266 | hadc->State = HAL_ADC_STATE_BUSY_INJ;
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| 267 | }
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| 268 |
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| 269 | /* Set ADC error code to none */
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| 270 | hadc->ErrorCode = HAL_ADC_ERROR_NONE;
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| 271 |
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| 272 | /* Check if ADC peripheral is disabled in order to enable it and wait during
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| 273 | Tstab time the ADC's stabilization */
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| 274 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
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| 275 | {
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| 276 | /* Enable the Peripheral */
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| 277 | __HAL_ADC_ENABLE(hadc);
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| 278 |
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| 279 | /* Delay for temperature sensor stabilization time */
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| 280 | /* Compute number of CPU cycles to wait for */
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| 281 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
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| 282 | while(counter != 0)
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| 283 | {
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| 284 | counter--;
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| 285 | }
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| 286 | }
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| 287 |
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| 288 | /* Enable the ADC end of conversion interrupt for injected group */
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| 289 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
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| 290 |
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| 291 | /* Enable the ADC overrun interrupt */
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| 292 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
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| 293 |
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| 294 | /* Check if Multimode enabled */
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| 295 | if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
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| 296 | {
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| 297 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
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| 298 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
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| 299 | if(tmp1 && tmp2)
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| 300 | {
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| 301 | /* Enable the selected ADC software conversion for injected group */
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| 302 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
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| 303 | }
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| 304 | }
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| 305 | else
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| 306 | {
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| 307 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
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| 308 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
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| 309 | if((hadc->Instance == ADC1) && tmp1 && tmp2)
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| 310 | {
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| 311 | /* Enable the selected ADC software conversion for injected group */
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| 312 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
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| 313 | }
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| 314 | }
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| 315 |
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| 316 | /* Process unlocked */
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| 317 | __HAL_UNLOCK(hadc);
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| 318 |
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| 319 | /* Return function status */
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| 320 | return HAL_OK;
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| 321 | }
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| 322 |
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| 323 | /**
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| 324 | * @brief Disables ADC and stop conversion of injected channels.
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| 325 | *
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| 326 | * @note Caution: This function will stop also regular channels.
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| 327 | *
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| 328 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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| 329 | * the configuration information for the specified ADC.
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| 330 | * @retval HAL status.
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| 331 | */
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| 332 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
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| 333 | {
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| 334 | /* Disable the Peripheral */
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| 335 | __HAL_ADC_DISABLE(hadc);
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| 336 |
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| 337 | /* Change ADC state */
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| 338 | hadc->State = HAL_ADC_STATE_READY;
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| 339 |
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| 340 | /* Return function status */
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| 341 | return HAL_OK;
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| 342 | }
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| 343 |
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| 344 | /**
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| 345 | * @brief Poll for injected conversion complete
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| 346 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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| 347 | * the configuration information for the specified ADC.
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| 348 | * @param Timeout: Timeout value in millisecond.
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| 349 | * @retval HAL status
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| 350 | */
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| 351 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
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| 352 | {
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| 353 | uint32_t tickstart = 0;
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| 354 |
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| 355 | /* Get tick */
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| 356 | tickstart = HAL_GetTick();
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| 357 |
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| 358 | /* Check End of conversion flag */
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| 359 | while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC)))
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| 360 | {
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| 361 | /* Check for the Timeout */
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| 362 | if(Timeout != HAL_MAX_DELAY)
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| 363 | {
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| 364 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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| 365 | {
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| 366 | hadc->State= HAL_ADC_STATE_TIMEOUT;
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| 367 | /* Process unlocked */
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| 368 | __HAL_UNLOCK(hadc);
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| 369 | return HAL_TIMEOUT;
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| 370 | }
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| 371 | }
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| 372 | }
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| 373 |
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| 374 | /* Check if a regular conversion is ready */
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| 375 | if(hadc->State == HAL_ADC_STATE_EOC_REG)
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| 376 | {
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| 377 | /* Change ADC state */
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| 378 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
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| 379 | }
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| 380 | else
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| 381 | {
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| 382 | /* Change ADC state */
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| 383 | hadc->State = HAL_ADC_STATE_EOC_INJ;
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| 384 | }
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| 385 |
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| 386 | /* Return ADC state */
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| 387 | return HAL_OK;
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| 388 | }
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| 389 |
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| 390 | /**
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| 391 | * @brief Disables the interrupt and stop ADC conversion of injected channels.
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| 392 | *
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| 393 | * @note Caution: This function will stop also regular channels.
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| 394 | *
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| 395 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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| 396 | * the configuration information for the specified ADC.
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| 397 | * @retval HAL status.
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| 398 | */
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| 399 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
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| 400 | {
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| 401 | /* Disable the ADC end of conversion interrupt for regular group */
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| 402 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
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| 403 |
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| 404 | /* Disable the ADC end of conversion interrupt for injected group */
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| 405 | __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE);
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| 406 |
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| 407 | /* Enable the Peripheral */
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| 408 | __HAL_ADC_DISABLE(hadc);
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| 409 |
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| 410 | /* Change ADC state */
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| 411 | hadc->State = HAL_ADC_STATE_READY;
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| 412 |
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| 413 | /* Return function status */
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| 414 | return HAL_OK;
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| 415 | }
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| 416 |
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| 417 | /**
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| 418 | * @brief Gets the converted value from data register of injected channel.
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| 419 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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| 420 | * the configuration information for the specified ADC.
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| 421 | * @param InjectedRank: the ADC injected rank.
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| 422 | * This parameter can be one of the following values:
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| 423 | * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
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| 424 | * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
|
---|
| 425 | * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
|
---|
| 426 | * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
|
---|
| 427 | * @retval None
|
---|
| 428 | */
|
---|
| 429 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
|
---|
| 430 | {
|
---|
| 431 | __IO uint32_t tmp = 0;
|
---|
| 432 |
|
---|
| 433 | /* Check the parameters */
|
---|
| 434 | assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
|
---|
| 435 |
|
---|
| 436 | /* Clear the ADCx's flag for injected end of conversion */
|
---|
| 437 | __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC);
|
---|
| 438 |
|
---|
| 439 | /* Return the selected ADC converted value */
|
---|
| 440 | switch(InjectedRank)
|
---|
| 441 | {
|
---|
| 442 | case ADC_INJECTED_RANK_4:
|
---|
| 443 | {
|
---|
| 444 | tmp = hadc->Instance->JDR4;
|
---|
| 445 | }
|
---|
| 446 | break;
|
---|
| 447 | case ADC_INJECTED_RANK_3:
|
---|
| 448 | {
|
---|
| 449 | tmp = hadc->Instance->JDR3;
|
---|
| 450 | }
|
---|
| 451 | break;
|
---|
| 452 | case ADC_INJECTED_RANK_2:
|
---|
| 453 | {
|
---|
| 454 | tmp = hadc->Instance->JDR2;
|
---|
| 455 | }
|
---|
| 456 | break;
|
---|
| 457 | case ADC_INJECTED_RANK_1:
|
---|
| 458 | {
|
---|
| 459 | tmp = hadc->Instance->JDR1;
|
---|
| 460 | }
|
---|
| 461 | break;
|
---|
| 462 | default:
|
---|
| 463 | break;
|
---|
| 464 | }
|
---|
| 465 | return tmp;
|
---|
| 466 | }
|
---|
| 467 |
|
---|
| 468 | /**
|
---|
| 469 | * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral
|
---|
| 470 | *
|
---|
| 471 | * @note Caution: This function must be used only with the ADC master.
|
---|
| 472 | *
|
---|
| 473 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
---|
| 474 | * the configuration information for the specified ADC.
|
---|
| 475 | * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
|
---|
| 476 | * @param Length: The length of data to be transferred from ADC peripheral to memory.
|
---|
| 477 | * @retval HAL status
|
---|
| 478 | */
|
---|
| 479 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
|
---|
| 480 | {
|
---|
| 481 | __IO uint32_t counter = 0;
|
---|
| 482 |
|
---|
| 483 | /* Check the parameters */
|
---|
| 484 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
|
---|
| 485 | assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
|
---|
| 486 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
|
---|
| 487 |
|
---|
| 488 | /* Process locked */
|
---|
| 489 | __HAL_LOCK(hadc);
|
---|
| 490 |
|
---|
| 491 | /* Enable ADC overrun interrupt */
|
---|
| 492 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
|
---|
| 493 |
|
---|
| 494 | if (hadc->Init.DMAContinuousRequests != DISABLE)
|
---|
| 495 | {
|
---|
| 496 | /* Enable the selected ADC DMA request after last transfer */
|
---|
| 497 | ADC->CCR |= ADC_CCR_DDS;
|
---|
| 498 | }
|
---|
| 499 | else
|
---|
| 500 | {
|
---|
| 501 | /* Disable the selected ADC EOC rising on each regular channel conversion */
|
---|
| 502 | ADC->CCR &= ~ADC_CCR_DDS;
|
---|
| 503 | }
|
---|
| 504 |
|
---|
| 505 | /* Set the DMA transfer complete callback */
|
---|
| 506 | hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt;
|
---|
| 507 |
|
---|
| 508 | /* Set the DMA half transfer complete callback */
|
---|
| 509 | hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt;
|
---|
| 510 |
|
---|
| 511 | /* Set the DMA error callback */
|
---|
| 512 | hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ;
|
---|
| 513 |
|
---|
| 514 | /* Enable the DMA Stream */
|
---|
| 515 | HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length);
|
---|
| 516 |
|
---|
| 517 | /* Change ADC state */
|
---|
| 518 | hadc->State = HAL_ADC_STATE_BUSY_REG;
|
---|
| 519 |
|
---|
| 520 | /* Check if ADC peripheral is disabled in order to enable it and wait during
|
---|
| 521 | Tstab time the ADC's stabilization */
|
---|
| 522 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
|
---|
| 523 | {
|
---|
| 524 | /* Enable the Peripheral */
|
---|
| 525 | __HAL_ADC_ENABLE(hadc);
|
---|
| 526 |
|
---|
| 527 | /* Delay for temperature sensor stabilization time */
|
---|
| 528 | /* Compute number of CPU cycles to wait for */
|
---|
| 529 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
|
---|
| 530 | while(counter != 0)
|
---|
| 531 | {
|
---|
| 532 | counter--;
|
---|
| 533 | }
|
---|
| 534 | }
|
---|
| 535 |
|
---|
| 536 | /* if no external trigger present enable software conversion of regular channels */
|
---|
| 537 | if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
|
---|
| 538 | {
|
---|
| 539 | /* Enable the selected ADC software conversion for regular group */
|
---|
| 540 | hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
|
---|
| 541 | }
|
---|
| 542 |
|
---|
| 543 | /* Process unlocked */
|
---|
| 544 | __HAL_UNLOCK(hadc);
|
---|
| 545 |
|
---|
| 546 | /* Return function status */
|
---|
| 547 | return HAL_OK;
|
---|
| 548 | }
|
---|
| 549 |
|
---|
| 550 | /**
|
---|
| 551 | * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral
|
---|
| 552 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
---|
| 553 | * the configuration information for the specified ADC.
|
---|
| 554 | * @retval HAL status
|
---|
| 555 | */
|
---|
| 556 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
|
---|
| 557 | {
|
---|
| 558 | /* Process locked */
|
---|
| 559 | __HAL_LOCK(hadc);
|
---|
| 560 |
|
---|
| 561 | /* Enable the Peripheral */
|
---|
| 562 | __HAL_ADC_DISABLE(hadc);
|
---|
| 563 |
|
---|
| 564 | /* Disable ADC overrun interrupt */
|
---|
| 565 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
|
---|
| 566 |
|
---|
| 567 | /* Disable the selected ADC DMA request after last transfer */
|
---|
| 568 | ADC->CCR &= ~ADC_CCR_DDS;
|
---|
| 569 |
|
---|
| 570 | /* Disable the ADC DMA Stream */
|
---|
| 571 | HAL_DMA_Abort(hadc->DMA_Handle);
|
---|
| 572 |
|
---|
| 573 | /* Change ADC state */
|
---|
| 574 | hadc->State = HAL_ADC_STATE_READY;
|
---|
| 575 |
|
---|
| 576 | /* Process unlocked */
|
---|
| 577 | __HAL_UNLOCK(hadc);
|
---|
| 578 |
|
---|
| 579 | /* Return function status */
|
---|
| 580 | return HAL_OK;
|
---|
| 581 | }
|
---|
| 582 |
|
---|
| 583 | /**
|
---|
| 584 | * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
|
---|
| 585 | * data in the selected multi mode.
|
---|
| 586 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
---|
| 587 | * the configuration information for the specified ADC.
|
---|
| 588 | * @retval The converted data value.
|
---|
| 589 | */
|
---|
| 590 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
|
---|
| 591 | {
|
---|
| 592 | /* Return the multi mode conversion value */
|
---|
| 593 | return ADC->CDR;
|
---|
| 594 | }
|
---|
| 595 |
|
---|
| 596 | /**
|
---|
| 597 | * @brief Injected conversion complete callback in non blocking mode
|
---|
| 598 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
---|
| 599 | * the configuration information for the specified ADC.
|
---|
| 600 | * @retval None
|
---|
| 601 | */
|
---|
| 602 | __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
|
---|
| 603 | {
|
---|
| 604 | /* NOTE : This function Should not be modified, when the callback is needed,
|
---|
| 605 | the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file
|
---|
| 606 | */
|
---|
| 607 | }
|
---|
| 608 |
|
---|
| 609 | /**
|
---|
| 610 | * @brief Configures for the selected ADC injected channel its corresponding
|
---|
| 611 | * rank in the sequencer and its sample time.
|
---|
| 612 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
---|
| 613 | * the configuration information for the specified ADC.
|
---|
| 614 | * @param sConfigInjected: ADC configuration structure for injected channel.
|
---|
| 615 | * @retval None
|
---|
| 616 | */
|
---|
| 617 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
|
---|
| 618 | {
|
---|
| 619 |
|
---|
| 620 | #ifdef USE_FULL_ASSERT
|
---|
| 621 | uint32_t tmp = 0;
|
---|
| 622 | #endif /* USE_FULL_ASSERT */
|
---|
| 623 |
|
---|
| 624 | /* Check the parameters */
|
---|
| 625 | assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
|
---|
| 626 | assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
|
---|
| 627 | assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
|
---|
| 628 | assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv));
|
---|
| 629 | assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion));
|
---|
| 630 | assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
|
---|
| 631 | assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
|
---|
| 632 |
|
---|
| 633 | #ifdef USE_FULL_ASSERT
|
---|
| 634 | tmp = ADC_GET_RESOLUTION(hadc);
|
---|
| 635 | assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
|
---|
| 636 | #endif /* USE_FULL_ASSERT */
|
---|
| 637 |
|
---|
| 638 | if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START)
|
---|
| 639 | {
|
---|
| 640 | assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
|
---|
| 641 | }
|
---|
| 642 |
|
---|
| 643 | /* Process locked */
|
---|
| 644 | __HAL_LOCK(hadc);
|
---|
| 645 |
|
---|
| 646 | /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
|
---|
| 647 | if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9)
|
---|
| 648 | {
|
---|
| 649 | /* Clear the old sample time */
|
---|
| 650 | hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
|
---|
| 651 |
|
---|
| 652 | /* Set the new sample time */
|
---|
| 653 | hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
|
---|
| 654 | }
|
---|
| 655 | else /* ADC_Channel include in ADC_Channel_[0..9] */
|
---|
| 656 | {
|
---|
| 657 | /* Clear the old sample time */
|
---|
| 658 | hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
|
---|
| 659 |
|
---|
| 660 | /* Set the new sample time */
|
---|
| 661 | hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
|
---|
| 662 | }
|
---|
| 663 |
|
---|
| 664 | /*---------------------------- ADCx JSQR Configuration -----------------*/
|
---|
| 665 | hadc->Instance->JSQR &= ~(ADC_JSQR_JL);
|
---|
| 666 | hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion);
|
---|
| 667 |
|
---|
| 668 | /* Rank configuration */
|
---|
| 669 |
|
---|
| 670 | /* Clear the old SQx bits for the selected rank */
|
---|
| 671 | hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
|
---|
| 672 |
|
---|
| 673 | /* Set the SQx bits for the selected rank */
|
---|
| 674 | hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
|
---|
| 675 |
|
---|
| 676 | /* Enable external trigger if trigger selection is different of software */
|
---|
| 677 | /* start. */
|
---|
| 678 | /* Note: This configuration keeps the hardware feature of parameter */
|
---|
| 679 | /* ExternalTrigConvEdge "trigger edge none" equivalent to */
|
---|
| 680 | /* software start. */
|
---|
| 681 | if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
|
---|
| 682 | {
|
---|
| 683 | /* Select external trigger to start conversion */
|
---|
| 684 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
|
---|
| 685 | hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv;
|
---|
| 686 |
|
---|
| 687 | /* Select external trigger polarity */
|
---|
| 688 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
|
---|
| 689 | hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
|
---|
| 690 | }
|
---|
| 691 | else
|
---|
| 692 | {
|
---|
| 693 | /* Reset the external trigger */
|
---|
| 694 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
|
---|
| 695 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
|
---|
| 696 | }
|
---|
| 697 |
|
---|
| 698 | if (sConfigInjected->AutoInjectedConv != DISABLE)
|
---|
| 699 | {
|
---|
| 700 | /* Enable the selected ADC automatic injected group conversion */
|
---|
| 701 | hadc->Instance->CR1 |= ADC_CR1_JAUTO;
|
---|
| 702 | }
|
---|
| 703 | else
|
---|
| 704 | {
|
---|
| 705 | /* Disable the selected ADC automatic injected group conversion */
|
---|
| 706 | hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO);
|
---|
| 707 | }
|
---|
| 708 |
|
---|
| 709 | if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE)
|
---|
| 710 | {
|
---|
| 711 | /* Enable the selected ADC injected discontinuous mode */
|
---|
| 712 | hadc->Instance->CR1 |= ADC_CR1_JDISCEN;
|
---|
| 713 | }
|
---|
| 714 | else
|
---|
| 715 | {
|
---|
| 716 | /* Disable the selected ADC injected discontinuous mode */
|
---|
| 717 | hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN);
|
---|
| 718 | }
|
---|
| 719 |
|
---|
| 720 | switch(sConfigInjected->InjectedRank)
|
---|
| 721 | {
|
---|
| 722 | case 1:
|
---|
| 723 | /* Set injected channel 1 offset */
|
---|
| 724 | hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
|
---|
| 725 | hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset;
|
---|
| 726 | break;
|
---|
| 727 | case 2:
|
---|
| 728 | /* Set injected channel 2 offset */
|
---|
| 729 | hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
|
---|
| 730 | hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset;
|
---|
| 731 | break;
|
---|
| 732 | case 3:
|
---|
| 733 | /* Set injected channel 3 offset */
|
---|
| 734 | hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
|
---|
| 735 | hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset;
|
---|
| 736 | break;
|
---|
| 737 | default:
|
---|
| 738 | /* Set injected channel 4 offset */
|
---|
| 739 | hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
|
---|
| 740 | hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset;
|
---|
| 741 | break;
|
---|
| 742 | }
|
---|
| 743 |
|
---|
| 744 | /* if ADC1 Channel_18 is selected enable VBAT Channel */
|
---|
| 745 | if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT))
|
---|
| 746 | {
|
---|
| 747 | /* Enable the VBAT channel*/
|
---|
| 748 | ADC->CCR |= ADC_CCR_VBATE;
|
---|
| 749 | }
|
---|
| 750 |
|
---|
| 751 | /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
|
---|
| 752 | if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)))
|
---|
| 753 | {
|
---|
| 754 | /* Enable the TSVREFE channel*/
|
---|
| 755 | ADC->CCR |= ADC_CCR_TSVREFE;
|
---|
| 756 | }
|
---|
| 757 |
|
---|
| 758 | /* Process unlocked */
|
---|
| 759 | __HAL_UNLOCK(hadc);
|
---|
| 760 |
|
---|
| 761 | /* Return function status */
|
---|
| 762 | return HAL_OK;
|
---|
| 763 | }
|
---|
| 764 |
|
---|
| 765 | /**
|
---|
| 766 | * @brief Configures the ADC multi-mode
|
---|
| 767 | * @param hadc : pointer to a ADC_HandleTypeDef structure that contains
|
---|
| 768 | * the configuration information for the specified ADC.
|
---|
| 769 | * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains
|
---|
| 770 | * the configuration information for multimode.
|
---|
| 771 | * @retval HAL status
|
---|
| 772 | */
|
---|
| 773 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
|
---|
| 774 | {
|
---|
| 775 | /* Check the parameters */
|
---|
| 776 | assert_param(IS_ADC_MODE(multimode->Mode));
|
---|
| 777 | assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
|
---|
| 778 | assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
|
---|
| 779 |
|
---|
| 780 | /* Process locked */
|
---|
| 781 | __HAL_LOCK(hadc);
|
---|
| 782 |
|
---|
| 783 | /* Set ADC mode */
|
---|
| 784 | ADC->CCR &= ~(ADC_CCR_MULTI);
|
---|
| 785 | ADC->CCR |= multimode->Mode;
|
---|
| 786 |
|
---|
| 787 | /* Set the ADC DMA access mode */
|
---|
| 788 | ADC->CCR &= ~(ADC_CCR_DMA);
|
---|
| 789 | ADC->CCR |= multimode->DMAAccessMode;
|
---|
| 790 |
|
---|
| 791 | /* Set delay between two sampling phases */
|
---|
| 792 | ADC->CCR &= ~(ADC_CCR_DELAY);
|
---|
| 793 | ADC->CCR |= multimode->TwoSamplingDelay;
|
---|
| 794 |
|
---|
| 795 | /* Process unlocked */
|
---|
| 796 | __HAL_UNLOCK(hadc);
|
---|
| 797 |
|
---|
| 798 | /* Return function status */
|
---|
| 799 | return HAL_OK;
|
---|
| 800 | }
|
---|
| 801 |
|
---|
| 802 | /**
|
---|
| 803 | * @}
|
---|
| 804 | */
|
---|
| 805 |
|
---|
| 806 | /**
|
---|
| 807 | * @brief DMA transfer complete callback.
|
---|
| 808 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
---|
| 809 | * the configuration information for the specified DMA module.
|
---|
| 810 | * @retval None
|
---|
| 811 | */
|
---|
| 812 | static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma)
|
---|
| 813 | {
|
---|
| 814 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
---|
| 815 |
|
---|
| 816 | /* Check if an injected conversion is ready */
|
---|
| 817 | if(hadc->State == HAL_ADC_STATE_EOC_INJ)
|
---|
| 818 | {
|
---|
| 819 | /* Change ADC state */
|
---|
| 820 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
|
---|
| 821 | }
|
---|
| 822 | else
|
---|
| 823 | {
|
---|
| 824 | /* Change ADC state */
|
---|
| 825 | hadc->State = HAL_ADC_STATE_EOC_REG;
|
---|
| 826 | }
|
---|
| 827 |
|
---|
| 828 | HAL_ADC_ConvCpltCallback(hadc);
|
---|
| 829 | }
|
---|
| 830 |
|
---|
| 831 | /**
|
---|
| 832 | * @brief DMA half transfer complete callback.
|
---|
| 833 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
---|
| 834 | * the configuration information for the specified DMA module.
|
---|
| 835 | * @retval None
|
---|
| 836 | */
|
---|
| 837 | static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma)
|
---|
| 838 | {
|
---|
| 839 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
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| 840 | /* Conversion complete callback */
|
---|
| 841 | HAL_ADC_ConvHalfCpltCallback(hadc);
|
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| 842 | }
|
---|
| 843 |
|
---|
| 844 | /**
|
---|
| 845 | * @brief DMA error callback
|
---|
| 846 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
---|
| 847 | * the configuration information for the specified DMA module.
|
---|
| 848 | * @retval None
|
---|
| 849 | */
|
---|
| 850 | static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma)
|
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| 851 | {
|
---|
| 852 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
---|
| 853 | hadc->State= HAL_ADC_STATE_ERROR;
|
---|
| 854 | /* Set ADC error code to DMA error */
|
---|
| 855 | hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
|
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| 856 | HAL_ADC_ErrorCallback(hadc);
|
---|
| 857 | }
|
---|
| 858 |
|
---|
| 859 | /**
|
---|
| 860 | * @}
|
---|
| 861 | */
|
---|
| 862 |
|
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| 863 | #endif /* HAL_ADC_MODULE_ENABLED */
|
---|
| 864 | /**
|
---|
| 865 | * @}
|
---|
| 866 | */
|
---|
| 867 |
|
---|
| 868 | /**
|
---|
| 869 | * @}
|
---|
| 870 | */
|
---|
| 871 |
|
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| 872 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
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