source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
File size: 29.7 KB
Line 
1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_adc_ex.c
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the ADC extension peripheral:
9 * + Extended features functions
10 *
11 @verbatim
12 ==============================================================================
13 ##### How to use this driver #####
14 ==============================================================================
15 [..]
16 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
17 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
18 (##) ADC pins configuration
19 (+++) Enable the clock for the ADC GPIOs using the following function:
20 __HAL_RCC_GPIOx_CLK_ENABLE()
21 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
22 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
23 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
24 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
25 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
26 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
27 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
28 (+++) Configure and enable two DMA streams stream for managing data
29 transfer from peripheral to memory (output stream)
30 (+++) Associate the initialized DMA handle to the ADC DMA handle
31 using __HAL_LINKDMA()
32 (+++) Configure the priority and enable the NVIC for the transfer complete
33 interrupt on the two DMA Streams. The output stream should have higher
34 priority than the input stream.
35 (#) Configure the ADC Prescaler, conversion resolution and data alignment
36 using the HAL_ADC_Init() function.
37
38 (#) Configure the ADC Injected channels group features, use HAL_ADC_Init()
39 and HAL_ADC_ConfigChannel() functions.
40
41 (#) Three operation modes are available within this driver :
42
43 *** Polling mode IO operation ***
44 =================================
45 [..]
46 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart()
47 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
48 user can specify the value of timeout according to his end application
49 (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function.
50 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop()
51
52 *** Interrupt mode IO operation ***
53 ===================================
54 [..]
55 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT()
56 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
57 (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
58 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
59 (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
60 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
61 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT()
62
63
64 *** DMA mode IO operation ***
65 ==============================
66 [..]
67 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length
68 of data to be transferred at each end of conversion
69 (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
70 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
71 (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
72 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
73 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA()
74
75 *** Multi mode ADCs Regular channels configuration ***
76 ======================================================
77 [..]
78 (+) Select the Multi mode ADC regular channels features (dual or triple mode)
79 and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions.
80 (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length
81 of data to be transferred at each end of conversion
82 (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function.
83
84
85 @endverbatim
86 ******************************************************************************
87 * @attention
88 *
89 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
90 *
91 * Redistribution and use in source and binary forms, with or without modification,
92 * are permitted provided that the following conditions are met:
93 * 1. Redistributions of source code must retain the above copyright notice,
94 * this list of conditions and the following disclaimer.
95 * 2. Redistributions in binary form must reproduce the above copyright notice,
96 * this list of conditions and the following disclaimer in the documentation
97 * and/or other materials provided with the distribution.
98 * 3. Neither the name of STMicroelectronics nor the names of its contributors
99 * may be used to endorse or promote products derived from this software
100 * without specific prior written permission.
101 *
102 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
103 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
104 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
105 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
106 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
107 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
108 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
109 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
110 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
111 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
112 *
113 ******************************************************************************
114 */
115
116/* Includes ------------------------------------------------------------------*/
117#include "stm32f4xx_hal.h"
118
119/** @addtogroup STM32F4xx_HAL_Driver
120 * @{
121 */
122
123/** @defgroup ADCEx ADCEx
124 * @brief ADC Extended driver modules
125 * @{
126 */
127
128#ifdef HAL_ADC_MODULE_ENABLED
129
130/* Private typedef -----------------------------------------------------------*/
131/* Private define ------------------------------------------------------------*/
132/* Private macro -------------------------------------------------------------*/
133/* Private variables ---------------------------------------------------------*/
134/** @addtogroup ADCEx_Private_Functions
135 * @{
136 */
137/* Private function prototypes -----------------------------------------------*/
138static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma);
139static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma);
140static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma);
141/**
142 * @}
143 */
144
145/* Exported functions --------------------------------------------------------*/
146/** @defgroup ADCEx_Exported_Functions ADC Exported Functions
147 * @{
148 */
149
150/** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions
151 * @brief Extended features functions
152 *
153@verbatim
154 ===============================================================================
155 ##### Extended features functions #####
156 ===============================================================================
157 [..] This section provides functions allowing to:
158 (+) Start conversion of injected channel.
159 (+) Stop conversion of injected channel.
160 (+) Start multimode and enable DMA transfer.
161 (+) Stop multimode and disable DMA transfer.
162 (+) Get result of injected channel conversion.
163 (+) Get result of multimode conversion.
164 (+) Configure injected channels.
165 (+) Configure multimode.
166
167@endverbatim
168 * @{
169 */
170
171/**
172 * @brief Enables the selected ADC software start conversion of the injected channels.
173 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
174 * the configuration information for the specified ADC.
175 * @retval HAL status
176 */
177HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
178{
179 __IO uint32_t counter = 0;
180 uint32_t tmp1 = 0, tmp2 = 0;
181
182 /* Process locked */
183 __HAL_LOCK(hadc);
184
185 /* Check if a regular conversion is ongoing */
186 if(hadc->State == HAL_ADC_STATE_BUSY_REG)
187 {
188 /* Change ADC state */
189 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
190 }
191 else
192 {
193 /* Change ADC state */
194 hadc->State = HAL_ADC_STATE_BUSY_INJ;
195 }
196
197 /* Check if ADC peripheral is disabled in order to enable it and wait during
198 Tstab time the ADC's stabilization */
199 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
200 {
201 /* Enable the Peripheral */
202 __HAL_ADC_ENABLE(hadc);
203
204 /* Delay for temperature sensor stabilization time */
205 /* Compute number of CPU cycles to wait for */
206 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
207 while(counter != 0)
208 {
209 counter--;
210 }
211 }
212
213 /* Check if Multimode enabled */
214 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
215 {
216 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
217 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
218 if(tmp1 && tmp2)
219 {
220 /* Enable the selected ADC software conversion for injected group */
221 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
222 }
223 }
224 else
225 {
226 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
227 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
228 if((hadc->Instance == ADC1) && tmp1 && tmp2)
229 {
230 /* Enable the selected ADC software conversion for injected group */
231 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
232 }
233 }
234
235 /* Process unlocked */
236 __HAL_UNLOCK(hadc);
237
238 /* Return function status */
239 return HAL_OK;
240}
241
242/**
243 * @brief Enables the interrupt and starts ADC conversion of injected channels.
244 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
245 * the configuration information for the specified ADC.
246 *
247 * @retval HAL status.
248 */
249HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
250{
251 __IO uint32_t counter = 0;
252 uint32_t tmp1 = 0, tmp2 =0;
253
254 /* Process locked */
255 __HAL_LOCK(hadc);
256
257 /* Check if a regular conversion is ongoing */
258 if(hadc->State == HAL_ADC_STATE_BUSY_REG)
259 {
260 /* Change ADC state */
261 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
262 }
263 else
264 {
265 /* Change ADC state */
266 hadc->State = HAL_ADC_STATE_BUSY_INJ;
267 }
268
269 /* Set ADC error code to none */
270 hadc->ErrorCode = HAL_ADC_ERROR_NONE;
271
272 /* Check if ADC peripheral is disabled in order to enable it and wait during
273 Tstab time the ADC's stabilization */
274 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
275 {
276 /* Enable the Peripheral */
277 __HAL_ADC_ENABLE(hadc);
278
279 /* Delay for temperature sensor stabilization time */
280 /* Compute number of CPU cycles to wait for */
281 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
282 while(counter != 0)
283 {
284 counter--;
285 }
286 }
287
288 /* Enable the ADC end of conversion interrupt for injected group */
289 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
290
291 /* Enable the ADC overrun interrupt */
292 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
293
294 /* Check if Multimode enabled */
295 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
296 {
297 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
298 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
299 if(tmp1 && tmp2)
300 {
301 /* Enable the selected ADC software conversion for injected group */
302 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
303 }
304 }
305 else
306 {
307 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
308 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
309 if((hadc->Instance == ADC1) && tmp1 && tmp2)
310 {
311 /* Enable the selected ADC software conversion for injected group */
312 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
313 }
314 }
315
316 /* Process unlocked */
317 __HAL_UNLOCK(hadc);
318
319 /* Return function status */
320 return HAL_OK;
321}
322
323/**
324 * @brief Disables ADC and stop conversion of injected channels.
325 *
326 * @note Caution: This function will stop also regular channels.
327 *
328 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
329 * the configuration information for the specified ADC.
330 * @retval HAL status.
331 */
332HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
333{
334 /* Disable the Peripheral */
335 __HAL_ADC_DISABLE(hadc);
336
337 /* Change ADC state */
338 hadc->State = HAL_ADC_STATE_READY;
339
340 /* Return function status */
341 return HAL_OK;
342}
343
344/**
345 * @brief Poll for injected conversion complete
346 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
347 * the configuration information for the specified ADC.
348 * @param Timeout: Timeout value in millisecond.
349 * @retval HAL status
350 */
351HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
352{
353 uint32_t tickstart = 0;
354
355 /* Get tick */
356 tickstart = HAL_GetTick();
357
358 /* Check End of conversion flag */
359 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC)))
360 {
361 /* Check for the Timeout */
362 if(Timeout != HAL_MAX_DELAY)
363 {
364 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
365 {
366 hadc->State= HAL_ADC_STATE_TIMEOUT;
367 /* Process unlocked */
368 __HAL_UNLOCK(hadc);
369 return HAL_TIMEOUT;
370 }
371 }
372 }
373
374 /* Check if a regular conversion is ready */
375 if(hadc->State == HAL_ADC_STATE_EOC_REG)
376 {
377 /* Change ADC state */
378 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
379 }
380 else
381 {
382 /* Change ADC state */
383 hadc->State = HAL_ADC_STATE_EOC_INJ;
384 }
385
386 /* Return ADC state */
387 return HAL_OK;
388}
389
390/**
391 * @brief Disables the interrupt and stop ADC conversion of injected channels.
392 *
393 * @note Caution: This function will stop also regular channels.
394 *
395 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
396 * the configuration information for the specified ADC.
397 * @retval HAL status.
398 */
399HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
400{
401 /* Disable the ADC end of conversion interrupt for regular group */
402 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
403
404 /* Disable the ADC end of conversion interrupt for injected group */
405 __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE);
406
407 /* Enable the Peripheral */
408 __HAL_ADC_DISABLE(hadc);
409
410 /* Change ADC state */
411 hadc->State = HAL_ADC_STATE_READY;
412
413 /* Return function status */
414 return HAL_OK;
415}
416
417/**
418 * @brief Gets the converted value from data register of injected channel.
419 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
420 * the configuration information for the specified ADC.
421 * @param InjectedRank: the ADC injected rank.
422 * This parameter can be one of the following values:
423 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
424 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
425 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
426 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
427 * @retval None
428 */
429uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
430{
431 __IO uint32_t tmp = 0;
432
433 /* Check the parameters */
434 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
435
436 /* Clear the ADCx's flag for injected end of conversion */
437 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC);
438
439 /* Return the selected ADC converted value */
440 switch(InjectedRank)
441 {
442 case ADC_INJECTED_RANK_4:
443 {
444 tmp = hadc->Instance->JDR4;
445 }
446 break;
447 case ADC_INJECTED_RANK_3:
448 {
449 tmp = hadc->Instance->JDR3;
450 }
451 break;
452 case ADC_INJECTED_RANK_2:
453 {
454 tmp = hadc->Instance->JDR2;
455 }
456 break;
457 case ADC_INJECTED_RANK_1:
458 {
459 tmp = hadc->Instance->JDR1;
460 }
461 break;
462 default:
463 break;
464 }
465 return tmp;
466}
467
468/**
469 * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral
470 *
471 * @note Caution: This function must be used only with the ADC master.
472 *
473 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
474 * the configuration information for the specified ADC.
475 * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
476 * @param Length: The length of data to be transferred from ADC peripheral to memory.
477 * @retval HAL status
478 */
479HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
480{
481 __IO uint32_t counter = 0;
482
483 /* Check the parameters */
484 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
485 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
486 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
487
488 /* Process locked */
489 __HAL_LOCK(hadc);
490
491 /* Enable ADC overrun interrupt */
492 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
493
494 if (hadc->Init.DMAContinuousRequests != DISABLE)
495 {
496 /* Enable the selected ADC DMA request after last transfer */
497 ADC->CCR |= ADC_CCR_DDS;
498 }
499 else
500 {
501 /* Disable the selected ADC EOC rising on each regular channel conversion */
502 ADC->CCR &= ~ADC_CCR_DDS;
503 }
504
505 /* Set the DMA transfer complete callback */
506 hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt;
507
508 /* Set the DMA half transfer complete callback */
509 hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt;
510
511 /* Set the DMA error callback */
512 hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ;
513
514 /* Enable the DMA Stream */
515 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length);
516
517 /* Change ADC state */
518 hadc->State = HAL_ADC_STATE_BUSY_REG;
519
520 /* Check if ADC peripheral is disabled in order to enable it and wait during
521 Tstab time the ADC's stabilization */
522 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
523 {
524 /* Enable the Peripheral */
525 __HAL_ADC_ENABLE(hadc);
526
527 /* Delay for temperature sensor stabilization time */
528 /* Compute number of CPU cycles to wait for */
529 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
530 while(counter != 0)
531 {
532 counter--;
533 }
534 }
535
536 /* if no external trigger present enable software conversion of regular channels */
537 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
538 {
539 /* Enable the selected ADC software conversion for regular group */
540 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
541 }
542
543 /* Process unlocked */
544 __HAL_UNLOCK(hadc);
545
546 /* Return function status */
547 return HAL_OK;
548}
549
550/**
551 * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral
552 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
553 * the configuration information for the specified ADC.
554 * @retval HAL status
555 */
556HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
557{
558 /* Process locked */
559 __HAL_LOCK(hadc);
560
561 /* Enable the Peripheral */
562 __HAL_ADC_DISABLE(hadc);
563
564 /* Disable ADC overrun interrupt */
565 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
566
567 /* Disable the selected ADC DMA request after last transfer */
568 ADC->CCR &= ~ADC_CCR_DDS;
569
570 /* Disable the ADC DMA Stream */
571 HAL_DMA_Abort(hadc->DMA_Handle);
572
573 /* Change ADC state */
574 hadc->State = HAL_ADC_STATE_READY;
575
576 /* Process unlocked */
577 __HAL_UNLOCK(hadc);
578
579 /* Return function status */
580 return HAL_OK;
581}
582
583/**
584 * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
585 * data in the selected multi mode.
586 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
587 * the configuration information for the specified ADC.
588 * @retval The converted data value.
589 */
590uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
591{
592 /* Return the multi mode conversion value */
593 return ADC->CDR;
594}
595
596/**
597 * @brief Injected conversion complete callback in non blocking mode
598 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
599 * the configuration information for the specified ADC.
600 * @retval None
601 */
602__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
603{
604 /* NOTE : This function Should not be modified, when the callback is needed,
605 the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file
606 */
607}
608
609/**
610 * @brief Configures for the selected ADC injected channel its corresponding
611 * rank in the sequencer and its sample time.
612 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
613 * the configuration information for the specified ADC.
614 * @param sConfigInjected: ADC configuration structure for injected channel.
615 * @retval None
616 */
617HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
618{
619
620#ifdef USE_FULL_ASSERT
621 uint32_t tmp = 0;
622#endif /* USE_FULL_ASSERT */
623
624 /* Check the parameters */
625 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
626 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
627 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
628 assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv));
629 assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion));
630 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
631 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
632
633#ifdef USE_FULL_ASSERT
634 tmp = ADC_GET_RESOLUTION(hadc);
635 assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
636#endif /* USE_FULL_ASSERT */
637
638 if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START)
639 {
640 assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
641 }
642
643 /* Process locked */
644 __HAL_LOCK(hadc);
645
646 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
647 if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9)
648 {
649 /* Clear the old sample time */
650 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
651
652 /* Set the new sample time */
653 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
654 }
655 else /* ADC_Channel include in ADC_Channel_[0..9] */
656 {
657 /* Clear the old sample time */
658 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
659
660 /* Set the new sample time */
661 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
662 }
663
664 /*---------------------------- ADCx JSQR Configuration -----------------*/
665 hadc->Instance->JSQR &= ~(ADC_JSQR_JL);
666 hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion);
667
668 /* Rank configuration */
669
670 /* Clear the old SQx bits for the selected rank */
671 hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
672
673 /* Set the SQx bits for the selected rank */
674 hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
675
676 /* Enable external trigger if trigger selection is different of software */
677 /* start. */
678 /* Note: This configuration keeps the hardware feature of parameter */
679 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
680 /* software start. */
681 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
682 {
683 /* Select external trigger to start conversion */
684 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
685 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv;
686
687 /* Select external trigger polarity */
688 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
689 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
690 }
691 else
692 {
693 /* Reset the external trigger */
694 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
695 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
696 }
697
698 if (sConfigInjected->AutoInjectedConv != DISABLE)
699 {
700 /* Enable the selected ADC automatic injected group conversion */
701 hadc->Instance->CR1 |= ADC_CR1_JAUTO;
702 }
703 else
704 {
705 /* Disable the selected ADC automatic injected group conversion */
706 hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO);
707 }
708
709 if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE)
710 {
711 /* Enable the selected ADC injected discontinuous mode */
712 hadc->Instance->CR1 |= ADC_CR1_JDISCEN;
713 }
714 else
715 {
716 /* Disable the selected ADC injected discontinuous mode */
717 hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN);
718 }
719
720 switch(sConfigInjected->InjectedRank)
721 {
722 case 1:
723 /* Set injected channel 1 offset */
724 hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
725 hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset;
726 break;
727 case 2:
728 /* Set injected channel 2 offset */
729 hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
730 hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset;
731 break;
732 case 3:
733 /* Set injected channel 3 offset */
734 hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
735 hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset;
736 break;
737 default:
738 /* Set injected channel 4 offset */
739 hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
740 hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset;
741 break;
742 }
743
744 /* if ADC1 Channel_18 is selected enable VBAT Channel */
745 if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT))
746 {
747 /* Enable the VBAT channel*/
748 ADC->CCR |= ADC_CCR_VBATE;
749 }
750
751 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
752 if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)))
753 {
754 /* Enable the TSVREFE channel*/
755 ADC->CCR |= ADC_CCR_TSVREFE;
756 }
757
758 /* Process unlocked */
759 __HAL_UNLOCK(hadc);
760
761 /* Return function status */
762 return HAL_OK;
763}
764
765/**
766 * @brief Configures the ADC multi-mode
767 * @param hadc : pointer to a ADC_HandleTypeDef structure that contains
768 * the configuration information for the specified ADC.
769 * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains
770 * the configuration information for multimode.
771 * @retval HAL status
772 */
773HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
774{
775 /* Check the parameters */
776 assert_param(IS_ADC_MODE(multimode->Mode));
777 assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
778 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
779
780 /* Process locked */
781 __HAL_LOCK(hadc);
782
783 /* Set ADC mode */
784 ADC->CCR &= ~(ADC_CCR_MULTI);
785 ADC->CCR |= multimode->Mode;
786
787 /* Set the ADC DMA access mode */
788 ADC->CCR &= ~(ADC_CCR_DMA);
789 ADC->CCR |= multimode->DMAAccessMode;
790
791 /* Set delay between two sampling phases */
792 ADC->CCR &= ~(ADC_CCR_DELAY);
793 ADC->CCR |= multimode->TwoSamplingDelay;
794
795 /* Process unlocked */
796 __HAL_UNLOCK(hadc);
797
798 /* Return function status */
799 return HAL_OK;
800}
801
802/**
803 * @}
804 */
805
806 /**
807 * @brief DMA transfer complete callback.
808 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
809 * the configuration information for the specified DMA module.
810 * @retval None
811 */
812static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma)
813{
814 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
815
816 /* Check if an injected conversion is ready */
817 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
818 {
819 /* Change ADC state */
820 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
821 }
822 else
823 {
824 /* Change ADC state */
825 hadc->State = HAL_ADC_STATE_EOC_REG;
826 }
827
828 HAL_ADC_ConvCpltCallback(hadc);
829}
830
831/**
832 * @brief DMA half transfer complete callback.
833 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
834 * the configuration information for the specified DMA module.
835 * @retval None
836 */
837static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma)
838{
839 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
840 /* Conversion complete callback */
841 HAL_ADC_ConvHalfCpltCallback(hadc);
842}
843
844/**
845 * @brief DMA error callback
846 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
847 * the configuration information for the specified DMA module.
848 * @retval None
849 */
850static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma)
851{
852 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
853 hadc->State= HAL_ADC_STATE_ERROR;
854 /* Set ADC error code to DMA error */
855 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
856 HAL_ADC_ErrorCallback(hadc);
857}
858
859/**
860 * @}
861 */
862
863#endif /* HAL_ADC_MODULE_ENABLED */
864/**
865 * @}
866 */
867
868/**
869 * @}
870 */
871
872/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Note: See TracBrowser for help on using the repository browser.