[302] | 1 | /*
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| 2 | * TOPPERS/ASP Kernel
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| 3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
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| 4 | * Advanced Standard Profile Kernel
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| 5 | *
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| 6 | * Copyright (C) 2006-2015 by Embedded and Real-Time Systems Laboratory
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| 7 | * Graduate School of Information Science, Nagoya Univ., JAPAN
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| 8 | *
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| 9 | * ä¸è¨èä½æ¨©è
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| 10 | ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
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| 11 | * ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹
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| 12 | * å¤ã»åé
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| 13 | å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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| 14 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
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| 15 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
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| 16 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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| 17 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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| 18 | * ç¨ã§ããå½¢ã§åé
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| 19 | å¸ããå ´åã«ã¯ï¼åé
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| 20 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
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| 21 | * è
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| 22 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
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| 23 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 24 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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| 25 | * ç¨ã§ããªãå½¢ã§åé
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| 26 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
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| 27 | * ã¨ï¼
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| 28 | * (a) åé
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| 29 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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| 30 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
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| 31 | * ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 32 | * (b) åé
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| 33 | å¸ã®å½¢æ
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| 34 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
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| 35 | * å ±åãããã¨ï¼
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| 36 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
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| 37 | * 害ãããï¼ä¸è¨èä½æ¨©è
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| 38 | ããã³TOPPERSããã¸ã§ã¯ããå
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| 39 | 責ãããã¨ï¼
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| 40 | * ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
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| 41 | * ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
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| 42 | ããã³TOPPERSããã¸ã§ã¯ãã
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| 43 | * å
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| 44 | 責ãããã¨ï¼
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| 45 | *
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| 46 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
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| 47 | ã
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| 48 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
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| 49 | * ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
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| 50 | * ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ã
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| 51 | * ã®è²¬ä»»ãè² ããªãï¼
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| 52 | *
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| 53 | * $Id: chip_timer.c 358 2015-07-26 10:26:23Z ertl-hiro $
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| 54 | */
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| 55 |
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| 56 | /*
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| 57 | * ã¿ã¤ããã©ã¤ãï¼MPCoreå
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| 58 | èµã¿ã¤ãç¨ï¼
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| 59 | *
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| 60 | * MPCoreãããã»ããµæ¯ã«æã£ã¦ãããã©ã¤ãã¼ãã¿ã¤ãã¨ã¦ã©ããããã°
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| 61 | * ãç¨ãã¦ï¼é«å解è½ã¿ã¤ããã©ã¤ããå®ç¾ããï¼
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| 62 | */
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| 63 |
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| 64 | #include "kernel_impl.h"
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| 65 | #include "time_event.h"
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| 66 | #include "target_timer.h"
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| 67 | #include <sil.h>
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| 68 | #include "mpcore.h"
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| 69 |
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| 70 | /*
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| 71 | * ã¿ã¤ãå²è¾¼ã¿è¦æ±ã®ã¯ãªã¢
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| 72 | *
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| 73 | * ã¿ã¤ãã®å²è¾¼ã¿ãã³ãã£ã³ã°ããããã¯ãªã¢ããï¼
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| 74 | */
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| 75 | Inline void
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| 76 | target_hrt_int_clear()
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| 77 | {
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| 78 | sil_wrw_mem(MPCORE_TMR_ISR, MPCORE_TMR_ISR_EVENTFLAG);
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| 79 | }
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| 80 |
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| 81 | /*
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| 82 | * ã¿ã¤ãã®èµ·åå¦ç
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| 83 | */
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| 84 | void
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| 85 | target_hrt_initialize(intptr_t exinf)
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| 86 | {
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| 87 | /*
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| 88 | * ã¿ã¤ãã¨ã¦ã©ããããã°ãåæ¢ããï¼
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| 89 | */
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| 90 | sil_wrw_mem(MPCORE_TMR_CTRL, MPCORE_TMR_CTRL_DISABLE);
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| 91 | sil_wrw_mem(MPCORE_WDG_CTRL, MPCORE_WDG_CTRL_DISABLE);
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| 92 |
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| 93 | /*
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| 94 | * ã¦ã©ããããã°ãã¿ã¤ãã¢ã¼ãã«è¨å®ããï¼
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| 95 | */
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| 96 | sil_wrw_mem(MPCORE_WDG_DIS, 0x12345678);
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| 97 | sil_wrw_mem(MPCORE_WDG_DIS, 0x87654321);
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| 98 | sil_wrw_mem(MPCORE_WDG_CTRL, MPCORE_WDG_CTRL_DISABLE);
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| 99 |
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| 100 | /*
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| 101 | * ã¦ã©ããããã°ã®ãªãã¼ãå¤ã0xffffffffã«è¨å®ãï¼åä½ãéå§ããï¼
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| 102 | */
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| 103 | sil_wrw_mem(MPCORE_WDG_LR, 0xffffffffU);
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| 104 | sil_wrw_mem(MPCORE_WDG_CTRL,
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| 105 | MPCORE_WDG_CTRL_ENABLE | MPCORE_WDG_CTRL_AUTORELOAD
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| 106 | | (MPCORE_WDG_PS_1MHZ << MPCORE_WDG_CTRL_PS_SHIFT));
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| 107 |
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| 108 | /*
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| 109 | * ã¿ã¤ãã®ã«ã¦ã³ãå¤ã0ï¼ã«ã¦ã³ããã¦ã³ãã¦åæ¢ããç¶æ
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| 110 | ï¼ã«è¨å®ãï¼
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| 111 | * åä½ãéå§ããï¼
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| 112 | */
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| 113 | sil_wrw_mem(MPCORE_TMR_CNT, 0U);
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| 114 | sil_wrw_mem(MPCORE_TMR_CTRL,
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| 115 | MPCORE_TMR_CTRL_ENABLE | MPCORE_TMR_CTRL_ENAINT
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| 116 | | (MPCORE_TMR_PS_1MHZ << MPCORE_TMR_CTRL_PS_SHIFT));
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| 117 |
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| 118 | /*
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| 119 | * ã¿ã¤ãå²è¾¼ã¿è¦æ±ãã¯ãªã¢ããï¼
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| 120 | */
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| 121 | target_hrt_int_clear();
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| 122 | }
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| 123 |
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| 124 | /*
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| 125 | * ã¿ã¤ãã®åæ¢å¦ç
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| 126 | */
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| 127 | void
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| 128 | target_hrt_terminate(intptr_t exinf)
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| 129 | {
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| 130 | /*
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| 131 | * ã¿ã¤ãã¨ã¦ã©ããããã°ãåæ¢ããï¼
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| 132 | */
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| 133 | sil_wrw_mem(MPCORE_TMR_CTRL, MPCORE_TMR_CTRL_DISABLE);
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| 134 | sil_wrw_mem(MPCORE_WDG_CTRL, MPCORE_WDG_CTRL_DISABLE);
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| 135 |
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| 136 | /*
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| 137 | * ã¿ã¤ãå²è¾¼ã¿è¦æ±ãã¯ãªã¢ããï¼
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| 138 | */
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| 139 | target_hrt_int_clear();
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| 140 | }
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| 141 |
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| 142 | /*
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| 143 | * ã¿ã¤ãå²è¾¼ã¿ãã³ãã©
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| 144 | */
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| 145 | void
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| 146 | target_hrt_handler(void)
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| 147 | {
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| 148 | /*
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| 149 | * ã¿ã¤ãå²è¾¼ã¿è¦æ±ãã¯ãªã¢ããï¼
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| 150 | */
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| 151 | target_hrt_int_clear();
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| 152 |
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| 153 | /*
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| 154 | * é«å解è½ã¿ã¤ãå²è¾¼ã¿ãå¦çããï¼
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| 155 | */
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| 156 | signal_time();
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| 157 | }
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