Changeset 374 for asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/spi_api.c
- Timestamp:
- Apr 5, 2019, 9:26:53 PM (5 years ago)
- Location:
- asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX
- Files:
-
- 1 added
- 1 copied
Legend:
- Unmodified
- Added
- Removed
-
asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/spi_api.c
r373 r374 19 19 #include "spi_api.h" 20 20 #include "cmsis.h" 21 #include " pinmap.h"21 #include "PeripheralPins.h" 22 22 #include "mbed_error.h" 23 23 #include "RZ_A1_Init.h" 24 25 static const PinMap PinMap_SPI_SCLK[] = { 26 {P10_12, SPI_0, 4}, 27 {P4_4 , SPI_1, 2}, 28 {P6_4 , SPI_1, 7}, 29 {P11_12, SPI_1, 2}, 30 {P8_3 , SPI_2, 3}, 31 {P5_0 , SPI_3, 8}, 32 {NC , NC , 0} 33 }; 34 35 static const PinMap PinMap_SPI_SSEL[] = { 36 {P10_13, SPI_0, 4}, 37 {P4_5 , SPI_1, 2}, 38 {P6_5 , SPI_1, 7}, 39 {P11_13, SPI_1, 2}, 40 {P8_4 , SPI_2, 3}, 41 {P5_1 , SPI_3, 8}, 42 {NC , NC , 0} 43 }; 44 45 static const PinMap PinMap_SPI_MOSI[] = { 46 {P10_14, SPI_0, 4}, 47 {P4_6 , SPI_1, 2}, 48 {P6_6 , SPI_1, 7}, 49 {P11_14, SPI_1, 2}, 50 {P8_5 , SPI_2, 3}, 51 {P5_2 , SPI_3, 8}, 52 {NC , NC , 0} 53 }; 54 55 static const PinMap PinMap_SPI_MISO[] = { 56 {P10_15, SPI_0, 4}, 57 {P4_7 , SPI_1, 2}, 58 {P6_7 , SPI_1, 7}, 59 {P11_15, SPI_1, 2}, 60 {P8_6 , SPI_2, 3}, 61 {P5_3 , SPI_3, 8}, 62 {NC , NC , 0} 63 }; 24 #include "mbed_drv_cfg.h" 64 25 65 26 static const struct st_rspi *RSPI[] = RSPI_ADDRESS_LIST; … … 88 49 89 50 // enable power and clocking 90 switch (spi) { 91 case SPI_0: CPGSTBCR10 &= ~(0x80); break; 92 case SPI_1: CPGSTBCR10 &= ~(0x40); break; 93 case SPI_2: CPGSTBCR10 &= ~(0x20); break; 94 case SPI_3: CPGSTBCR10 &= ~(0x10); break; 95 } 51 CPGSTBCR10 &= ~(0x80 >> spi); 96 52 dummy = CPGSTBCR10; 53 (void)dummy; 97 54 98 55 obj->spi.spi->SPCR = 0x00; // CTRL to 0 … … 193 150 hz_min = pclk_base / 2 / 256 / 8; 194 151 hz_max = pclk_base / 2; 195 if (( hz < hz_min) || (hz > hz_max)) {152 if (((uint32_t)hz < hz_min) || ((uint32_t)hz > hz_max)) { 196 153 error("Couldn't setup requested SPI frequency"); 197 154 return; … … 294 251 #if DEVICE_SPI_ASYNCH 295 252 296 #define IRQ_NUM 2 253 #define SPI_NUM 5 254 #define IRQ_NUM 2 297 255 298 256 static void spi_irqs_set(spi_t *obj, uint32_t enable); … … 301 259 302 260 static void spi0_rx_irq(void); 261 static void spi0_er_irq(void); 303 262 static void spi1_rx_irq(void); 263 static void spi1_er_irq(void); 304 264 static void spi2_rx_irq(void); 265 static void spi2_er_irq(void); 305 266 static void spi3_rx_irq(void); 267 static void spi3_er_irq(void); 306 268 static void spi4_rx_irq(void); 307 static void spi0_er_irq(void);308 static void spi1_er_irq(void);309 static void spi2_er_irq(void);310 static void spi3_er_irq(void);311 269 static void spi4_er_irq(void); 312 270 313 static const IRQn_Type irq_set_tbl[ RSPI_COUNT][IRQ_NUM] = {271 static const IRQn_Type irq_set_tbl[SPI_NUM][IRQ_NUM] = { 314 272 {RSPISPRI0_IRQn, RSPISPEI0_IRQn}, 315 273 {RSPISPRI1_IRQn, RSPISPEI1_IRQn}, 316 274 {RSPISPRI2_IRQn, RSPISPEI2_IRQn}, 317 275 {RSPISPRI3_IRQn, RSPISPEI3_IRQn}, 318 {RSPISPRI4_IRQn, RSPISPEI4_IRQn} 276 {RSPISPRI4_IRQn, RSPISPEI4_IRQn}, 319 277 }; 320 278 321 static const IRQHandler hander_set_tbl[ RSPI_COUNT][IRQ_NUM] = {279 static const IRQHandler hander_set_tbl[SPI_NUM][IRQ_NUM] = { 322 280 {spi0_rx_irq, spi0_er_irq}, 323 281 {spi1_rx_irq, spi1_er_irq}, 324 282 {spi2_rx_irq, spi2_er_irq}, 325 283 {spi3_rx_irq, spi3_er_irq}, 326 {spi4_rx_irq, spi4_er_irq} 284 {spi4_rx_irq, spi4_er_irq}, 327 285 }; 328 286 … … 332 290 }; 333 291 334 static struct spi_global_data_s spi_data[ RSPI_COUNT];292 static struct spi_global_data_s spi_data[SPI_NUM]; 335 293 336 294 static void spi_rx_irq(IRQn_Type irq_num, uint32_t index) … … 389 347 } 390 348 391 static void spi0_rx_irq(void) 392 { 349 static void spi0_rx_irq(void) { 393 350 spi_rx_irq(RSPISPRI0_IRQn, 0); 394 351 } 395 396 static void spi1_rx_irq(void) 397 { 352 static void spi0_er_irq(void) { 353 spi_err_irq(RSPISPEI0_IRQn, 0); 354 } 355 static void spi1_rx_irq(void) { 398 356 spi_rx_irq(RSPISPRI1_IRQn, 1); 399 357 } 400 401 static void spi2_rx_irq(void) 402 { 358 static void spi1_er_irq(void) { 359 spi_err_irq(RSPISPEI1_IRQn, 1); 360 } 361 static void spi2_rx_irq(void) { 403 362 spi_rx_irq(RSPISPRI2_IRQn, 2); 404 363 } 405 406 static void spi3_rx_irq(void) 407 { 364 static void spi2_er_irq(void) { 365 spi_err_irq(RSPISPEI2_IRQn, 2); 366 } 367 static void spi3_rx_irq(void) { 408 368 spi_rx_irq(RSPISPRI3_IRQn, 3); 409 369 } 410 411 static void spi4_rx_irq(void) 412 { 370 static void spi3_er_irq(void) { 371 spi_err_irq(RSPISPEI3_IRQn, 3); 372 } 373 static void spi4_rx_irq(void) { 413 374 spi_rx_irq(RSPISPRI4_IRQn, 4); 414 375 } 415 416 static void spi0_er_irq(void) 417 { 418 spi_err_irq(RSPISPEI0_IRQn, 0); 419 } 420 421 static void spi1_er_irq(void) 422 { 423 spi_err_irq(RSPISPEI1_IRQn, 1); 424 } 425 426 static void spi2_er_irq(void) 427 { 428 spi_err_irq(RSPISPEI2_IRQn, 2); 429 } 430 431 static void spi3_er_irq(void) 432 { 433 spi_err_irq(RSPISPEI3_IRQn, 3); 434 } 435 436 static void spi4_er_irq(void) 437 { 376 static void spi4_er_irq(void) { 438 377 spi_err_irq(RSPISPEI4_IRQn, 4); 439 378 } … … 448 387 InterruptHandlerRegister(irqTable[i], handlerTable[i]); 449 388 GIC_SetPriority(irqTable[i], 5); 389 GIC_SetConfiguration(irqTable[i], 1); 450 390 GIC_EnableIRQ(irqTable[i]); 451 391 } else { … … 562 502 obj->rx_buff.pos = 0; 563 503 obj->rx_buff.width = bit_width; 564 for (i = 0; i < obj->rx_buff.length; i++) {504 for (i = 0; i < (int)obj->rx_buff.length; i++) { 565 505 ((uint8_t *)obj->rx_buff.buffer)[i] = SPI_FILL_WORD; 566 506 }
Note:
See TracChangeset
for help on using the changeset viewer.