Index: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/can_api.c
===================================================================
--- asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZ_A1H/can_api.c	(revision 352)
+++ asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/can_api.c	(revision 374)
@@ -19,10 +19,14 @@
 #include "RZ_A1_Init.h"
 #include "cmsis.h"
-#include "pinmap.h"
-#include "rscan0_iodefine.h"
+#include "PeripheralPins.h"
+#include "iodefine.h"
 #include "r_typedefs.h"
-#include "MBRZA1H.h"
-
+#include "mbed_drv_cfg.h"
+
+#if defined(TARGET_RZA1H)
 #define CAN_NUM         5
+#else
+#define CAN_NUM         2
+#endif
 #define CAN_SND_RCV     2
 #define IRQ_NUM         8
@@ -32,38 +36,41 @@
 static void can_err_irq(uint32_t ch, CanIrqType type);
 static void can0_rec_irq(void);
+static void can0_trx_irq(void);
+static void can0_err_warning_irq(void);
+static void can0_overrun_irq(void);
+static void can0_passive_irq(void);
+static void can0_arb_lost_irq(void);
+static void can0_bus_err_irq(void);
 static void can1_rec_irq(void);
+static void can1_trx_irq(void);
+static void can1_err_warning_irq(void);
+static void can1_overrun_irq(void);
+static void can1_passive_irq(void);
+static void can1_arb_lost_irq(void);
+static void can1_bus_err_irq(void);
+#if defined(TARGET_RZA1H)
 static void can2_rec_irq(void);
+static void can2_trx_irq(void);
+static void can2_err_warning_irq(void);
+static void can2_overrun_irq(void);
+static void can2_passive_irq(void);
+static void can2_arb_lost_irq(void);
+static void can2_bus_err_irq(void);
 static void can3_rec_irq(void);
+static void can3_trx_irq(void);
+static void can3_err_warning_irq(void);
+static void can3_overrun_irq(void);
+static void can3_passive_irq(void);
+static void can3_arb_lost_irq(void);
+static void can3_bus_err_irq(void);
 static void can4_rec_irq(void);
-static void can0_trx_irq(void);
-static void can1_trx_irq(void);
-static void can2_trx_irq(void);
-static void can3_trx_irq(void);
 static void can4_trx_irq(void);
-static void can0_err_warning_irq(void);
-static void can1_err_warning_irq(void);
-static void can2_err_warning_irq(void);
-static void can3_err_warning_irq(void);
 static void can4_err_warning_irq(void);
-static void can0_overrun_irq(void);
-static void can1_overrun_irq(void);
-static void can2_overrun_irq(void);
-static void can3_overrun_irq(void);
 static void can4_overrun_irq(void);
-static void can0_passive_irq(void);
-static void can1_passive_irq(void);
-static void can2_passive_irq(void);
-static void can3_passive_irq(void);
 static void can4_passive_irq(void);
-static void can0_arb_lost_irq(void);
-static void can1_arb_lost_irq(void);
-static void can2_arb_lost_irq(void);
-static void can3_arb_lost_irq(void);
 static void can4_arb_lost_irq(void);
-static void can0_bus_err_irq(void);
-static void can1_bus_err_irq(void);
-static void can2_bus_err_irq(void);
-static void can3_bus_err_irq(void);
 static void can4_bus_err_irq(void);
+#endif
+
 static void can_reset_reg(can_t *obj);
 static void can_reset_recv_rule(can_t *obj);
@@ -100,43 +107,13 @@
 static int can_initialized[CAN_NUM] = {0};
 
-static const PinMap PinMap_CAN_RD[] = {
-    {P7_8  , CAN_0, 4},
-    {P9_1  , CAN_0, 3},
-    {P1_4  , CAN_1, 3},
-    {P5_9  , CAN_1, 5},
-    {P7_11 , CAN_1, 4},
-    {P11_12, CAN_1, 1},
-    {P4_9  , CAN_2, 6},
-    {P6_4  , CAN_2, 3},
-    {P7_2  , CAN_2, 5},
-    {P2_12 , CAN_3, 5},
-    {P4_2  , CAN_3, 4},
-    {P1_5  , CAN_4, 3},
-    {P2_14 , CAN_4, 5},
-    {NC    , NC   , 0}
-};
-
-static const PinMap PinMap_CAN_TD[] = {
-    {P7_9  , CAN_0, 4},
-    {P9_0  , CAN_0, 3},
-    {P5_10 , CAN_1, 5},
-    {P7_10 , CAN_1, 4},
-    {P11_13, CAN_1, 1},
-    {P4_8  , CAN_2, 6},
-    {P6_5  , CAN_2, 3},
-    {P7_3  , CAN_2, 5},
-    {P2_13 , CAN_3, 5},
-    {P4_3  , CAN_3, 4},
-    {P4_11 , CAN_4, 6},
-    {P8_10 , CAN_4, 5},
-    {NC    , NC   , 0}
-};
 
 static __IO uint32_t *CTR_MATCH[] = {
     &RSCAN0C0CTR,
     &RSCAN0C1CTR,
+#if defined(TARGET_RZA1H)
     &RSCAN0C2CTR,
     &RSCAN0C3CTR,
     &RSCAN0C4CTR,
+#endif
 };
 
@@ -144,7 +121,9 @@
     &RSCAN0C0CFG,
     &RSCAN0C1CFG,
+#if defined(TARGET_RZA1H)
     &RSCAN0C2CFG,
     &RSCAN0C3CFG,
     &RSCAN0C4CFG,
+#endif
 };
 
@@ -163,7 +142,9 @@
     &RSCAN0TXQCC0,
     &RSCAN0TXQCC1,
+#if defined(TARGET_RZA1H)
     &RSCAN0TXQCC2,
     &RSCAN0TXQCC3,
     &RSCAN0TXQCC4,
+#endif
 };
 
@@ -171,7 +152,9 @@
     &RSCAN0THLCC0,
     &RSCAN0THLCC1,
+#if defined(TARGET_RZA1H)
     &RSCAN0THLCC2,
     &RSCAN0THLCC3,
     &RSCAN0THLCC4,
+#endif
 };
 
@@ -179,7 +162,9 @@
     &RSCAN0C0STS,
     &RSCAN0C1STS,
+#if defined(TARGET_RZA1H)
     &RSCAN0C2STS,
     &RSCAN0C3STS,
     &RSCAN0C4STS,
+#endif
 };
 
@@ -187,7 +172,9 @@
     &RSCAN0C0ERFL,
     &RSCAN0C1ERFL,
+#if defined(TARGET_RZA1H)
     &RSCAN0C2ERFL,
     &RSCAN0C3ERFL,
     &RSCAN0C4ERFL,
+#endif
 };
 
@@ -195,7 +182,9 @@
     { &RSCAN0CFCC0 , &RSCAN0CFCC1  },
     { &RSCAN0CFCC3 , &RSCAN0CFCC4  },
+#if defined(TARGET_RZA1H)
     { &RSCAN0CFCC6 , &RSCAN0CFCC7  },
     { &RSCAN0CFCC9 , &RSCAN0CFCC10 },
-    { &RSCAN0CFCC12, &RSCAN0CFCC13 }
+    { &RSCAN0CFCC12, &RSCAN0CFCC13 },
+#endif
 };
 
@@ -203,7 +192,9 @@
     { &RSCAN0CFSTS0 , &RSCAN0CFSTS1  },
     { &RSCAN0CFSTS3 , &RSCAN0CFSTS4  },
+#if defined(TARGET_RZA1H)
     { &RSCAN0CFSTS6 , &RSCAN0CFSTS7  },
     { &RSCAN0CFSTS9 , &RSCAN0CFSTS10 },
-    { &RSCAN0CFSTS12, &RSCAN0CFSTS13 }
+    { &RSCAN0CFSTS12, &RSCAN0CFSTS13 },
+#endif
 };
 
@@ -211,7 +202,9 @@
     { &RSCAN0CFPCTR0 , &RSCAN0CFPCTR1  },
     { &RSCAN0CFPCTR3 , &RSCAN0CFPCTR4  },
+#if defined(TARGET_RZA1H)
     { &RSCAN0CFPCTR6 , &RSCAN0CFPCTR7  },
     { &RSCAN0CFPCTR9 , &RSCAN0CFPCTR10 },
-    { &RSCAN0CFPCTR12, &RSCAN0CFPCTR13 }
+    { &RSCAN0CFPCTR12, &RSCAN0CFPCTR13 },
+#endif
 };
 
@@ -219,7 +212,9 @@
     { &RSCAN0CFID0 , &RSCAN0CFID1  },
     { &RSCAN0CFID3 , &RSCAN0CFID4  },
+#if defined(TARGET_RZA1H)
     { &RSCAN0CFID6 , &RSCAN0CFID7  },
     { &RSCAN0CFID9 , &RSCAN0CFID10 },
-    { &RSCAN0CFID12, &RSCAN0CFID13 }
+    { &RSCAN0CFID12, &RSCAN0CFID13 },
+#endif
 };
 
@@ -227,7 +222,9 @@
     { &RSCAN0CFPTR0 , &RSCAN0CFPTR1  },
     { &RSCAN0CFPTR3 , &RSCAN0CFPTR4  },
+#if defined(TARGET_RZA1H)
     { &RSCAN0CFPTR6 , &RSCAN0CFPTR7  },
     { &RSCAN0CFPTR9 , &RSCAN0CFPTR10 },
     { &RSCAN0CFPTR12, &RSCAN0CFPTR13 }
+#endif
 };
 
@@ -235,7 +232,9 @@
     { &RSCAN0CFDF00 , &RSCAN0CFDF01  },
     { &RSCAN0CFDF03 , &RSCAN0CFDF04  },
+#if defined(TARGET_RZA1H)
     { &RSCAN0CFDF06 , &RSCAN0CFDF07  },
     { &RSCAN0CFDF09 , &RSCAN0CFDF010 },
-    { &RSCAN0CFDF012, &RSCAN0CFDF013 }
+    { &RSCAN0CFDF012, &RSCAN0CFDF013 },
+#endif
 };
 
@@ -243,7 +242,9 @@
     { &RSCAN0CFDF10 , &RSCAN0CFDF11  },
     { &RSCAN0CFDF13 , &RSCAN0CFDF14  },
+#if defined(TARGET_RZA1H)
     { &RSCAN0CFDF16 , &RSCAN0CFDF17  },
     { &RSCAN0CFDF19 , &RSCAN0CFDF110 },
-    { &RSCAN0CFDF112, &RSCAN0CFDF113 }
+    { &RSCAN0CFDF112, &RSCAN0CFDF113 },
+#endif
 };
 
@@ -270,4 +271,5 @@
         { INTRCAN1ERR_IRQn, can1_bus_err_irq     }  /* BeIrq */
     },
+#if defined(TARGET_RZA1H)
     {   /* ch2 */
         { INTRCAN2REC_IRQn, can2_rec_irq         }, /* RxIrq */
@@ -299,5 +301,6 @@
         { INTRCAN4ERR_IRQn, can4_arb_lost_irq    }, /* AlIrq */
         { INTRCAN4ERR_IRQn, can4_bus_err_irq     }  /* BeIrq */
-    }
+    },
+#endif
 };
 
@@ -341,4 +344,5 @@
             InterruptHandlerRegister(can_int_info[obj->ch][type].int_num, can_int_info[obj->ch][type].handler);
             GIC_SetPriority(can_int_info[obj->ch][type].int_num, 5);
+            GIC_SetConfiguration(can_int_info[obj->ch][type].int_num, 1);
             GIC_EnableIRQ(can_int_info[obj->ch][type].int_num);
         } else {
@@ -385,5 +389,5 @@
             break;
         case IRQ_BUS:
-            *dmy_erfl &= 0xFFFF00FF;    // Clear ADERR, B0ERR, B1ERR, CERR, AERR, FERR, SERR
+            *dmy_erfl &= 0xFFFF00FF;    // Clear ADERR、B0ERR、B1ERR、CERR、AERR、FERR、SERR
             *dmy_erfl &= 0xFFFFFFFE;    // Clear BEF
             break;
@@ -404,141 +408,143 @@
 }
 
+static void can0_trx_irq(void) {
+    can_trx_irq(CAN_0);
+}
+
+static void can0_err_warning_irq(void) {
+    can_err_irq(CAN_0, IRQ_ERROR);
+}
+
+static void can0_overrun_irq(void) {
+    can_err_irq(CAN_0, IRQ_OVERRUN);
+}
+
+static void can0_passive_irq(void) {
+    can_err_irq(CAN_0, IRQ_PASSIVE);
+}
+
+static void can0_arb_lost_irq(void) {
+    can_err_irq(CAN_0, IRQ_ARB);
+}
+
+static void can0_bus_err_irq(void) {
+    can_err_irq(CAN_0, IRQ_BUS);
+}
+
 static void can1_rec_irq(void) {
     can_rec_irq(CAN_1);
 }
 
+static void can1_trx_irq(void) {
+    can_trx_irq(CAN_1);
+}
+
+static void can1_err_warning_irq(void) {
+    can_err_irq(CAN_1, IRQ_ERROR);
+}
+
+static void can1_overrun_irq(void) {
+    can_err_irq(CAN_1, IRQ_OVERRUN);
+}
+
+static void can1_passive_irq(void) {
+    can_err_irq(CAN_1, IRQ_PASSIVE);
+}
+
+static void can1_arb_lost_irq(void) {
+    can_err_irq(CAN_1, IRQ_ARB);
+}
+
+static void can1_bus_err_irq(void) {
+    can_err_irq(CAN_1, IRQ_BUS);
+}
+
+#if defined(TARGET_RZA1H)
 static void can2_rec_irq(void) {
     can_rec_irq(CAN_2);
 }
 
+static void can2_trx_irq(void) {
+    can_trx_irq(CAN_2);
+}
+
+static void can2_err_warning_irq(void) {
+    can_err_irq(CAN_2, IRQ_ERROR);
+}
+
+static void can2_overrun_irq(void) {
+    can_err_irq(CAN_2, IRQ_OVERRUN);
+}
+
+static void can2_passive_irq(void) {
+    can_err_irq(CAN_2, IRQ_PASSIVE);
+}
+
+static void can2_arb_lost_irq(void) {
+    can_err_irq(CAN_2, IRQ_ARB);
+}
+
+static void can2_bus_err_irq(void) {
+    can_err_irq(CAN_2, IRQ_BUS);
+}
+
 static void can3_rec_irq(void) {
     can_rec_irq(CAN_3);
 }
 
+static void can3_trx_irq(void) {
+    can_trx_irq(CAN_3);
+}
+
+static void can3_err_warning_irq(void) {
+    can_err_irq(CAN_3, IRQ_ERROR);
+}
+
+static void can3_overrun_irq(void) {
+    can_err_irq(CAN_3, IRQ_OVERRUN);
+}
+
+static void can3_passive_irq(void) {
+    can_err_irq(CAN_3, IRQ_PASSIVE);
+}
+
+static void can3_arb_lost_irq(void) {
+    can_err_irq(CAN_3, IRQ_ARB);
+}
+
+static void can3_bus_err_irq(void) {
+    can_err_irq(CAN_3, IRQ_BUS);
+}
+
 static void can4_rec_irq(void) {
     can_rec_irq(CAN_4);
 }
 
-static void can0_trx_irq(void) {
-    can_trx_irq(CAN_0);
-}
-
-static void can1_trx_irq(void) {
-    can_trx_irq(CAN_1);
-}
-
-static void can2_trx_irq(void) {
-    can_trx_irq(CAN_2);
-}
-
-static void can3_trx_irq(void) {
-    can_trx_irq(CAN_3);
-}
-
 static void can4_trx_irq(void) {
     can_trx_irq(CAN_4);
 }
 
-static void can0_err_warning_irq(void) {
-    can_err_irq(CAN_0, IRQ_ERROR);
-}
-
-static void can1_err_warning_irq(void) {
-    can_err_irq(CAN_1, IRQ_ERROR);
-}
-
-static void can2_err_warning_irq(void) {
-    can_err_irq(CAN_2, IRQ_ERROR);
-}
-
-static void can3_err_warning_irq(void) {
-    can_err_irq(CAN_3, IRQ_ERROR);
-}
-
 static void can4_err_warning_irq(void) {
     can_err_irq(CAN_4, IRQ_ERROR);
 }
 
-static void can0_overrun_irq(void) {
-    can_err_irq(CAN_0, IRQ_OVERRUN);
-}
-
-static void can1_overrun_irq(void) {
-    can_err_irq(CAN_1, IRQ_OVERRUN);
-}
-
-static void can2_overrun_irq(void) {
-    can_err_irq(CAN_2, IRQ_OVERRUN);
-}
-
-static void can3_overrun_irq(void) {
-    can_err_irq(CAN_3, IRQ_OVERRUN);
-}
-
 static void can4_overrun_irq(void) {
     can_err_irq(CAN_4, IRQ_OVERRUN);
 }
 
-static void can0_passive_irq(void) {
-    can_err_irq(CAN_0, IRQ_PASSIVE);
-}
-
-static void can1_passive_irq(void) {
-    can_err_irq(CAN_1, IRQ_PASSIVE);
-}
-
-static void can2_passive_irq(void) {
-    can_err_irq(CAN_2, IRQ_PASSIVE);
-}
-
-static void can3_passive_irq(void) {
-    can_err_irq(CAN_3, IRQ_PASSIVE);
-}
-
 static void can4_passive_irq(void) {
     can_err_irq(CAN_4, IRQ_PASSIVE);
 }
 
-static void can0_arb_lost_irq(void) {
-    can_err_irq(CAN_0, IRQ_ARB);
-}
-
-static void can1_arb_lost_irq(void) {
-    can_err_irq(CAN_1, IRQ_ARB);
-}
-
-static void can2_arb_lost_irq(void) {
-    can_err_irq(CAN_2, IRQ_ARB);
-}
-
-static void can3_arb_lost_irq(void) {
-    can_err_irq(CAN_3, IRQ_ARB);
-}
-
 static void can4_arb_lost_irq(void) {
     can_err_irq(CAN_4, IRQ_ARB);
 }
 
-static void can0_bus_err_irq(void) {
-    can_err_irq(CAN_0, IRQ_BUS);
-}
-
-static void can1_bus_err_irq(void) {
-    can_err_irq(CAN_1, IRQ_BUS);
-}
-
-static void can2_bus_err_irq(void) {
-    can_err_irq(CAN_2, IRQ_BUS);
-}
-
-static void can3_bus_err_irq(void) {
-    can_err_irq(CAN_3, IRQ_BUS);
-}
-
 static void can4_bus_err_irq(void) {
     can_err_irq(CAN_4, IRQ_BUS);
 }
-
-void can_init(can_t *obj, PinName rd, PinName td) {
+#endif
+
+void can_init_freq(can_t *obj, PinName rd, PinName td, int hz) {
     __IO uint32_t *dmy_ctr;
 
@@ -574,4 +580,11 @@
     pinmap_pinout(rd, PinMap_CAN_RD);
     pinmap_pinout(td, PinMap_CAN_TD);
+
+    /* set can frequency */
+    can_frequency(obj, hz);
+}
+
+void can_init(can_t *obj, PinName rd, PinName td) {
+    can_init_freq(obj, rd, td, 100000);
 }
 
@@ -631,9 +644,9 @@
     }
     
-    if (((msg.format == CANStandard) && (msg.id <= 0x07FF)) || ((msg.format == CANExtended) && (msg.id <= 0x03FFFF))) {
+    if (((msg.format == CANStandard) && (msg.id <= 0x07FF)) || ((msg.format == CANExtended) && (msg.id <= 0x1FFFFFFF))) {
         /* send/receive FIFO buffer isn't full */
         dmy_cfsts = CFSTS_TBL[obj->ch][CAN_SEND];
         if ((*dmy_cfsts & 0x02) != 0x02) {
-            /* set format, frame type and send/receive FIFO buffer ID(b10-0 or b28-11) */
+            /* set format, frame type and send/receive FIFO buffer ID(b10-0 or b28-0) */
             dmy_cfid = CFID_TBL[obj->ch][CAN_SEND];
             *dmy_cfid = ((msg.format << 31) | (msg.type << 30));
@@ -641,5 +654,5 @@
                 *dmy_cfid |= (msg.id & 0x07FF);
             } else {
-                *dmy_cfid |= ((msg.id & 0x03FFFF) << 11);
+                *dmy_cfid |= (msg.id & 0x1FFFFFFF);
             }
             /* set length */
@@ -680,12 +693,12 @@
     dmy_cfsts = CFSTS_TBL[obj->ch][CAN_RECV];
     while ((*dmy_cfsts & 0x01) != 0x01) {
-        /* get format, frame type and send/receive FIFO buffer ID(b10-0 or b28-11) */
+        /* get format, frame type and send/receive FIFO buffer ID(b10-0 or b28-0) */
         dmy_cfid = CFID_TBL[obj->ch][CAN_RECV];
         msg->format = (CANFormat)(*dmy_cfid >> 31);
-        msg->type = (CANType)(*dmy_cfid >> 30);
+        msg->type = (CANType)((*dmy_cfid >> 30) & 0x1);
         if (msg->format == CANStandard) {
             msg->id = (*dmy_cfid & 0x07FF);
         } else {
-            msg->id = ((*dmy_cfid >> 11) & 0x03FFFF);
+            msg->id = (*dmy_cfid & 0x1FFFFFFF);
         }
         /* get length */
@@ -756,7 +769,7 @@
             break;
         case MODE_TEST_GLOBAL:
-            /* set the channel between the communication test on channel 1 and channel 2 */
+            /* set the channel between the communication test on CAN_TEST_GLOBAL_CH and CAN_TEST_GLOBAL_CH+1 */
             /* set Channel Hold mode */
-            for (tmp_obj->ch = CAN_1; tmp_obj->ch <= CAN_2; tmp_obj->ch++) {
+            for (tmp_obj->ch = CAN_TEST_GLOBAL_CH; tmp_obj->ch <= (CAN_TEST_GLOBAL_CH + 1); tmp_obj->ch++) {
                 dmy_sts = STS_MATCH[tmp_obj->ch];
                 if ((*dmy_sts & 0x04) == 0x04) {
@@ -770,9 +783,9 @@
             }
             can_set_global_mode(GL_TEST);
-            /* enable communication test between channel1 and channel2 */
+            /* enable communication test between CAN_TEST_GLOBAL_CH and CAN_TEST_GLOBAL_CH+1 */
             RSCAN0GTSTCFG = 0x06;
             RSCAN0GTSTCTR = 0x01;
             /* send and receive setting of channel1 and channel2 */
-            for (tmp_obj->ch = CAN_1; tmp_obj->ch <= CAN_2; tmp_obj->ch++) {
+            for (tmp_obj->ch = CAN_TEST_GLOBAL_CH; tmp_obj->ch <= (CAN_TEST_GLOBAL_CH + 1); tmp_obj->ch++) {
                 can_reset_buffer(tmp_obj);
                 /* set global interrrupt */
@@ -807,5 +820,5 @@
     
     if ((format == CANStandard) || (format == CANExtended)) {
-        if (((format == CANStandard) && (id <= 0x07FF)) || ((format == CANExtended) && (id <= 0x03FFFF))) {
+        if (((format == CANStandard) && (id <= 0x07FF)) || ((format == CANExtended) && (id <= 0x1FFFFFFF))) {
             /* set Global Reset mode and Channel Reset mode */
             can_set_global_mode(GL_RESET);
@@ -818,9 +831,9 @@
             *dmy_gaflid = (format << 31);
             if (format == CANExtended) {
-                /* set receive rule ID for bit28-11 */
-                *dmy_gaflid |= (id << 11);
+                /* set receive rule ID for bit28-0 */
+                *dmy_gaflid |= (id & 0x1FFFFFFF);
             } else {
                 /* set receive rule ID for bit10-0 */
-                *dmy_gaflid |= id;
+                *dmy_gaflid |= (id & 0x07FF);
             }
             /* set ID mask bit */
@@ -881,5 +894,7 @@
     /* number of receive rules of each chanel = 64 */
     RSCAN0GAFLCFG0 = 0x40404040;
+#if defined(TARGET_RZA1H)
     RSCAN0GAFLCFG1 = 0x40000000;
+#endif
     /* enable receive rule table writing */
     RSCAN0GAFLECTR = 0x00000100;
@@ -932,6 +947,8 @@
     /* TMIEp interrupt is disable */
     RSCAN0TMIEC0 = 0x00000000;
+#if defined(TARGET_RZA1H)
     RSCAN0TMIEC1 = 0x00000000;
     RSCAN0TMIEC2 = 0x00000000;
+#endif
 }
 
@@ -965,4 +982,5 @@
     uint8_t tseg1 = 0;
     uint8_t tseg2 = 0;
+    uint8_t sjw = 0;
     
     /* set clkc */
@@ -987,14 +1005,15 @@
     tseg1 = (tq - 1) * 0.666666667;
     tseg2 = (tq - 1) - tseg1;
+    sjw = (tseg2 > 4)? 4 : tseg2;
     /* set RSCAN0CmCFG register */
     dmy_cfg = CFG_MATCH[obj->ch];
-    *dmy_cfg = ((tseg2 - 1) << 20) | ((tseg1 - 1) << 16) | brp;
+    *dmy_cfg = ((sjw - 1) << 24) | ((tseg2 - 1) << 20) | ((tseg1 - 1) << 16) | brp;
 }
 
 static void can_set_global_mode(int mode) {
     /* set Global mode */
-    RSCAN0GCTR = ((RSCAN0GCTR & 0xFFFFFFFC) | mode);
+    RSCAN0GCTR = ((RSCAN0GCTR & 0xFFFFFFFC) | (uint32_t)mode);
     /* Wait to cahnge into Global XXXX mode */
-    while ((RSCAN0GSTS & 0x07) != mode) {
+    while ((RSCAN0GSTS & 0x07) != (uint32_t)mode) {
         __NOP();
     }
@@ -1007,8 +1026,8 @@
     /* set Channel mode */
     dmy_ctr = CTR_MATCH[ch];
-    *dmy_ctr = ((*dmy_ctr & 0xFFFFFFFC) | mode);
+    *dmy_ctr = ((*dmy_ctr & 0xFFFFFFFC) | (uint32_t)mode);
     /* Wait to cahnge into Channel XXXX mode */
     dmy_sts = STS_MATCH[ch];
-    while ((*dmy_sts & 0x07) != mode) {
+    while ((*dmy_sts & 0x07) != (uint32_t)mode) {
         __NOP();
     }
