Changeset 374 for asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/system_RZ_A1H.h
- Timestamp:
- Apr 5, 2019, 9:26:53 PM (5 years ago)
- Location:
- asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX
- Files:
-
- 1 added
- 1 copied
- 1 moved
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asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/system_RZ_A1H.h
r373 r374 1 /**************************************************************************//** 2 * @file system_MBRZA1H.h 3 * @brief CMSIS Device System Header File for 4 * ARMCA9 Device Series 1 /****************************************************************************** 2 * @file system_RZ_A1H.h 3 * @brief CMSIS Device System Header File for ARM Cortex-A Device Series 5 4 * @version V1.00 6 * @date 1 1 June 20135 * @date 10 Mar 2017 7 6 * 8 7 * @note 9 8 * 10 9 ******************************************************************************/ 11 /* Copyright (c) 2011 - 2013 ARM LIMITED 10 /* 11 * Copyright (c) 2009-2017 ARM Limited. All rights reserved. 12 * 13 * SPDX-License-Identifier: Apache-2.0 14 * 15 * Licensed under the Apache License, Version 2.0 (the License); you may 16 * not use this file except in compliance with the License. 17 * You may obtain a copy of the License at 18 * 19 * www.apache.org/licenses/LICENSE-2.0 20 * 21 * Unless required by applicable law or agreed to in writing, software 22 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 23 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 24 * See the License for the specific language governing permissions and 25 * limitations under the License. 26 */ 12 27 13 All rights reserved. 14 Redistribution and use in source and binary forms, with or without 15 modification, are permitted provided that the following conditions are met: 16 - Redistributions of source code must retain the above copyright 17 notice, this list of conditions and the following disclaimer. 18 - Redistributions in binary form must reproduce the above copyright 19 notice, this list of conditions and the following disclaimer in the 20 documentation and/or other materials provided with the distribution. 21 - Neither the name of ARM nor the names of its contributors may be used 22 to endorse or promote products derived from this software without 23 specific prior written permission. 24 * 25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 29 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 POSSIBILITY OF SUCH DAMAGE. 36 ---------------------------------------------------------------------------*/ 37 38 39 #ifndef __SYSTEM_MBRZA1H 40 #define __SYSTEM_MBRZA1H 28 #ifndef __SYSTEM_RZ_A1H_H 29 #define __SYSTEM_RZ_A1H_H 41 30 42 31 #ifdef __cplusplus … … 44 33 #endif 45 34 35 #include <stdint.h> 36 46 37 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 47 38 48 typedef void(*IRQHandler)(); 49 uint32_t InterruptHandlerRegister(IRQn_Type, IRQHandler); 50 uint32_t InterruptHandlerUnregister(IRQn_Type); 39 typedef void(*IRQHandler)(); /*!< Type Definition for Interrupt Handlers */ 51 40 52 41 /** 53 * Initialize the system 54 * 55 * @param none 56 * @return none 57 * 58 * @brief Setup the microcontroller system. 59 * Initialize the System and update the Systd short int16_t;emCoreClock variable. 42 \brief Setup the microcontroller system. 43 44 Initialize the System and update the SystemCoreClock variable. 60 45 */ 61 46 extern void SystemInit (void); 47 48 49 /** 50 \brief Update SystemCoreClock variable. 51 52 Updates the SystemCoreClock with current core Clock retrieved from cpu registers. 53 */ 54 extern void SystemCoreClockUpdate (void); 55 56 /** 57 \brief Interrupt Handler Register. 58 59 Registers an Interrupt Handler into the IRQ Table. 60 */ 61 extern uint32_t InterruptHandlerRegister(IRQn_Type, IRQHandler); 62 63 /** 64 \brief Interrupt Handler Unregister. 65 66 Unregisters an Interrupt Handler from the IRQ Table. 67 */ 68 extern uint32_t InterruptHandlerUnregister(IRQn_Type); 69 70 /** 71 \brief Create Translation Table. 72 73 Creates Memory Management Unit Translation Table. 74 */ 75 extern void MMU_CreateTranslationTable(void); 62 76 63 77 #ifdef __cplusplus … … 65 79 #endif 66 80 67 #endif /* __SYSTEM_ MBRZA1H */81 #endif /* __SYSTEM_RZ_A1H_H */
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