Changeset 374 for asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/wdt_iodefine.h
- Timestamp:
- Apr 5, 2019, 9:26:53 PM (5 years ago)
- Location:
- asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX
- Files:
-
- 1 added
- 1 edited
- 1 moved
Legend:
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asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/wdt_iodefine.h
r352 r374 19 19 * following link: 20 20 * http://www.renesas.com/disclaimer* 21 * Copyright (C) 2013-201 4Renesas Electronics Corporation. All rights reserved.21 * Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved. 22 22 *******************************************************************************/ 23 23 /******************************************************************************* … … 25 25 * $Rev: $ 26 26 * $Date:: $ 27 * Description : Definition of I/O Register (V1.00a)27 * Description : Definition of I/O Register for RZ/A1H,M (V2.00h) 28 28 ******************************************************************************/ 29 29 #ifndef WDT_IODEFINE_H 30 30 #define WDT_IODEFINE_H 31 32 struct st_wdt 33 { /* WDT */ 34 volatile uint16_t WTCSR; /* WTCSR */ 35 volatile uint16_t WTCNT; /* WTCNT */ 36 volatile uint16_t WRCSR; /* WRCSR */ 37 }; 38 31 /* ->QAC 0639 : Over 127 members (C90) */ 32 /* ->QAC 0857 : Over 1024 #define (C90) */ 33 /* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */ 34 /* ->SEC M1.10.1 : Not magic number */ 39 35 40 36 #define WDT (*(struct st_wdt *)0xFCFE0000uL) /* WDT */ 41 37 42 38 43 #define WDTWTCSR WDT.WTCSR 44 #define WDTWTCNT WDT.WTCNT 45 #define WDTWRCSR WDT.WRCSR 39 #define WDTWTCSR (WDT.WTCSR) 40 #define WDTWTCNT (WDT.WTCNT) 41 #define WDTWRCSR (WDT.WRCSR) 42 43 44 typedef struct st_wdt 45 { 46 /* WDT */ 47 volatile uint16_t WTCSR; /* WTCSR */ 48 volatile uint16_t WTCNT; /* WTCNT */ 49 volatile uint16_t WRCSR; /* WRCSR */ 50 } r_io_wdt_t; 51 52 53 /* <-SEC M1.10.1 */ 54 /* <-MISRA 18.4 */ /* <-SEC M1.6.2 */ 55 /* <-QAC 0857 */ 56 /* <-QAC 0639 */ 46 57 #endif
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