Index: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/romdec_iodefine.h
===================================================================
--- asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZ_A1H/device/inc/iodefines/romdec_iodefine.h	(revision 352)
+++ asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/romdec_iodefine.h	(revision 374)
@@ -19,5 +19,5 @@
 * following link:
 * http://www.renesas.com/disclaimer*
-* Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
+* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved.
 *******************************************************************************/
 /*******************************************************************************
@@ -25,15 +25,88 @@
 * $Rev: $
 * $Date::                           $
-* Description : Definition of I/O Register (V1.00a)
+* Description : Definition of I/O Register for RZ/A1H,M (V2.00h)
 ******************************************************************************/
 #ifndef ROMDEC_IODEFINE_H
 #define ROMDEC_IODEFINE_H
+/* ->QAC 0639 : Over 127 members (C90) */
+/* ->QAC 0857 : Over 1024 #define (C90) */
+/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
 /* ->SEC M1.10.1 : Not magic number */
 
-struct st_romdec
-{                                                          /* ROMDEC           */
+#define ROMDEC  (*(struct st_romdec  *)0xE8005000uL) /* ROMDEC */
+
+
+#define ROMDECCROMEN (ROMDEC.CROMEN)
+#define ROMDECCROMSY0 (ROMDEC.CROMSY0)
+#define ROMDECCROMCTL0 (ROMDEC.CROMCTL0)
+#define ROMDECCROMCTL1 (ROMDEC.CROMCTL1)
+#define ROMDECCROMCTL3 (ROMDEC.CROMCTL3)
+#define ROMDECCROMCTL4 (ROMDEC.CROMCTL4)
+#define ROMDECCROMCTL5 (ROMDEC.CROMCTL5)
+#define ROMDECCROMST0 (ROMDEC.CROMST0)
+#define ROMDECCROMST1 (ROMDEC.CROMST1)
+#define ROMDECCROMST3 (ROMDEC.CROMST3)
+#define ROMDECCROMST4 (ROMDEC.CROMST4)
+#define ROMDECCROMST5 (ROMDEC.CROMST5)
+#define ROMDECCROMST6 (ROMDEC.CROMST6)
+#define ROMDECCBUFST0 (ROMDEC.CBUFST0)
+#define ROMDECCBUFST1 (ROMDEC.CBUFST1)
+#define ROMDECCBUFST2 (ROMDEC.CBUFST2)
+#define ROMDECHEAD00 (ROMDEC.HEAD00)
+#define ROMDECHEAD01 (ROMDEC.HEAD01)
+#define ROMDECHEAD02 (ROMDEC.HEAD02)
+#define ROMDECHEAD03 (ROMDEC.HEAD03)
+#define ROMDECSHEAD00 (ROMDEC.SHEAD00)
+#define ROMDECSHEAD01 (ROMDEC.SHEAD01)
+#define ROMDECSHEAD02 (ROMDEC.SHEAD02)
+#define ROMDECSHEAD03 (ROMDEC.SHEAD03)
+#define ROMDECSHEAD04 (ROMDEC.SHEAD04)
+#define ROMDECSHEAD05 (ROMDEC.SHEAD05)
+#define ROMDECSHEAD06 (ROMDEC.SHEAD06)
+#define ROMDECSHEAD07 (ROMDEC.SHEAD07)
+#define ROMDECHEAD20 (ROMDEC.HEAD20)
+#define ROMDECHEAD21 (ROMDEC.HEAD21)
+#define ROMDECHEAD22 (ROMDEC.HEAD22)
+#define ROMDECHEAD23 (ROMDEC.HEAD23)
+#define ROMDECSHEAD20 (ROMDEC.SHEAD20)
+#define ROMDECSHEAD21 (ROMDEC.SHEAD21)
+#define ROMDECSHEAD22 (ROMDEC.SHEAD22)
+#define ROMDECSHEAD23 (ROMDEC.SHEAD23)
+#define ROMDECSHEAD24 (ROMDEC.SHEAD24)
+#define ROMDECSHEAD25 (ROMDEC.SHEAD25)
+#define ROMDECSHEAD26 (ROMDEC.SHEAD26)
+#define ROMDECSHEAD27 (ROMDEC.SHEAD27)
+#define ROMDECCBUFCTL0 (ROMDEC.CBUFCTL0)
+#define ROMDECCBUFCTL1 (ROMDEC.CBUFCTL1)
+#define ROMDECCBUFCTL2 (ROMDEC.CBUFCTL2)
+#define ROMDECCBUFCTL3 (ROMDEC.CBUFCTL3)
+#define ROMDECCROMST0M (ROMDEC.CROMST0M)
+#define ROMDECROMDECRST (ROMDEC.ROMDECRST)
+#define ROMDECRSTSTAT (ROMDEC.RSTSTAT)
+#define ROMDECSSI (ROMDEC.SSI)
+#define ROMDECINTHOLD (ROMDEC.INTHOLD)
+#define ROMDECINHINT (ROMDEC.INHINT)
+#define ROMDECSTRMDIN0 (ROMDEC.STRMDIN0)
+#define ROMDECSTRMDIN2 (ROMDEC.STRMDIN2)
+#define ROMDECSTRMDOUT0 (ROMDEC.STRMDOUT0)
+
+#define ROMDEC_CROMCTL0_COUNT (2)
+#define ROMDEC_CROMST0_COUNT (2)
+#define ROMDEC_CBUFST0_COUNT (3)
+#define ROMDEC_HEAD00_COUNT (4)
+#define ROMDEC_SHEAD00_COUNT (8)
+#define ROMDEC_HEAD20_COUNT (4)
+#define ROMDEC_SHEAD20_COUNT (8)
+#define ROMDEC_CBUFCTL0_COUNT (4)
+#define ROMDEC_STRMDIN0_COUNT (2)
+
+
+typedef struct st_romdec
+{
+                                                           /* ROMDEC           */
     volatile uint8_t   CROMEN;                                 /*  CROMEN          */
     volatile uint8_t   CROMSY0;                                /*  CROMSY0         */
-#define ROMDEC_CROMCTL0_COUNT 2
+
+/* #define ROMDEC_CROMCTL0_COUNT (2) */
     volatile uint8_t   CROMCTL0;                               /*  CROMCTL0        */
     volatile uint8_t   CROMCTL1;                               /*  CROMCTL1        */
@@ -42,5 +115,6 @@
     volatile uint8_t   CROMCTL4;                               /*  CROMCTL4        */
     volatile uint8_t   CROMCTL5;                               /*  CROMCTL5        */
-#define ROMDEC_CROMST0_COUNT 2
+
+/* #define ROMDEC_CROMST0_COUNT (2) */
     volatile uint8_t   CROMST0;                                /*  CROMST0         */
     volatile uint8_t   CROMST1;                                /*  CROMST1         */
@@ -51,15 +125,18 @@
     volatile uint8_t   CROMST6;                                /*  CROMST6         */
     volatile uint8_t   dummy25[5];                             /*                  */
-#define ROMDEC_CBUFST0_COUNT 3
+
+/* #define ROMDEC_CBUFST0_COUNT (3) */
     volatile uint8_t   CBUFST0;                                /*  CBUFST0         */
     volatile uint8_t   CBUFST1;                                /*  CBUFST1         */
     volatile uint8_t   CBUFST2;                                /*  CBUFST2         */
     volatile uint8_t   dummy26[1];                             /*                  */
-#define ROMDEC_HEAD00_COUNT 4
+
+/* #define ROMDEC_HEAD00_COUNT (4) */
     volatile uint8_t   HEAD00;                                 /*  HEAD00          */
     volatile uint8_t   HEAD01;                                 /*  HEAD01          */
     volatile uint8_t   HEAD02;                                 /*  HEAD02          */
     volatile uint8_t   HEAD03;                                 /*  HEAD03          */
-#define ROMDEC_SHEAD00_COUNT 8
+
+/* #define ROMDEC_SHEAD00_COUNT (8) */
     volatile uint8_t   SHEAD00;                                /*  SHEAD00         */
     volatile uint8_t   SHEAD01;                                /*  SHEAD01         */
@@ -70,10 +147,12 @@
     volatile uint8_t   SHEAD06;                                /*  SHEAD06         */
     volatile uint8_t   SHEAD07;                                /*  SHEAD07         */
-#define ROMDEC_HEAD20_COUNT 4
+
+/* #define ROMDEC_HEAD20_COUNT (4) */
     volatile uint8_t   HEAD20;                                 /*  HEAD20          */
     volatile uint8_t   HEAD21;                                 /*  HEAD21          */
     volatile uint8_t   HEAD22;                                 /*  HEAD22          */
     volatile uint8_t   HEAD23;                                 /*  HEAD23          */
-#define ROMDEC_SHEAD20_COUNT 8
+
+/* #define ROMDEC_SHEAD20_COUNT (8) */
     volatile uint8_t   SHEAD20;                                /*  SHEAD20         */
     volatile uint8_t   SHEAD21;                                /*  SHEAD21         */
@@ -85,5 +164,6 @@
     volatile uint8_t   SHEAD27;                                /*  SHEAD27         */
     volatile uint8_t   dummy27[16];                            /*                  */
-#define ROMDEC_CBUFCTL0_COUNT 4
+
+/* #define ROMDEC_CBUFCTL0_COUNT (4) */
     volatile uint8_t   CBUFCTL0;                               /*  CBUFCTL0        */
     volatile uint8_t   CBUFCTL1;                               /*  CBUFCTL1        */
@@ -100,67 +180,15 @@
     volatile uint8_t   INHINT;                                 /*  INHINT          */
     volatile uint8_t   dummy31[246];                           /*                  */
-#define ROMDEC_STRMDIN0_COUNT 2
+
+/* #define ROMDEC_STRMDIN0_COUNT (2) */
     volatile uint16_t STRMDIN0;                               /*  STRMDIN0        */
     volatile uint16_t STRMDIN2;                               /*  STRMDIN2        */
     volatile uint16_t STRMDOUT0;                              /*  STRMDOUT0       */
-};
+} r_io_romdec_t;
 
 
-#define ROMDEC  (*(struct st_romdec  *)0xE8005000uL) /* ROMDEC */
-
-
-#define ROMDECCROMEN ROMDEC.CROMEN
-#define ROMDECCROMSY0 ROMDEC.CROMSY0
-#define ROMDECCROMCTL0 ROMDEC.CROMCTL0
-#define ROMDECCROMCTL1 ROMDEC.CROMCTL1
-#define ROMDECCROMCTL3 ROMDEC.CROMCTL3
-#define ROMDECCROMCTL4 ROMDEC.CROMCTL4
-#define ROMDECCROMCTL5 ROMDEC.CROMCTL5
-#define ROMDECCROMST0 ROMDEC.CROMST0
-#define ROMDECCROMST1 ROMDEC.CROMST1
-#define ROMDECCROMST3 ROMDEC.CROMST3
-#define ROMDECCROMST4 ROMDEC.CROMST4
-#define ROMDECCROMST5 ROMDEC.CROMST5
-#define ROMDECCROMST6 ROMDEC.CROMST6
-#define ROMDECCBUFST0 ROMDEC.CBUFST0
-#define ROMDECCBUFST1 ROMDEC.CBUFST1
-#define ROMDECCBUFST2 ROMDEC.CBUFST2
-#define ROMDECHEAD00 ROMDEC.HEAD00
-#define ROMDECHEAD01 ROMDEC.HEAD01
-#define ROMDECHEAD02 ROMDEC.HEAD02
-#define ROMDECHEAD03 ROMDEC.HEAD03
-#define ROMDECSHEAD00 ROMDEC.SHEAD00
-#define ROMDECSHEAD01 ROMDEC.SHEAD01
-#define ROMDECSHEAD02 ROMDEC.SHEAD02
-#define ROMDECSHEAD03 ROMDEC.SHEAD03
-#define ROMDECSHEAD04 ROMDEC.SHEAD04
-#define ROMDECSHEAD05 ROMDEC.SHEAD05
-#define ROMDECSHEAD06 ROMDEC.SHEAD06
-#define ROMDECSHEAD07 ROMDEC.SHEAD07
-#define ROMDECHEAD20 ROMDEC.HEAD20
-#define ROMDECHEAD21 ROMDEC.HEAD21
-#define ROMDECHEAD22 ROMDEC.HEAD22
-#define ROMDECHEAD23 ROMDEC.HEAD23
-#define ROMDECSHEAD20 ROMDEC.SHEAD20
-#define ROMDECSHEAD21 ROMDEC.SHEAD21
-#define ROMDECSHEAD22 ROMDEC.SHEAD22
-#define ROMDECSHEAD23 ROMDEC.SHEAD23
-#define ROMDECSHEAD24 ROMDEC.SHEAD24
-#define ROMDECSHEAD25 ROMDEC.SHEAD25
-#define ROMDECSHEAD26 ROMDEC.SHEAD26
-#define ROMDECSHEAD27 ROMDEC.SHEAD27
-#define ROMDECCBUFCTL0 ROMDEC.CBUFCTL0
-#define ROMDECCBUFCTL1 ROMDEC.CBUFCTL1
-#define ROMDECCBUFCTL2 ROMDEC.CBUFCTL2
-#define ROMDECCBUFCTL3 ROMDEC.CBUFCTL3
-#define ROMDECCROMST0M ROMDEC.CROMST0M
-#define ROMDECROMDECRST ROMDEC.ROMDECRST
-#define ROMDECRSTSTAT ROMDEC.RSTSTAT
-#define ROMDECSSI ROMDEC.SSI
-#define ROMDECINTHOLD ROMDEC.INTHOLD
-#define ROMDECINHINT ROMDEC.INHINT
-#define ROMDECSTRMDIN0 ROMDEC.STRMDIN0
-#define ROMDECSTRMDIN2 ROMDEC.STRMDIN2
-#define ROMDECSTRMDOUT0 ROMDEC.STRMDOUT0
 /* <-SEC M1.10.1 */
+/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
+/* <-QAC 0857 */
+/* <-QAC 0639 */
 #endif
