Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_design.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_design.txt	(revision 302)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_design.txt	(revision 306)
@@ -3,7 +3,60 @@
 		GICï¼ARM Generic Interrupt Controllerï¼ä¾å­é¨ è¨­è¨ã¡ã¢
 
-		å¯¾å¿ãã¼ã¸ã§ã³: Release 3.B.0
-		æçµæ´æ°: 2015å¹´7æ24æ¥
-
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 3.0.0
+		æçµæ´æ°: 2016å¹´1æ16æ¥
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2014-2016 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: gic_design.txt 533 2016-01-15 23:29:33Z ertl-hiro $
 ----------------------------------------------------------------------
 
@@ -14,7 +67,13 @@
 	- GICä¾å­é¨ãæ§æãããã¡ã¤ã«
 ã»ãããä¾å­ã®ãã©ã¡ã¼ã¿
+	- ã¢ããªã±ã¼ã·ã§ã³ããåç
+§ã§ãããã©ã¡ã¼ã¿
+	- ã«ã¼ãã«å
+é¨ã§ä½¿ç¨ãããã©ã¡ã¼ã¿
 ã»GICã«ãããå²è¾¼ã¿ãã³ãã©ããã³CPUä¾å¤ãã³ãã©ã®åºå
 ¥å£å¦ç
 	- GICã«ãããå²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦ç
+	- GICã«ãããCPUä¾å¤ãã³ãã©ã®åºå
 ¥å£å¦ç
 
@@ -43,16 +102,34 @@
 GICä¾å­é¨ã¯ï¼æ¬¡ã®3ã¤ã®ãã¡ã¤ã«ã§æ§æãããï¼
 
-gic_kernel_impl.h
-gic_kernel_impl.c
-gic_support.S
+  arch/arm_gcc/common/
+	gic_kernel_impl.h	ã«ã¼ãã«ã®å²è¾¼ã¿GICä¾å­é¨ã®ããããã¡ã¤ã«
+	gic_kernel_impl.c	ã«ã¼ãã«ã®å²è¾¼ã¿GICä¾å­é¨
+	gic_support.S		ã«ã¼ãã«ã®å²è¾¼ã¿GICä¾å­é¨ã®ã¢ã»ã³ããªè¨èªé¨
 
 âãããä¾å­ã®ãã©ã¡ã¼ã¿
 
-TMIN_INTPRI
-TMAX_INTPRI
-
-ã«ã¼ãã«ã®ã¿ã¼ã²ããä¾å­é¨ã®ããããã¡ã¤ã«ããgic_kernel_impl.hãã¤ã³ã¯
-ã«ã¼ãããåã«ï¼å¿
-è¦ã«å¿ãã¦ï¼ä»¥ä¸ã®å®æ°ããã¯ã­å®ç¾©ãã¦ããï¼
+âã¢ããªã±ã¼ã·ã§ã³ããåç
+§ã§ãããã©ã¡ã¼ã¿
+
+target_kernel.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã§ï¼ä»¥ä¸ã®
+å®æ°ããã¯ã­å®ç¾©ãã¦ããï¼
+
+(1) TMIN_INTPRI			å²è¾¼ã¿åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼
+(2) TMAX_INTPRI			å²è¾¼ã¿åªå
+åº¦ã®æå¤§å¤ï¼æä½å¤ï¼
+
+TMAX_INTPRIã¯ï¼-1ã«å®ç¾©ããï¼TMAX_INTPRIã¯ï¼ã¿ã¼ã²ãããããã®GICã§ãµãã¼
+ãããå²è¾¼ã¿åªå
+åº¦ã®æ®µæ°ã«ããï¼-15ï¼-31ï¼-63ï¼-127ï¼-255ã®ããããã«å®
+ç¾©ããï¼
+
+âã«ã¼ãã«å
+é¨ã§ä½¿ç¨ãããã©ã¡ã¼ã¿
+
+target_kernel_impl.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ãã
+gic_kernel_impl.hãã¤ã³ã¯ã«ã¼ãããåã«ï¼å¿
+è¦ã«å¿ãã¦ï¼ä»¥ä¸ã®å®æ°ããã¯
+ã­å®ç¾©ãã¦ããï¼
 
 (1) GIC_TNUM_INTNO		å²è¾¼ã¿ã®æ°
@@ -62,22 +139,15 @@
 Peripheral Interruptï¼ã®åè¨æ°ï¼
 
-(2) GIC_PRI_LEVEL		å²è¾¼ã¿åªå
-åº¦ã®æ®µæ°
-
-ã¿ã¼ã²ãããããã®GICããµãã¼ãããå²è¾¼ã¿åªå
-åº¦ã®æ®µæ°ï¼16ï¼32ï¼64ï¼128ï¼
-256ã®ããããï¼
-
-(3) GICC_BASE			CPUã¤ã³ã¿ãã§ã¼ã¹ã®ãã¼ã¹ã¢ãã¬ã¹
-(4) GICD_BASE			ãã£ã¹ããªãã¥ã¼ã¿ã®ãã¼ã¹ã¢ãã¬ã¹
+(2) GICC_BASE			CPUã¤ã³ã¿ãã§ã¼ã¹ã®ãã¼ã¹ã¢ãã¬ã¹
+(3) GICD_BASE			ãã£ã¹ããªãã¥ã¼ã¿ã®ãã¼ã¹ã¢ãã¬ã¹
 
 GICã®CPUã¤ã³ã¿ãã§ã¼ã¹ããã³ãã£ã¹ããªãã¥ã¼ã¿ã®ãã¼ã¹ã¢ãã¬ã¹ï¼
 
-(5) TOPPERS_SAFEG_SECURE	ã»ã­ã¥ã¢ã¢ã¼ãï¼ãªãã·ã§ã³ï¼
+(4) TOPPERS_SAFEG_SECURE	ã»ã­ã¥ã¢ã¢ã¼ãï¼ãªãã·ã§ã³ï¼
 
 ã»ã­ã¥ã¢ã¢ã¼ãã§ã«ã¼ãã«ãåä½ããï¼FIQãã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ã¨æ±ãå ´å
 ã«ï¼ãã®ã·ã³ãã«ããã¯ã­å®ç¾©ããï¼
 
-(6) GIC_ARM11MOCORE		ARM11 MPCoreã¸ã®å¯¾å¿ï¼ãªãã·ã§ã³ï¼
+(5) GIC_ARM11MPCORE		ARM11 MPCoreã¸ã®å¯¾å¿ï¼ãªãã·ã§ã³ï¼
 
 ARM11 MPCoreã®Distributed Interrupt Controllerã®å ´åã«ã¯ï¼ãã®ã·ã³ãã«
@@ -284,5 +354,40 @@
 ¥å£å¦ç
 
-
+GICã«ãããCPUä¾å¤ãã³ãã©ã®å
+¥å£å¦çï¼irc_begin_excï¼ã§ã¯ï¼CPUä¾å¤çºç
+åã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãã¹ã¿ãã¯ã«ä¿å­ãï¼CPUä¾å¤ãã³ãã©ã®å
+¥å£å¦ç
+ï¼irc_end_excï¼ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ãï¼
+
+----------------------------------------
+ALABEL(irc_begin_exc)
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãä¿å­ããï¼
+	 */
+	ldr		r1, =GICC_PMR		/* ç¾å¨ã®å²è¾¼ã¿åªå
+åº¦ãåå¾ */
+	ldr		r2, [r1]
+	push	{r2}				/* irc_end_excã§ç¨ããæ
+å ±ãä¿å­ */
+	bx		lr
+----------------------------------------
+ALABEL(irc_end_exc)
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ãï¼
+	 */
+	pop		{r2}				/* irc_begin_excã§ä¿å­ããæ
+å ±ãå¾©å¸° */
+	ldr		r1, =GICC_PMR		/* å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ã */
+	str		r2, [r1]
+	bx		lr
+----------------------------------------
 
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