[353] | 1 | /*
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| 2 | * TOPPERS/SSP Kernel
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| 3 | * Smallest Set Profile Kernel
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| 4 | *
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| 5 | * Copyright (C) 2013-2015 by Embedded and Real-Time Systems Laboratory
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| 6 | * Graduate School of Information Science, Nagoya Univ., JAPAN
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| 7 | * Copyright (C) 2018 by Naoki Saito
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| 8 | * Nagoya Municipal Industrial Research Institute, JAPAN
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| 9 | *
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| 10 | * ä¸è¨èä½æ¨©è
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| 11 | ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
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| 12 | * ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹
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| 13 | * å¤ã»åé
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| 14 | å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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| 15 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
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| 16 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
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| 17 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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| 18 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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| 19 | * ç¨ã§ããå½¢ã§åé
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| 20 | å¸ããå ´åã«ã¯ï¼åé
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| 21 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
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| 22 | * è
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| 23 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
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| 24 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 25 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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| 26 | * ç¨ã§ããªãå½¢ã§åé
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| 27 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
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| 28 | * ã¨ï¼
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| 29 | * (a) åé
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| 30 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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| 31 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
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| 32 | * ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 33 | * (b) åé
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| 34 | å¸ã®å½¢æ
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| 35 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
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| 36 | * å ±åãããã¨ï¼
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| 37 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
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| 38 | * 害ãããï¼ä¸è¨èä½æ¨©è
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| 39 | ããã³TOPPERSããã¸ã§ã¯ããå
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| 40 | 責ãããã¨ï¼
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| 41 | * ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
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| 42 | * ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
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| 43 | ããã³TOPPERSããã¸ã§ã¯ãã
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| 44 | * å
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| 45 | 責ãããã¨ï¼
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| 46 | *
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| 47 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
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| 48 | ã
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| 49 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
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| 50 | * ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
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| 51 | * ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ã
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| 52 | * ã®è²¬ä»»ãè² ããªãï¼
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| 53 | *
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| 54 | * $Id$
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| 55 | */
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| 56 |
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| 57 | /*
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| 58 | * ã¿ã¤ããã©ã¤ãï¼Generic Timerï¼
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| 59 | */
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| 60 | #include "kernel_impl.h"
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| 61 | #include "time_event.h"
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| 62 | #include "target_timer.h"
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| 63 | #include <sil.h>
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| 64 |
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| 65 | /*
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| 66 | * ä»®æ³ã¿ã¤ãã®å¶å¾¡ã¬ã¸ã¹ã¿ããã®èªã¿åºã
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| 67 | */
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| 68 | Inline uint64_t
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| 69 | clock_read_ctrl(void) {
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| 70 | uint64_t cntv_ctrl;
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| 71 |
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| 72 | Asm ("isb; mrs %0, cntv_ctl_el0; isb;"
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| 73 | : "=r"(cntv_ctrl) :: "memory");
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| 74 |
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| 75 | return cntv_ctrl;
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| 76 | }
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| 77 |
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| 78 | /*
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| 79 | * ä»®æ³ã¿ã¤ãã®å¶å¾¡ã¬ã¸ã¹ã¿ã¸ã®æ¸ãè¾¼ã¿
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| 80 | */
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| 81 | Inline void
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| 82 | clock_write_ctrl(uint64_t cntv_ctrl) {
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| 83 |
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| 84 | Asm ("isb; msr cntv_ctl_el0, %0; isb;"
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| 85 | :: "r"(cntv_ctrl) : "memory");
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| 86 | return ;
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| 87 | }
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| 88 |
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| 89 | /*
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| 90 | * ä»®æ³ã¿ã¤ã(ããªã¼ã«ã¦ã³ã¿)ã®ã«ã¦ã³ãå¤ã®èªã¿åºã
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| 91 | */
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| 92 | Inline uint64_t
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| 93 | clock_read_counter(void){
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| 94 | uint64_t cval;
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| 95 |
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| 96 | Asm ("mrs %0, cntvct_el0" : "=r" (cval));
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| 97 |
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| 98 | return cval;
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| 99 | }
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| 100 |
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| 101 | /*
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| 102 | * ä»®æ³ã¿ã¤ãã®å¤ã®èªã¿åºã
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| 103 | */
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| 104 | Inline uint64_t
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| 105 | clock_read_tval(void){
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| 106 | uint64_t cntv_tval;
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| 107 |
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| 108 | Asm ("isb; mrs %0, cntv_tval_el0; isb;" : "=r"(cntv_tval)
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| 109 | :: "memory");
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| 110 | return cntv_tval;
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| 111 | }
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| 112 |
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| 113 | /*
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| 114 | * ä»®æ³ã¿ã¤ãã®å¤ã®æ¸ãè¾¼ã¿
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| 115 | */
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| 116 | Inline void
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| 117 | clock_write_tval(uint64_t cntv_tval){
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| 118 |
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| 119 | Asm ("isb; msr cntv_tval_el0, %0; isb;" :: "r"(cntv_tval)
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| 120 | : "memory");
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| 121 | }
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| 122 |
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| 123 | /*
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| 124 | * ã·ã¹ãã ã«ã¦ã³ã¿ã®ã¯ããã¯å¨æ³¢æ°ã®åå¾
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| 125 | */
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| 126 | Inline uint64_t
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| 127 | get_timer_freq(void) {
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| 128 | uint64_t freq_hz;
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| 129 |
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| 130 | Asm ("mrs %0, cntfrq_el0; isb; " : "=r"(freq_hz) :: "memory");
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| 131 | return freq_hz;
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| 132 | }
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| 133 |
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| 134 | /*
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| 135 | * ã¿ã¤ãã®éå§
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| 136 | */
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| 137 | static void
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| 138 | target_timer_start(void)
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| 139 | {
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| 140 | uint64_t cntv_ctl;
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| 141 |
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| 142 | cntv_ctl = clock_read_ctrl();
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| 143 | cntv_ctl |= ( CNTV_CTL_ENABLE | CNTV_CTL_START );
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| 144 | cntv_ctl &= ~CNTV_CTL_MASK; //mask
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| 145 | clock_write_ctrl(cntv_ctl);
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| 146 | }
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| 147 |
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| 148 | /*
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| 149 | * ã¿ã¤ãã®åæ¢
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| 150 | */
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| 151 | static void
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| 152 | target_timer_stop(void)
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| 153 | {
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| 154 | uint64_t cntv_ctl;
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| 155 |
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| 156 | cntv_ctl = clock_read_ctrl();
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| 157 | cntv_ctl &= ~( CNTV_CTL_ENABLE | CNTV_CTL_START );
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| 158 | cntv_ctl |= CNTV_CTL_MASK;
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| 159 | clock_write_ctrl(cntv_ctl);
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| 160 | }
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| 161 |
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| 162 | /*
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| 163 | * ã¿ã¤ãå²è¾¼ã¿è¦æ±ã®ã¯ãªã¢
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| 164 | */
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| 165 | static void
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| 166 | target_timer_int_clear(void){
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| 167 |
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| 168 | gicd_clear_pending(INTNO_TIMER);
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| 169 | }
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| 170 |
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| 171 | /*
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| 172 | * 次ã®ã¿ã¤ãå²è¾¼ã¿çºçã¾ã§ã®ãªãã»ãã
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| 173 | */
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| 174 | static uint64_t next_tval;
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| 175 |
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| 176 | /*
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| 177 | * ã¿ã¤ãã®èµ·åå¦ç
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| 178 | */
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| 179 | void
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| 180 | target_timer_initialize(intptr_t exinf)
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| 181 | {
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| 182 | target_timer_stop();
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| 183 | target_timer_int_clear();
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| 184 |
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| 185 | // 次åã®ã¿ã¤ãå²è¾¼ã¿çºçã¾ã§ã®ãªãã»ããç®åº
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| 186 | next_tval = get_timer_freq() * 1000 / 1000000UL; /* 1ms */
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| 187 | clock_write_tval(next_tval);
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| 188 |
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| 189 | target_timer_start();
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| 190 | }
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| 191 |
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| 192 | /*
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| 193 | * ã¿ã¤ãã®åæ¢å¦ç
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| 194 | */
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| 195 | void
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| 196 | target_timer_terminate(intptr_t exinf)
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| 197 | {
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| 198 | target_timer_stop();
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| 199 | }
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| 200 |
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| 201 | /*
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| 202 | * ã¿ã¤ãå²è¾¼ã¿ãã³ãã©
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| 203 | */
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| 204 | void
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| 205 | target_timer_handler(void)
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| 206 | {
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| 207 | target_timer_stop();
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| 208 | target_timer_int_clear();
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| 209 | clock_write_tval(next_tval); // 次åã®å²è¾¼ã¿
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| 210 | target_timer_start();
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| 211 |
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| 212 | i_begin_int(INTNO_TIMER);
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| 213 | signal_time();
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| 214 | i_end_int(INTNO_TIMER);
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| 215 | }
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