1 | /*
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2 | Copyright (c) 2014 Arduino. All right reserved.
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3 |
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4 | This library is free software; you can redistribute it and/or
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5 | modify it under the terms of the GNU Lesser General Public
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6 | License as published by the Free Software Foundation; either
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7 | version 2.1 of the License, or (at your option) any later version.
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8 |
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9 | This library is distributed in the hope that it will be useful,
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10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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12 | See the GNU Lesser General Public License for more details.
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13 |
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14 | You should have received a copy of the GNU Lesser General Public
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15 | License along with this library; if not, write to the Free Software
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16 | Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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17 | */
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18 |
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19 | //
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20 |
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21 | #include "wiring_analog.h"
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22 | #include "wiring_digital.h"
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23 |
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24 | #ifdef __cplusplus
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25 | extern "C" {
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26 | #endif
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27 |
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28 | static int _readResolution = 10;
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29 | static int _writeResolution = 10;
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30 | static int ADC_RESOLUTION = 12;
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31 | static int DAC_RESOLUTION = 10;
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32 |
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33 | void analogReadResolution(int res) {
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34 | _readResolution = res;
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35 | while( ADC->STATUS.bit.SYNCBUSY == 1 )
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36 | {
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37 | // Waiting for synchronization
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38 | }
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39 | if(res == 8) ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_8BIT_Val;
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40 | else if(res == 10) ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_10BIT_Val;
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41 | else ADC->CTRLB.bit.RESSEL= ADC_CTRLB_RESSEL_12BIT_Val;
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42 | }
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43 |
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44 | void analogWriteResolution(int res) {
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45 | _writeResolution = res;
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46 | }
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47 |
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48 | static inline uint32_t mapResolution(uint32_t value, uint32_t from, uint32_t to) {
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49 | if (from == to)
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50 | return value;
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51 | if (from > to)
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52 | return value >> (from-to);
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53 | else
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54 | return value << (to-from);
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55 | }
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56 |
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57 | void analogReference( eAnalogReference ulMode )
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58 | {
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59 |
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60 |
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61 | ADC->CTRLA.bit.ENABLE = 0; // Enable ADC
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62 | while( ADC->STATUS.bit.SYNCBUSY == 1 )
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63 | {
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64 | // Waiting for synchronization
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65 | }
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66 | switch(ulMode)
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67 | {
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68 | case AR_DEFAULT:
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69 | //default:
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70 |
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71 | ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_DIV2_Val;
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72 | ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val;
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73 | break;
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74 | case AR_INTERNAL:
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75 | ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val;
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76 | ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INT1V_Val;
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77 | break;
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78 |
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79 | case AR_EXTERNAL:
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80 | ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val;
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81 | ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_AREFA_Val;
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82 | break;
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83 | }ADC->CTRLA.bit.ENABLE = 1; // Enable ADC
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84 | while( ADC->STATUS.bit.SYNCBUSY == 1 )
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85 | {
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86 | // Waiting for synchronization
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87 | }
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88 | }
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89 |
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90 | uint32_t analogRead( uint32_t ulPin )
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91 | {
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92 | uint32_t valueRead = 0;
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93 | pinPeripheral(ulPin, g_APinDescription[ulPin].ulPinType);
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94 | if ( ulPin == 24 ) // Only 1 DAC on A0 (PA02)
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95 | {
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96 | DAC->CTRLA.bit.ENABLE = 0; //disable DAC on A0
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97 | }
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98 |
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99 | ADC->INPUTCTRL.bit.MUXPOS = g_APinDescription[ulPin].ulADCChannelNumber;
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100 |
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101 | // Start conversion
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102 | ADC->SWTRIG.bit.START = 1;
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103 |
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104 | while( ADC->INTFLAG.bit.RESRDY == 0 || ADC->STATUS.bit.SYNCBUSY == 1 )
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105 | {
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106 | // Waiting for a complete conversion and complete synchronization
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107 | }
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108 |
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109 | // Store the value
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110 | valueRead = ADC->RESULT.reg;
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111 |
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112 | // Clear the Data Ready flag
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113 | ADC->INTFLAG.bit.RESRDY = 1;
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114 |
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115 | // Flush the ADC for further conversions
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116 | // ADC->SWTRIG.bit.FLUSH = 1;
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117 |
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118 | while( ADC->STATUS.bit.SYNCBUSY == 1 || ADC->SWTRIG.bit.FLUSH == 1 )
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119 | {
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120 | // Waiting for synchronization
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121 | }
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122 |
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123 | //valueRead = mapResolution(valueRead, ADC_RESOLUTION, _readResolution);
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124 | return valueRead;
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125 |
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126 | }
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127 |
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128 |
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129 | // Right now, PWM output only works on the pins with
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130 | // hardware support. These are defined in the appropriate
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131 | // pins_*.c file. For the rest of the pins, we default
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132 | // to digital output.
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133 | void analogWrite( uint32_t ulPin, uint32_t ulValue )
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134 | {
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135 | uint32_t attr = g_APinDescription[ulPin].ulPinAttribute ;
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136 | // uint32_t pwm_name = g_APinDescription[ulPin].ulTCChannel ;
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137 | uint8_t isTC = 0 ;
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138 | uint8_t Channelx ;
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139 | Tc* TCx ;
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140 | Tcc* TCCx ;
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141 |
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142 | if ( (attr & PIN_ATTR_ANALOG) == PIN_ATTR_ANALOG )
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143 | {
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144 | if ( ulPin == 24 ) // Only 1 DAC on A0 (PA02)
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145 | {
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146 | ulValue = mapResolution(ulValue, _writeResolution, DAC_RESOLUTION);
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147 | DAC->DATA.reg = ulValue & 0x3FF; // Dac on 10 bits.
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148 | DAC->CTRLA.bit.ENABLE = 1; // DAC Enabled
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149 | while (DAC->STATUS.bit.SYNCBUSY == 1); //wait for synchronization
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150 | return;
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151 | }
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152 |
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153 |
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154 | }
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155 |
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156 | if ( (attr & PIN_ATTR_PWM) == PIN_ATTR_PWM )
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157 | {
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158 | if ( (g_APinDescription[ulPin].ulPinType == PIO_TIMER) || g_APinDescription[ulPin].ulPinType == PIO_TIMER_ALT )
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159 | {
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160 | pinPeripheral( ulPin, g_APinDescription[ulPin].ulPinType ) ;
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161 | }
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162 |
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163 | switch ( g_APinDescription[ulPin].ulPWMChannel )
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164 | {
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165 | case PWM3_CH0 :
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166 | TCx = TC3 ;
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167 | Channelx = 0 ;
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168 | isTC = 1 ;
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169 | break;
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170 |
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171 | case PWM3_CH1:
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172 | TCx = TC3 ;
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173 | Channelx = 1;
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174 | isTC = 1;
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175 | break;
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176 |
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177 | case PWM0_CH0 :
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178 | TCCx = TCC0;
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179 | Channelx = 0;
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180 | break;
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181 |
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182 | case PWM0_CH1 :
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183 | TCCx = TCC0;
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184 | Channelx = 1;
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185 | break;
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186 |
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187 | case PWM0_CH4 :
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188 | TCCx = TCC0;
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189 | Channelx = 0;
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190 | break;
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191 |
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192 | case PWM0_CH5 :
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193 | TCCx = TCC0;
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194 | Channelx = 1;
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195 | break;
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196 |
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197 | case PWM0_CH6 :
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198 | TCCx = TCC0;
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199 | Channelx = 2;
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200 | break;
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201 |
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202 | case PWM0_CH7 :
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203 | TCCx = TCC0;
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204 | Channelx = 3;
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205 | break;
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206 |
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207 | case PWM1_CH0 :
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208 | TCCx = TCC1;
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209 | Channelx = 0;
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210 | break;
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211 |
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212 | case PWM1_CH1 :
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213 | TCCx = TCC1;
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214 | Channelx = 1;
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215 | break;
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216 |
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217 | case PWM2_CH0 :
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218 | TCCx = TCC2;
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219 | Channelx = 0;
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220 | break;
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221 |
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222 | case PWM2_CH1 :
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223 | TCCx = TCC2;
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224 | Channelx = 1;
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225 | break;
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226 | }
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227 |
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228 |
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229 | // Enable clocks according to TCCx instance to use
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230 | switch ( GetTCNumber( g_APinDescription[ulPin].ulPWMChannel ) )
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231 | {
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232 | case 0: // TCC0
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233 | //Enable GCLK for TCC0 (timer counter input clock)
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234 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
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235 | break;
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236 |
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237 | case 1: // TCC1
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238 | //Enable GCLK for TCC1 (timer counter input clock)
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239 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC0_TCC1 )) ;
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240 | break;
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241 |
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242 | case 2: // TCC2
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243 | //Enable GCLK for TCC2 (timer counter input clock)
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244 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 )) ;
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245 | break;
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246 |
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247 | case 3: // TC3
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248 | //Enable GCLK for TC3 (timer counter input clock)
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249 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TCC2_TC3 ));
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250 | break;
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251 |
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252 | case 4: // TC4
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253 | //Enable GCLK for TC4 (timer counter input clock)
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254 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 ));
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255 | break;
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256 |
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257 | case 5: // TC5
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258 | //Enable GCLK for TC5 (timer counter input clock)
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259 | GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID( GCM_TC4_TC5 )) ;
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260 | break;
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261 | }
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262 |
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263 | // Set PORT
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264 | if ( isTC )
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265 | {
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266 | // -- Configure TC
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267 | //DISABLE TCx
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268 | TCx->COUNT8.CTRLA.reg &=~(TC_CTRLA_ENABLE);
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269 | //Set Timer counter Mode to 8 bits
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270 | TCx->COUNT8.CTRLA.reg |= TC_CTRLA_MODE_COUNT8;
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271 | //Set TCx as normal PWM
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272 | TCx->COUNT8.CTRLA.reg |= TC_CTRLA_WAVEGEN_NPWM;
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273 | //Set TCx in waveform mode Normal PWM
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274 | TCx->COUNT8.CC[Channelx].reg = (uint8_t) ulValue;
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275 | //Set PER to maximum counter value (resolution : 0xFF)
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276 | TCx->COUNT8.PER.reg = 0xFF;
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277 | // Enable TCx
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278 | TCx->COUNT8.CTRLA.reg |= TC_CTRLA_ENABLE;
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279 | }
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280 | else
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281 | {
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282 | // -- Configure TCC
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283 |
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284 | //DISABLE TCCx
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285 | TCCx->CTRLA.reg &=~(TCC_CTRLA_ENABLE);
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286 | //Set TCx as normal PWM
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287 | TCCx->WAVE.reg |= TCC_WAVE_WAVEGEN_NPWM;
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288 | //Set TCx in waveform mode Normal PWM
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289 | TCCx->CC[Channelx].reg = (uint32_t)ulValue;
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290 | //Set PER to maximum counter value (resolution : 0xFF)
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291 | TCCx->PER.reg = 0xFF;
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292 | //ENABLE TCCx
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293 | TCCx->CTRLA.reg |= TCC_CTRLA_ENABLE ;
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294 | }
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295 |
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296 | return ;
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297 | }
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298 |
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299 | // -- Defaults to digital write
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300 | pinMode( ulPin, OUTPUT ) ;
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301 |
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302 | if ( ulValue < 128 )
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303 | {
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304 | digitalWrite( ulPin, LOW ) ;
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305 | }
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306 | else
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307 | {
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308 | digitalWrite( ulPin, HIGH ) ;
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309 | }
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310 | }
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311 |
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312 | #ifdef __cplusplus
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313 | }
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314 | #endif
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