1 | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_hal_i2s.c
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4 | * @author MCD Application Team
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5 | * @version V1.4.1
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6 | * @date 09-October-2015
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7 | * @brief I2S HAL module driver.
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8 | * This file provides firmware functions to manage the following
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9 | * functionalities of the Integrated Interchip Sound (I2S) peripheral:
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10 | * + Initialization and de-initialization functions
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11 | * + IO operation functions
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12 | * + Peripheral State and Errors functions
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13 | @verbatim
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14 | ===============================================================================
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15 | ##### How to use this driver #####
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16 | ===============================================================================
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17 | [..]
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18 | The I2S HAL driver can be used as follow:
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19 |
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20 | (#) Declare a I2S_HandleTypeDef handle structure.
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21 | (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
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22 | (##) Enable the SPIx interface clock.
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23 | (##) I2S pins configuration:
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24 | (+++) Enable the clock for the I2S GPIOs.
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25 | (+++) Configure these I2S pins as alternate function pull-up.
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26 | (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
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27 | and HAL_I2S_Receive_IT() APIs).
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28 | (+++) Configure the I2Sx interrupt priority.
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29 | (+++) Enable the NVIC I2S IRQ handle.
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30 | (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
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31 | and HAL_I2S_Receive_DMA() APIs:
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32 | (+++) Declare a DMA handle structure for the Tx/Rx stream.
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33 | (+++) Enable the DMAx interface clock.
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34 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
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35 | (+++) Configure the DMA Tx/Rx Stream.
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36 | (+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle.
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37 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
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38 | DMA Tx/Rx Stream.
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39 |
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40 | (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
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41 | using HAL_I2S_Init() function.
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42 |
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43 | -@- The specific I2S interrupts (Transmission complete interrupt,
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44 | RXNE interrupt and Error Interrupts) will be managed using the macros
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45 | __I2S_ENABLE_IT() and __I2S_DISABLE_IT() inside the transmit and receive process.
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46 | -@- Make sure that either:
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47 | (+@) I2S PLL is configured or
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48 | (+@) External clock source is configured after setting correctly
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49 | the define constant EXTERNAL_CLOCK_VALUE in the stm32f4xx_hal_conf.h file.
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50 |
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51 | (#) Three operation modes are available within this driver :
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52 |
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53 | *** Polling mode IO operation ***
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54 | =================================
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55 | [..]
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56 | (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
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57 | (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
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58 |
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59 | *** Interrupt mode IO operation ***
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60 | ===================================
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61 | [..]
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62 | (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
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63 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
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64 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
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65 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
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66 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback
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67 | (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
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68 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
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69 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
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70 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
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71 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback
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72 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
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73 | add his own code by customization of function pointer HAL_I2S_ErrorCallback
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74 |
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75 | *** DMA mode IO operation ***
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76 | ==============================
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77 | [..]
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78 | (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
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79 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
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80 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
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81 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
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82 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback
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83 | (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
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84 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
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85 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
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86 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
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87 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback
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88 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
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89 | add his own code by customization of function pointer HAL_I2S_ErrorCallback
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90 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
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91 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
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92 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
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93 |
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94 | *** I2S HAL driver macros list ***
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95 | =============================================
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96 | [..]
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97 | Below the list of most used macros in USART HAL driver.
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98 |
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99 | (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
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100 | (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
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101 | (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
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102 | (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
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103 | (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
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104 |
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105 | [..]
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106 | (@) You can refer to the I2S HAL driver header file for more useful macros
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107 |
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108 | @endverbatim
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109 | ******************************************************************************
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110 | * @attention
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111 | *
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112 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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113 | *
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114 | * Redistribution and use in source and binary forms, with or without modification,
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115 | * are permitted provided that the following conditions are met:
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116 | * 1. Redistributions of source code must retain the above copyright notice,
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117 | * this list of conditions and the following disclaimer.
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118 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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119 | * this list of conditions and the following disclaimer in the documentation
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120 | * and/or other materials provided with the distribution.
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121 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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122 | * may be used to endorse or promote products derived from this software
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123 | * without specific prior written permission.
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124 | *
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125 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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126 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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127 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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128 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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129 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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130 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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131 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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132 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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133 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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134 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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135 | *
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136 | ******************************************************************************
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137 | */
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138 |
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139 | /* Includes ------------------------------------------------------------------*/
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140 | #include "stm32f4xx_hal.h"
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141 |
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142 | /** @addtogroup STM32F4xx_HAL_Driver
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143 | * @{
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144 | */
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145 |
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146 | /** @defgroup I2S I2S
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147 | * @brief I2S HAL module driver
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148 | * @{
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149 | */
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150 |
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151 | #ifdef HAL_I2S_MODULE_ENABLED
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152 |
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153 | /* Private typedef -----------------------------------------------------------*/
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154 | /* Private define ------------------------------------------------------------*/
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155 | /* Private macro -------------------------------------------------------------*/
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156 | /* Private variables ---------------------------------------------------------*/
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157 | /* Private function prototypes -----------------------------------------------*/
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158 | /** @addtogroup I2S_Private_Functions
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159 | * @{
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160 | */
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161 |
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162 | /**
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163 | * @}
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164 | */
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165 |
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166 | /* Exported functions --------------------------------------------------------*/
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167 | /** @defgroup I2S_Exported_Functions I2S Exported Functions
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168 | * @{
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169 | */
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170 |
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171 | /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
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172 | * @brief Initialization and Configuration functions
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173 | *
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174 | @verbatim
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175 | ===============================================================================
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176 | ##### Initialization and de-initialization functions #####
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177 | ===============================================================================
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178 | [..] This subsection provides a set of functions allowing to initialize and
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179 | de-initialize the I2Sx peripheral in simplex mode:
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180 |
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181 | (+) User must Implement HAL_I2S_MspInit() function in which he configures
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182 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
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183 |
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184 | (+) Call the function HAL_I2S_Init() to configure the selected device with
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185 | the selected configuration:
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186 | (++) Mode
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187 | (++) Standard
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188 | (++) Data Format
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189 | (++) MCLK Output
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190 | (++) Audio frequency
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191 | (++) Polarity
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192 |
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193 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration
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194 | of the selected I2Sx peripheral.
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195 | @endverbatim
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196 | * @{
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197 | */
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198 |
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199 | /**
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200 | * @brief Initializes the I2S according to the specified parameters
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201 | * in the I2S_InitTypeDef and create the associated handle.
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202 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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203 | * the configuration information for I2S module
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204 | * @retval HAL status
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205 | */
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206 | __weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
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207 | {
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208 | uint32_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
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209 | uint32_t tmp = 0, i2sclk = 0;
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210 |
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211 | /* Check the I2S handle allocation */
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212 | if(hi2s == NULL)
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213 | {
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214 | return HAL_ERROR;
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215 | }
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216 |
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217 | /* Check the I2S parameters */
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218 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
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219 | assert_param(IS_I2S_MODE(hi2s->Init.Mode));
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220 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
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221 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
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222 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
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223 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
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224 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
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225 | assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource));
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226 |
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227 | if(hi2s->State == HAL_I2S_STATE_RESET)
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228 | {
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229 | /* Allocate lock resource and initialize it */
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230 | hi2s->Lock = HAL_UNLOCKED;
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231 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
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232 | HAL_I2S_MspInit(hi2s);
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233 | }
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234 |
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235 | hi2s->State = HAL_I2S_STATE_BUSY;
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236 |
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237 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------*/
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238 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
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239 | hi2s->Instance->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
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240 | SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
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241 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD);
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242 | hi2s->Instance->I2SPR = 0x0002;
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243 |
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244 | /* Get the I2SCFGR register value */
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245 | tmpreg = hi2s->Instance->I2SCFGR;
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246 |
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247 | /* If the default frequency value has to be written, reinitialize i2sdiv and i2sodd */
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248 | /* If the requested audio frequency is not the default, compute the prescaler */
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249 | if(hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT)
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250 | {
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251 | /* Check the frame length (For the Prescaler computing) *******************/
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252 | if(hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
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253 | {
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254 | /* Packet length is 32 bits */
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255 | packetlength = 2;
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256 | }
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257 |
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258 | /* Get I2S source Clock frequency ****************************************/
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259 | /* If an external I2S clock has to be used, the specific define should be set
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260 | in the project configuration or in the stm32f4xx_conf.h file */
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261 | i2sclk = I2S_GetInputClock(hi2s);
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262 |
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263 | /* Compute the Real divider depending on the MCLK output state, with a floating point */
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264 | if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
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265 | {
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266 | /* MCLK output is enabled */
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267 | tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
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268 | }
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269 | else
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270 | {
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271 | /* MCLK output is disabled */
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272 | tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
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273 | }
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274 |
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275 | /* Remove the flatting point */
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276 | tmp = tmp / 10;
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277 |
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278 | /* Check the parity of the divider */
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279 | i2sodd = (uint32_t)(tmp & (uint32_t)1);
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280 |
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281 | /* Compute the i2sdiv prescaler */
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282 | i2sdiv = (uint32_t)((tmp - i2sodd) / 2);
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283 |
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284 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
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285 | i2sodd = (uint32_t) (i2sodd << 8);
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286 | }
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287 |
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288 | /* Test if the divider is 1 or 0 or greater than 0xFF */
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289 | if((i2sdiv < 2) || (i2sdiv > 0xFF))
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290 | {
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291 | /* Set the default values */
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292 | i2sdiv = 2;
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293 | i2sodd = 0;
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294 | }
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295 |
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296 | /* Write to SPIx I2SPR register the computed value */
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297 | hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
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298 |
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299 | /* Configure the I2S with the I2S_InitStruct values */
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300 | tmpreg |= (uint32_t)(SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode | hi2s->Init.Standard | hi2s->Init.DataFormat | hi2s->Init.CPOL);
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301 |
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302 | #if defined(SPI_I2SCFGR_ASTRTEN)
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303 | if (hi2s->Init.Standard == I2S_STANDARD_PCM_SHORT)
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304 | {
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305 | /* Write to SPIx I2SCFGR */
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306 | hi2s->Instance->I2SCFGR = tmpreg | SPI_I2SCFGR_ASTRTEN;
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307 | }
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308 | else
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309 | {
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310 | /* Write to SPIx I2SCFGR */
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311 | hi2s->Instance->I2SCFGR = tmpreg;
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312 | }
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313 | #else
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314 | /* Write to SPIx I2SCFGR */
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315 | hi2s->Instance->I2SCFGR = tmpreg;
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316 | #endif
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317 |
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318 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
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319 | hi2s->State= HAL_I2S_STATE_READY;
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320 |
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321 | return HAL_OK;
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322 | }
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323 |
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324 | /**
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325 | * @brief DeInitializes the I2S peripheral
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326 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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327 | * the configuration information for I2S module
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328 | * @retval HAL status
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329 | */
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330 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
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331 | {
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332 | /* Check the I2S handle allocation */
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333 | if(hi2s == NULL)
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334 | {
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335 | return HAL_ERROR;
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336 | }
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337 |
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338 | hi2s->State = HAL_I2S_STATE_BUSY;
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339 |
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340 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
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341 | HAL_I2S_MspDeInit(hi2s);
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342 |
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343 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
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344 | hi2s->State = HAL_I2S_STATE_RESET;
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345 |
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346 | /* Release Lock */
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347 | __HAL_UNLOCK(hi2s);
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348 |
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349 | return HAL_OK;
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350 | }
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351 |
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352 | /**
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353 | * @brief I2S MSP Init
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354 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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355 | * the configuration information for I2S module
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356 | * @retval None
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357 | */
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358 | __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
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359 | {
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360 | /* NOTE : This function Should not be modified, when the callback is needed,
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361 | the HAL_I2S_MspInit could be implemented in the user file
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362 | */
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363 | }
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364 |
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365 | /**
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366 | * @brief I2S MSP DeInit
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367 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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368 | * the configuration information for I2S module
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369 | * @retval None
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370 | */
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371 | __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
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372 | {
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373 | /* NOTE : This function Should not be modified, when the callback is needed,
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374 | the HAL_I2S_MspDeInit could be implemented in the user file
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375 | */
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376 | }
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377 | /**
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378 | * @}
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379 | */
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380 |
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381 | /** @defgroup I2S_Exported_Functions_Group2 IO operation functions
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382 | * @brief Data transfers functions
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383 | *
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384 | @verbatim
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385 | ===============================================================================
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386 | ##### IO operation functions #####
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387 | ===============================================================================
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388 | [..]
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389 | This subsection provides a set of functions allowing to manage the I2S data
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390 | transfers.
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391 |
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392 | (#) There are two modes of transfer:
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393 | (++) Blocking mode : The communication is performed in the polling mode.
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394 | The status of all data processing is returned by the same function
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395 | after finishing transfer.
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396 | (++) No-Blocking mode : The communication is performed using Interrupts
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397 | or DMA. These functions return the status of the transfer startup.
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398 | The end of the data processing will be indicated through the
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399 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
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400 | using DMA mode.
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401 |
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402 | (#) Blocking mode functions are :
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403 | (++) HAL_I2S_Transmit()
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404 | (++) HAL_I2S_Receive()
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405 |
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406 | (#) No-Blocking mode functions with Interrupt are :
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407 | (++) HAL_I2S_Transmit_IT()
|
---|
408 | (++) HAL_I2S_Receive_IT()
|
---|
409 |
|
---|
410 | (#) No-Blocking mode functions with DMA are :
|
---|
411 | (++) HAL_I2S_Transmit_DMA()
|
---|
412 | (++) HAL_I2S_Receive_DMA()
|
---|
413 |
|
---|
414 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
|
---|
415 | (++) HAL_I2S_TxCpltCallback()
|
---|
416 | (++) HAL_I2S_RxCpltCallback()
|
---|
417 | (++) HAL_I2S_ErrorCallback()
|
---|
418 |
|
---|
419 | @endverbatim
|
---|
420 | * @{
|
---|
421 | */
|
---|
422 |
|
---|
423 | /**
|
---|
424 | * @brief Transmit an amount of data in blocking mode
|
---|
425 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
426 | * the configuration information for I2S module
|
---|
427 | * @param pData: a 16-bit pointer to data buffer.
|
---|
428 | * @param Size: number of data sample to be sent:
|
---|
429 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
---|
430 | * configuration phase, the Size parameter means the number of 16-bit data length
|
---|
431 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
---|
432 | * the Size parameter means the number of 16-bit data length.
|
---|
433 | * @param Timeout: Timeout duration
|
---|
434 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
---|
435 | * between Master and Slave(example: audio streaming).
|
---|
436 | * @retval HAL status
|
---|
437 | */
|
---|
438 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
|
---|
439 | {
|
---|
440 | uint32_t tmp1 = 0, tmp2 = 0;
|
---|
441 | if((pData == NULL ) || (Size == 0))
|
---|
442 | {
|
---|
443 | return HAL_ERROR;
|
---|
444 | }
|
---|
445 |
|
---|
446 | if(hi2s->State == HAL_I2S_STATE_READY)
|
---|
447 | {
|
---|
448 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
449 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
450 | if((tmp1 == I2S_DATAFORMAT_24B)|| \
|
---|
451 | (tmp2 == I2S_DATAFORMAT_32B))
|
---|
452 | {
|
---|
453 | hi2s->TxXferSize = Size*2;
|
---|
454 | hi2s->TxXferCount = Size*2;
|
---|
455 | }
|
---|
456 | else
|
---|
457 | {
|
---|
458 | hi2s->TxXferSize = Size;
|
---|
459 | hi2s->TxXferCount = Size;
|
---|
460 | }
|
---|
461 |
|
---|
462 | /* Process Locked */
|
---|
463 | __HAL_LOCK(hi2s);
|
---|
464 |
|
---|
465 | hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
---|
466 |
|
---|
467 | /* Check if the I2S is already enabled */
|
---|
468 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
---|
469 | {
|
---|
470 | /* Enable I2S peripheral */
|
---|
471 | __HAL_I2S_ENABLE(hi2s);
|
---|
472 | }
|
---|
473 |
|
---|
474 | while(hi2s->TxXferCount > 0)
|
---|
475 | {
|
---|
476 | hi2s->Instance->DR = (*pData++);
|
---|
477 | hi2s->TxXferCount--;
|
---|
478 | /* Wait until TXE flag is set */
|
---|
479 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
|
---|
480 | {
|
---|
481 | return HAL_TIMEOUT;
|
---|
482 | }
|
---|
483 | }
|
---|
484 | /* Check if Slave mode is selected */
|
---|
485 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX))
|
---|
486 | {
|
---|
487 | /* Wait until Busy flag is reset */
|
---|
488 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
|
---|
489 | {
|
---|
490 | return HAL_TIMEOUT;
|
---|
491 | }
|
---|
492 | }
|
---|
493 | hi2s->State = HAL_I2S_STATE_READY;
|
---|
494 |
|
---|
495 | /* Process Unlocked */
|
---|
496 | __HAL_UNLOCK(hi2s);
|
---|
497 |
|
---|
498 | return HAL_OK;
|
---|
499 | }
|
---|
500 | else
|
---|
501 | {
|
---|
502 | return HAL_BUSY;
|
---|
503 | }
|
---|
504 | }
|
---|
505 |
|
---|
506 | /**
|
---|
507 | * @brief Receive an amount of data in blocking mode
|
---|
508 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
509 | * the configuration information for I2S module
|
---|
510 | * @param pData: a 16-bit pointer to data buffer.
|
---|
511 | * @param Size: number of data sample to be sent:
|
---|
512 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
---|
513 | * configuration phase, the Size parameter means the number of 16-bit data length
|
---|
514 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
---|
515 | * the Size parameter means the number of 16-bit data length.
|
---|
516 | * @param Timeout: Timeout duration
|
---|
517 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
---|
518 | * between Master and Slave(example: audio streaming).
|
---|
519 | * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
|
---|
520 | * in continuous way and as the I2S is not disabled at the end of the I2S transaction.
|
---|
521 | * @retval HAL status
|
---|
522 | */
|
---|
523 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
|
---|
524 | {
|
---|
525 | uint32_t tmp1 = 0, tmp2 = 0;
|
---|
526 | if((pData == NULL ) || (Size == 0))
|
---|
527 | {
|
---|
528 | return HAL_ERROR;
|
---|
529 | }
|
---|
530 |
|
---|
531 | if(hi2s->State == HAL_I2S_STATE_READY)
|
---|
532 | {
|
---|
533 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
534 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
535 | if((tmp1 == I2S_DATAFORMAT_24B)|| \
|
---|
536 | (tmp2 == I2S_DATAFORMAT_32B))
|
---|
537 | {
|
---|
538 | hi2s->RxXferSize = Size*2;
|
---|
539 | hi2s->RxXferCount = Size*2;
|
---|
540 | }
|
---|
541 | else
|
---|
542 | {
|
---|
543 | hi2s->RxXferSize = Size;
|
---|
544 | hi2s->RxXferCount = Size;
|
---|
545 | }
|
---|
546 | /* Process Locked */
|
---|
547 | __HAL_LOCK(hi2s);
|
---|
548 |
|
---|
549 | hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
---|
550 |
|
---|
551 | /* Check if the I2S is already enabled */
|
---|
552 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
---|
553 | {
|
---|
554 | /* Enable I2S peripheral */
|
---|
555 | __HAL_I2S_ENABLE(hi2s);
|
---|
556 | }
|
---|
557 |
|
---|
558 | /* Check if Master Receiver mode is selected */
|
---|
559 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
|
---|
560 | {
|
---|
561 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
|
---|
562 | access to the SPI_SR register. */
|
---|
563 | __HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
---|
564 | }
|
---|
565 |
|
---|
566 | /* Receive data */
|
---|
567 | while(hi2s->RxXferCount > 0)
|
---|
568 | {
|
---|
569 | /* Wait until RXNE flag is set */
|
---|
570 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
|
---|
571 | {
|
---|
572 | return HAL_TIMEOUT;
|
---|
573 | }
|
---|
574 |
|
---|
575 | (*pData++) = hi2s->Instance->DR;
|
---|
576 | hi2s->RxXferCount--;
|
---|
577 | }
|
---|
578 |
|
---|
579 | hi2s->State = HAL_I2S_STATE_READY;
|
---|
580 |
|
---|
581 | /* Process Unlocked */
|
---|
582 | __HAL_UNLOCK(hi2s);
|
---|
583 |
|
---|
584 | return HAL_OK;
|
---|
585 | }
|
---|
586 | else
|
---|
587 | {
|
---|
588 | return HAL_BUSY;
|
---|
589 | }
|
---|
590 | }
|
---|
591 |
|
---|
592 | /**
|
---|
593 | * @brief Transmit an amount of data in non-blocking mode with Interrupt
|
---|
594 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
595 | * the configuration information for I2S module
|
---|
596 | * @param pData: a 16-bit pointer to data buffer.
|
---|
597 | * @param Size: number of data sample to be sent:
|
---|
598 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
---|
599 | * configuration phase, the Size parameter means the number of 16-bit data length
|
---|
600 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
---|
601 | * the Size parameter means the number of 16-bit data length.
|
---|
602 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
---|
603 | * between Master and Slave(example: audio streaming).
|
---|
604 | * @retval HAL status
|
---|
605 | */
|
---|
606 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
---|
607 | {
|
---|
608 | uint32_t tmp1 = 0, tmp2 = 0;
|
---|
609 | if(hi2s->State == HAL_I2S_STATE_READY)
|
---|
610 | {
|
---|
611 | if((pData == NULL) || (Size == 0))
|
---|
612 | {
|
---|
613 | return HAL_ERROR;
|
---|
614 | }
|
---|
615 |
|
---|
616 | hi2s->pTxBuffPtr = pData;
|
---|
617 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
618 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
619 | if((tmp1 == I2S_DATAFORMAT_24B)|| \
|
---|
620 | (tmp2 == I2S_DATAFORMAT_32B))
|
---|
621 | {
|
---|
622 | hi2s->TxXferSize = Size*2;
|
---|
623 | hi2s->TxXferCount = Size*2;
|
---|
624 | }
|
---|
625 | else
|
---|
626 | {
|
---|
627 | hi2s->TxXferSize = Size;
|
---|
628 | hi2s->TxXferCount = Size;
|
---|
629 | }
|
---|
630 |
|
---|
631 | /* Process Locked */
|
---|
632 | __HAL_LOCK(hi2s);
|
---|
633 |
|
---|
634 | hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
---|
635 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
---|
636 |
|
---|
637 | /* Enable TXE and ERR interrupt */
|
---|
638 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
---|
639 |
|
---|
640 | /* Check if the I2S is already enabled */
|
---|
641 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
---|
642 | {
|
---|
643 | /* Enable I2S peripheral */
|
---|
644 | __HAL_I2S_ENABLE(hi2s);
|
---|
645 | }
|
---|
646 |
|
---|
647 | /* Process Unlocked */
|
---|
648 | __HAL_UNLOCK(hi2s);
|
---|
649 |
|
---|
650 | return HAL_OK;
|
---|
651 | }
|
---|
652 | else
|
---|
653 | {
|
---|
654 | return HAL_BUSY;
|
---|
655 | }
|
---|
656 | }
|
---|
657 |
|
---|
658 | /**
|
---|
659 | * @brief Receive an amount of data in non-blocking mode with Interrupt
|
---|
660 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
661 | * the configuration information for I2S module
|
---|
662 | * @param pData: a 16-bit pointer to the Receive data buffer.
|
---|
663 | * @param Size: number of data sample to be sent:
|
---|
664 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
---|
665 | * configuration phase, the Size parameter means the number of 16-bit data length
|
---|
666 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
---|
667 | * the Size parameter means the number of 16-bit data length.
|
---|
668 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
---|
669 | * between Master and Slave(example: audio streaming).
|
---|
670 | * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
|
---|
671 | * between Master and Slave otherwise the I2S interrupt should be optimized.
|
---|
672 | * @retval HAL status
|
---|
673 | */
|
---|
674 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
---|
675 | {
|
---|
676 | uint32_t tmp1 = 0, tmp2 = 0;
|
---|
677 | if(hi2s->State == HAL_I2S_STATE_READY)
|
---|
678 | {
|
---|
679 | if((pData == NULL) || (Size == 0))
|
---|
680 | {
|
---|
681 | return HAL_ERROR;
|
---|
682 | }
|
---|
683 |
|
---|
684 | hi2s->pRxBuffPtr = pData;
|
---|
685 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
686 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
687 | if((tmp1 == I2S_DATAFORMAT_24B)||\
|
---|
688 | (tmp2 == I2S_DATAFORMAT_32B))
|
---|
689 | {
|
---|
690 | hi2s->RxXferSize = Size*2;
|
---|
691 | hi2s->RxXferCount = Size*2;
|
---|
692 | }
|
---|
693 | else
|
---|
694 | {
|
---|
695 | hi2s->RxXferSize = Size;
|
---|
696 | hi2s->RxXferCount = Size;
|
---|
697 | }
|
---|
698 | /* Process Locked */
|
---|
699 | __HAL_LOCK(hi2s);
|
---|
700 |
|
---|
701 | hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
---|
702 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
---|
703 |
|
---|
704 | /* Enable TXE and ERR interrupt */
|
---|
705 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
---|
706 |
|
---|
707 | /* Check if the I2S is already enabled */
|
---|
708 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
---|
709 | {
|
---|
710 | /* Enable I2S peripheral */
|
---|
711 | __HAL_I2S_ENABLE(hi2s);
|
---|
712 | }
|
---|
713 |
|
---|
714 | /* Process Unlocked */
|
---|
715 | __HAL_UNLOCK(hi2s);
|
---|
716 |
|
---|
717 | return HAL_OK;
|
---|
718 | }
|
---|
719 |
|
---|
720 | else
|
---|
721 | {
|
---|
722 | return HAL_BUSY;
|
---|
723 | }
|
---|
724 | }
|
---|
725 |
|
---|
726 | /**
|
---|
727 | * @brief Transmit an amount of data in non-blocking mode with DMA
|
---|
728 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
729 | * the configuration information for I2S module
|
---|
730 | * @param pData: a 16-bit pointer to the Transmit data buffer.
|
---|
731 | * @param Size: number of data sample to be sent:
|
---|
732 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
---|
733 | * configuration phase, the Size parameter means the number of 16-bit data length
|
---|
734 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
---|
735 | * the Size parameter means the number of 16-bit data length.
|
---|
736 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
---|
737 | * between Master and Slave(example: audio streaming).
|
---|
738 | * @retval HAL status
|
---|
739 | */
|
---|
740 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
---|
741 | {
|
---|
742 | uint32_t *tmp;
|
---|
743 | uint32_t tmp1 = 0, tmp2 = 0;
|
---|
744 |
|
---|
745 | if((pData == NULL) || (Size == 0))
|
---|
746 | {
|
---|
747 | return HAL_ERROR;
|
---|
748 | }
|
---|
749 |
|
---|
750 | if(hi2s->State == HAL_I2S_STATE_READY)
|
---|
751 | {
|
---|
752 | hi2s->pTxBuffPtr = pData;
|
---|
753 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
754 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
755 | if((tmp1 == I2S_DATAFORMAT_24B)|| \
|
---|
756 | (tmp2 == I2S_DATAFORMAT_32B))
|
---|
757 | {
|
---|
758 | hi2s->TxXferSize = Size*2;
|
---|
759 | hi2s->TxXferCount = Size*2;
|
---|
760 | }
|
---|
761 | else
|
---|
762 | {
|
---|
763 | hi2s->TxXferSize = Size;
|
---|
764 | hi2s->TxXferCount = Size;
|
---|
765 | }
|
---|
766 |
|
---|
767 | /* Process Locked */
|
---|
768 | __HAL_LOCK(hi2s);
|
---|
769 |
|
---|
770 | hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
---|
771 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
---|
772 |
|
---|
773 | /* Set the I2S Tx DMA Half transfer complete callback */
|
---|
774 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
|
---|
775 |
|
---|
776 | /* Set the I2S Tx DMA transfer complete callback */
|
---|
777 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
|
---|
778 |
|
---|
779 | /* Set the DMA error callback */
|
---|
780 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
|
---|
781 |
|
---|
782 | /* Enable the Tx DMA Stream */
|
---|
783 | tmp = (uint32_t*)&pData;
|
---|
784 | HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
|
---|
785 |
|
---|
786 | /* Check if the I2S is already enabled */
|
---|
787 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
---|
788 | {
|
---|
789 | /* Enable I2S peripheral */
|
---|
790 | __HAL_I2S_ENABLE(hi2s);
|
---|
791 | }
|
---|
792 |
|
---|
793 | /* Check if the I2S Tx request is already enabled */
|
---|
794 | if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN)
|
---|
795 | {
|
---|
796 | /* Enable Tx DMA Request */
|
---|
797 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
|
---|
798 | }
|
---|
799 |
|
---|
800 | /* Process Unlocked */
|
---|
801 | __HAL_UNLOCK(hi2s);
|
---|
802 |
|
---|
803 | return HAL_OK;
|
---|
804 | }
|
---|
805 | else
|
---|
806 | {
|
---|
807 | return HAL_BUSY;
|
---|
808 | }
|
---|
809 | }
|
---|
810 |
|
---|
811 | /**
|
---|
812 | * @brief Receive an amount of data in non-blocking mode with DMA
|
---|
813 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
814 | * the configuration information for I2S module
|
---|
815 | * @param pData: a 16-bit pointer to the Receive data buffer.
|
---|
816 | * @param Size: number of data sample to be sent:
|
---|
817 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
---|
818 | * configuration phase, the Size parameter means the number of 16-bit data length
|
---|
819 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
---|
820 | * the Size parameter means the number of 16-bit data length.
|
---|
821 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
---|
822 | * between Master and Slave(example: audio streaming).
|
---|
823 | * @retval HAL status
|
---|
824 | */
|
---|
825 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
---|
826 | {
|
---|
827 | uint32_t *tmp;
|
---|
828 | uint32_t tmp1 = 0, tmp2 = 0;
|
---|
829 |
|
---|
830 | if((pData == NULL) || (Size == 0))
|
---|
831 | {
|
---|
832 | return HAL_ERROR;
|
---|
833 | }
|
---|
834 |
|
---|
835 | if(hi2s->State == HAL_I2S_STATE_READY)
|
---|
836 | {
|
---|
837 | hi2s->pRxBuffPtr = pData;
|
---|
838 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
839 | tmp2 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN);
|
---|
840 | if((tmp1 == I2S_DATAFORMAT_24B)|| \
|
---|
841 | (tmp2 == I2S_DATAFORMAT_32B))
|
---|
842 | {
|
---|
843 | hi2s->RxXferSize = Size*2;
|
---|
844 | hi2s->RxXferCount = Size*2;
|
---|
845 | }
|
---|
846 | else
|
---|
847 | {
|
---|
848 | hi2s->RxXferSize = Size;
|
---|
849 | hi2s->RxXferCount = Size;
|
---|
850 | }
|
---|
851 | /* Process Locked */
|
---|
852 | __HAL_LOCK(hi2s);
|
---|
853 |
|
---|
854 | hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
---|
855 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
---|
856 |
|
---|
857 | /* Set the I2S Rx DMA Half transfer complete callback */
|
---|
858 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
|
---|
859 |
|
---|
860 | /* Set the I2S Rx DMA transfer complete callback */
|
---|
861 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
|
---|
862 |
|
---|
863 | /* Set the DMA error callback */
|
---|
864 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
|
---|
865 |
|
---|
866 | /* Check if Master Receiver mode is selected */
|
---|
867 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
|
---|
868 | {
|
---|
869 | /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
|
---|
870 | access to the SPI_SR register. */
|
---|
871 | __HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
---|
872 | }
|
---|
873 |
|
---|
874 | /* Enable the Rx DMA Stream */
|
---|
875 | tmp = (uint32_t*)&pData;
|
---|
876 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
|
---|
877 |
|
---|
878 | /* Check if the I2S is already enabled */
|
---|
879 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
---|
880 | {
|
---|
881 | /* Enable I2S peripheral */
|
---|
882 | __HAL_I2S_ENABLE(hi2s);
|
---|
883 | }
|
---|
884 |
|
---|
885 | /* Check if the I2S Rx request is already enabled */
|
---|
886 | if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN)
|
---|
887 | {
|
---|
888 | /* Enable Rx DMA Request */
|
---|
889 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
|
---|
890 | }
|
---|
891 |
|
---|
892 | /* Process Unlocked */
|
---|
893 | __HAL_UNLOCK(hi2s);
|
---|
894 |
|
---|
895 | return HAL_OK;
|
---|
896 | }
|
---|
897 | else
|
---|
898 | {
|
---|
899 | return HAL_BUSY;
|
---|
900 | }
|
---|
901 | }
|
---|
902 |
|
---|
903 | /**
|
---|
904 | * @brief Pauses the audio stream playing from the Media.
|
---|
905 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
906 | * the configuration information for I2S module
|
---|
907 | * @retval HAL status
|
---|
908 | */
|
---|
909 | __weak HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
|
---|
910 | {
|
---|
911 | /* Process Locked */
|
---|
912 | __HAL_LOCK(hi2s);
|
---|
913 |
|
---|
914 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
---|
915 | {
|
---|
916 | /* Disable the I2S DMA Tx request */
|
---|
917 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
|
---|
918 | }
|
---|
919 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
---|
920 | {
|
---|
921 | /* Disable the I2S DMA Rx request */
|
---|
922 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
|
---|
923 | }
|
---|
924 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
|
---|
925 | {
|
---|
926 | if((hi2s->Init.Mode == I2S_MODE_SLAVE_TX)||(hi2s->Init.Mode == I2S_MODE_MASTER_TX))
|
---|
927 | {
|
---|
928 | /* Disable the I2S DMA Tx request */
|
---|
929 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
|
---|
930 | }
|
---|
931 | else
|
---|
932 | {
|
---|
933 | /* Disable the I2S DMA Rx request */
|
---|
934 | hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
|
---|
935 | }
|
---|
936 | }
|
---|
937 |
|
---|
938 | /* Process Unlocked */
|
---|
939 | __HAL_UNLOCK(hi2s);
|
---|
940 |
|
---|
941 | return HAL_OK;
|
---|
942 | }
|
---|
943 |
|
---|
944 | /**
|
---|
945 | * @brief Resumes the audio stream playing from the Media.
|
---|
946 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
947 | * the configuration information for I2S module
|
---|
948 | * @retval HAL status
|
---|
949 | */
|
---|
950 | __weak HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
|
---|
951 | {
|
---|
952 | /* Process Locked */
|
---|
953 | __HAL_LOCK(hi2s);
|
---|
954 |
|
---|
955 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
---|
956 | {
|
---|
957 | /* Enable the I2S DMA Tx request */
|
---|
958 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
|
---|
959 | }
|
---|
960 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
---|
961 | {
|
---|
962 | /* Enable the I2S DMA Rx request */
|
---|
963 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
|
---|
964 | }
|
---|
965 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
|
---|
966 | {
|
---|
967 | if((hi2s->Init.Mode == I2S_MODE_SLAVE_TX)||(hi2s->Init.Mode == I2S_MODE_MASTER_TX))
|
---|
968 | {
|
---|
969 | /* Enable the I2S DMA Tx request */
|
---|
970 | hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
|
---|
971 | }
|
---|
972 | else
|
---|
973 | {
|
---|
974 | /* Enable the I2S DMA Rx request */
|
---|
975 | hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
|
---|
976 | }
|
---|
977 | }
|
---|
978 |
|
---|
979 | /* If the I2S peripheral is still not enabled, enable it */
|
---|
980 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0)
|
---|
981 | {
|
---|
982 | /* Enable I2S peripheral */
|
---|
983 | __HAL_I2S_ENABLE(hi2s);
|
---|
984 | }
|
---|
985 |
|
---|
986 | /* Process Unlocked */
|
---|
987 | __HAL_UNLOCK(hi2s);
|
---|
988 |
|
---|
989 | return HAL_OK;
|
---|
990 | }
|
---|
991 |
|
---|
992 | /**
|
---|
993 | * @brief Resumes the audio stream playing from the Media.
|
---|
994 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
995 | * the configuration information for I2S module
|
---|
996 | * @retval HAL status
|
---|
997 | */
|
---|
998 | __weak HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
|
---|
999 | {
|
---|
1000 | /* Process Locked */
|
---|
1001 | __HAL_LOCK(hi2s);
|
---|
1002 |
|
---|
1003 | /* Disable the I2S Tx/Rx DMA requests */
|
---|
1004 | hi2s->Instance->CR2 &= ~SPI_CR2_TXDMAEN;
|
---|
1005 | hi2s->Instance->CR2 &= ~SPI_CR2_RXDMAEN;
|
---|
1006 |
|
---|
1007 | /* Abort the I2S DMA Stream tx */
|
---|
1008 | if(hi2s->hdmatx != NULL)
|
---|
1009 | {
|
---|
1010 | HAL_DMA_Abort(hi2s->hdmatx);
|
---|
1011 | }
|
---|
1012 | /* Abort the I2S DMA Stream rx */
|
---|
1013 | if(hi2s->hdmarx != NULL)
|
---|
1014 | {
|
---|
1015 | HAL_DMA_Abort(hi2s->hdmarx);
|
---|
1016 | }
|
---|
1017 |
|
---|
1018 | /* Disable I2S peripheral */
|
---|
1019 | __HAL_I2S_DISABLE(hi2s);
|
---|
1020 |
|
---|
1021 | hi2s->State = HAL_I2S_STATE_READY;
|
---|
1022 |
|
---|
1023 | /* Process Unlocked */
|
---|
1024 | __HAL_UNLOCK(hi2s);
|
---|
1025 |
|
---|
1026 | return HAL_OK;
|
---|
1027 | }
|
---|
1028 |
|
---|
1029 | /**
|
---|
1030 | * @brief This function handles I2S interrupt request.
|
---|
1031 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1032 | * the configuration information for I2S module
|
---|
1033 | * @retval None
|
---|
1034 | */
|
---|
1035 | __weak void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
|
---|
1036 | {
|
---|
1037 | uint32_t tmp1 = 0, tmp2 = 0;
|
---|
1038 |
|
---|
1039 | if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
---|
1040 | {
|
---|
1041 | tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_RXNE);
|
---|
1042 | tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE);
|
---|
1043 | /* I2S in mode Receiver ------------------------------------------------*/
|
---|
1044 | if((tmp1 != RESET) && (tmp2 != RESET))
|
---|
1045 | {
|
---|
1046 | I2S_Receive_IT(hi2s);
|
---|
1047 | }
|
---|
1048 |
|
---|
1049 | tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR);
|
---|
1050 | tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR);
|
---|
1051 | /* I2S Overrun error interrupt occurred ---------------------------------*/
|
---|
1052 | if((tmp1 != RESET) && (tmp2 != RESET))
|
---|
1053 | {
|
---|
1054 | __HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
---|
1055 | hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
|
---|
1056 | }
|
---|
1057 | }
|
---|
1058 |
|
---|
1059 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
---|
1060 | {
|
---|
1061 | tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_TXE);
|
---|
1062 | tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE);
|
---|
1063 | /* I2S in mode Transmitter -----------------------------------------------*/
|
---|
1064 | if((tmp1 != RESET) && (tmp2 != RESET))
|
---|
1065 | {
|
---|
1066 | I2S_Transmit_IT(hi2s);
|
---|
1067 | }
|
---|
1068 |
|
---|
1069 | tmp1 = __HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR);
|
---|
1070 | tmp2 = __HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR);
|
---|
1071 | /* I2S Underrun error interrupt occurred --------------------------------*/
|
---|
1072 | if((tmp1 != RESET) && (tmp2 != RESET))
|
---|
1073 | {
|
---|
1074 | __HAL_I2S_CLEAR_UDRFLAG(hi2s);
|
---|
1075 | hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
|
---|
1076 | }
|
---|
1077 | }
|
---|
1078 |
|
---|
1079 | /* Call the Error call Back in case of Errors */
|
---|
1080 | if(hi2s->ErrorCode != HAL_I2S_ERROR_NONE)
|
---|
1081 | {
|
---|
1082 | /* Set the I2S state ready to be able to start again the process */
|
---|
1083 | hi2s->State= HAL_I2S_STATE_READY;
|
---|
1084 | HAL_I2S_ErrorCallback(hi2s);
|
---|
1085 | }
|
---|
1086 | }
|
---|
1087 |
|
---|
1088 | /**
|
---|
1089 | * @brief Tx Transfer Half completed callbacks
|
---|
1090 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1091 | * the configuration information for I2S module
|
---|
1092 | * @retval None
|
---|
1093 | */
|
---|
1094 | __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
|
---|
1095 | {
|
---|
1096 | /* NOTE : This function Should not be modified, when the callback is needed,
|
---|
1097 | the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
|
---|
1098 | */
|
---|
1099 | }
|
---|
1100 |
|
---|
1101 | /**
|
---|
1102 | * @brief Tx Transfer completed callbacks
|
---|
1103 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1104 | * the configuration information for I2S module
|
---|
1105 | * @retval None
|
---|
1106 | */
|
---|
1107 | __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
|
---|
1108 | {
|
---|
1109 | /* NOTE : This function Should not be modified, when the callback is needed,
|
---|
1110 | the HAL_I2S_TxCpltCallback could be implemented in the user file
|
---|
1111 | */
|
---|
1112 | }
|
---|
1113 |
|
---|
1114 | /**
|
---|
1115 | * @brief Rx Transfer half completed callbacks
|
---|
1116 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1117 | * the configuration information for I2S module
|
---|
1118 | * @retval None
|
---|
1119 | */
|
---|
1120 | __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
|
---|
1121 | {
|
---|
1122 | /* NOTE : This function Should not be modified, when the callback is needed,
|
---|
1123 | the HAL_I2S_RxCpltCallback could be implemented in the user file
|
---|
1124 | */
|
---|
1125 | }
|
---|
1126 |
|
---|
1127 | /**
|
---|
1128 | * @brief Rx Transfer completed callbacks
|
---|
1129 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1130 | * the configuration information for I2S module
|
---|
1131 | * @retval None
|
---|
1132 | */
|
---|
1133 | __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
|
---|
1134 | {
|
---|
1135 | /* NOTE : This function Should not be modified, when the callback is needed,
|
---|
1136 | the HAL_I2S_RxCpltCallback could be implemented in the user file
|
---|
1137 | */
|
---|
1138 | }
|
---|
1139 |
|
---|
1140 | /**
|
---|
1141 | * @brief I2S error callbacks
|
---|
1142 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1143 | * the configuration information for I2S module
|
---|
1144 | * @retval None
|
---|
1145 | */
|
---|
1146 | __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
|
---|
1147 | {
|
---|
1148 | /* NOTE : This function Should not be modified, when the callback is needed,
|
---|
1149 | the HAL_I2S_ErrorCallback could be implemented in the user file
|
---|
1150 | */
|
---|
1151 | }
|
---|
1152 |
|
---|
1153 | /**
|
---|
1154 | * @}
|
---|
1155 | */
|
---|
1156 |
|
---|
1157 | /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
|
---|
1158 | * @brief Peripheral State functions
|
---|
1159 | @verbatim
|
---|
1160 | ===============================================================================
|
---|
1161 | ##### Peripheral State and Errors functions #####
|
---|
1162 | ===============================================================================
|
---|
1163 | [..]
|
---|
1164 | This subsection permits to get in run-time the status of the peripheral
|
---|
1165 | and the data flow.
|
---|
1166 |
|
---|
1167 | @endverbatim
|
---|
1168 | * @{
|
---|
1169 | */
|
---|
1170 |
|
---|
1171 | /**
|
---|
1172 | * @brief Return the I2S state
|
---|
1173 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1174 | * the configuration information for I2S module
|
---|
1175 | * @retval HAL state
|
---|
1176 | */
|
---|
1177 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
|
---|
1178 | {
|
---|
1179 | return hi2s->State;
|
---|
1180 | }
|
---|
1181 |
|
---|
1182 | /**
|
---|
1183 | * @brief Return the I2S error code
|
---|
1184 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1185 | * the configuration information for I2S module
|
---|
1186 | * @retval I2S Error Code
|
---|
1187 | */
|
---|
1188 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
|
---|
1189 | {
|
---|
1190 | return hi2s->ErrorCode;
|
---|
1191 | }
|
---|
1192 | /**
|
---|
1193 | * @}
|
---|
1194 | */
|
---|
1195 |
|
---|
1196 | /**
|
---|
1197 | * @brief DMA I2S transmit process half complete callback
|
---|
1198 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
---|
1199 | * the configuration information for the specified DMA module.
|
---|
1200 | * @retval None
|
---|
1201 | */
|
---|
1202 | void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
|
---|
1203 | {
|
---|
1204 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
|
---|
1205 |
|
---|
1206 | HAL_I2S_TxHalfCpltCallback(hi2s);
|
---|
1207 | }
|
---|
1208 |
|
---|
1209 | /**
|
---|
1210 | * @brief DMA I2S receive process half complete callback
|
---|
1211 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
---|
1212 | * the configuration information for the specified DMA module.
|
---|
1213 | * @retval None
|
---|
1214 | */
|
---|
1215 | void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
|
---|
1216 | {
|
---|
1217 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
|
---|
1218 |
|
---|
1219 | HAL_I2S_RxHalfCpltCallback(hi2s);
|
---|
1220 | }
|
---|
1221 |
|
---|
1222 | /**
|
---|
1223 | * @brief DMA I2S communication error callback
|
---|
1224 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
---|
1225 | * the configuration information for the specified DMA module.
|
---|
1226 | * @retval None
|
---|
1227 | */
|
---|
1228 | void I2S_DMAError(DMA_HandleTypeDef *hdma)
|
---|
1229 | {
|
---|
1230 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
|
---|
1231 |
|
---|
1232 | hi2s->TxXferCount = 0;
|
---|
1233 | hi2s->RxXferCount = 0;
|
---|
1234 |
|
---|
1235 | hi2s->State= HAL_I2S_STATE_READY;
|
---|
1236 |
|
---|
1237 | hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
|
---|
1238 | HAL_I2S_ErrorCallback(hi2s);
|
---|
1239 | }
|
---|
1240 |
|
---|
1241 | /**
|
---|
1242 | * @brief Transmit an amount of data in non-blocking mode with Interrupt
|
---|
1243 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1244 | * the configuration information for I2S module
|
---|
1245 | * @retval HAL status
|
---|
1246 | */
|
---|
1247 | HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
|
---|
1248 | {
|
---|
1249 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
---|
1250 | {
|
---|
1251 | /* Process Locked */
|
---|
1252 | __HAL_LOCK(hi2s);
|
---|
1253 |
|
---|
1254 | /* Transmit data */
|
---|
1255 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
|
---|
1256 |
|
---|
1257 | hi2s->TxXferCount--;
|
---|
1258 |
|
---|
1259 | if(hi2s->TxXferCount == 0)
|
---|
1260 | {
|
---|
1261 | /* Disable TXE and ERR interrupt */
|
---|
1262 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
---|
1263 |
|
---|
1264 | hi2s->State = HAL_I2S_STATE_READY;
|
---|
1265 |
|
---|
1266 | /* Process Unlocked */
|
---|
1267 | __HAL_UNLOCK(hi2s);
|
---|
1268 | HAL_I2S_TxCpltCallback(hi2s);
|
---|
1269 | }
|
---|
1270 | else
|
---|
1271 | {
|
---|
1272 | /* Process Unlocked */
|
---|
1273 | __HAL_UNLOCK(hi2s);
|
---|
1274 | }
|
---|
1275 |
|
---|
1276 | return HAL_OK;
|
---|
1277 | }
|
---|
1278 |
|
---|
1279 | else
|
---|
1280 | {
|
---|
1281 | return HAL_BUSY;
|
---|
1282 | }
|
---|
1283 | }
|
---|
1284 |
|
---|
1285 | /**
|
---|
1286 | * @brief Receive an amount of data in non-blocking mode with Interrupt
|
---|
1287 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1288 | * the configuration information for I2S module
|
---|
1289 | * @retval HAL status
|
---|
1290 | */
|
---|
1291 | HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
|
---|
1292 | {
|
---|
1293 | if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
---|
1294 | {
|
---|
1295 | /* Process Locked */
|
---|
1296 | __HAL_LOCK(hi2s);
|
---|
1297 |
|
---|
1298 | /* Receive data */
|
---|
1299 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
|
---|
1300 |
|
---|
1301 | hi2s->RxXferCount--;
|
---|
1302 |
|
---|
1303 | /* Check if Master Receiver mode is selected */
|
---|
1304 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
|
---|
1305 | {
|
---|
1306 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
|
---|
1307 | access to the SPI_SR register. */
|
---|
1308 | __HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
---|
1309 | }
|
---|
1310 |
|
---|
1311 | if(hi2s->RxXferCount == 0)
|
---|
1312 | {
|
---|
1313 | /* Disable RXNE and ERR interrupt */
|
---|
1314 | __HAL_I2S_DISABLE_IT(hi2s, I2S_IT_RXNE | I2S_IT_ERR);
|
---|
1315 |
|
---|
1316 | hi2s->State = HAL_I2S_STATE_READY;
|
---|
1317 |
|
---|
1318 | /* Process Unlocked */
|
---|
1319 | __HAL_UNLOCK(hi2s);
|
---|
1320 |
|
---|
1321 | HAL_I2S_RxCpltCallback(hi2s);
|
---|
1322 | }
|
---|
1323 | else
|
---|
1324 | {
|
---|
1325 | /* Process Unlocked */
|
---|
1326 | __HAL_UNLOCK(hi2s);
|
---|
1327 | }
|
---|
1328 |
|
---|
1329 | return HAL_OK;
|
---|
1330 | }
|
---|
1331 | else
|
---|
1332 | {
|
---|
1333 | return HAL_BUSY;
|
---|
1334 | }
|
---|
1335 | }
|
---|
1336 |
|
---|
1337 | /**
|
---|
1338 | * @brief This function handles I2S Communication Timeout.
|
---|
1339 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
---|
1340 | * the configuration information for I2S module
|
---|
1341 | * @param Flag: Flag checked
|
---|
1342 | * @param Status: Value of the flag expected
|
---|
1343 | * @param Timeout: Duration of the timeout
|
---|
1344 | * @retval HAL status
|
---|
1345 | */
|
---|
1346 | HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout)
|
---|
1347 | {
|
---|
1348 | uint32_t tickstart = 0;
|
---|
1349 |
|
---|
1350 | /* Get tick */
|
---|
1351 | tickstart = HAL_GetTick();
|
---|
1352 |
|
---|
1353 | /* Wait until flag is set */
|
---|
1354 | if(Status == RESET)
|
---|
1355 | {
|
---|
1356 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
|
---|
1357 | {
|
---|
1358 | if(Timeout != HAL_MAX_DELAY)
|
---|
1359 | {
|
---|
1360 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
---|
1361 | {
|
---|
1362 | /* Set the I2S State ready */
|
---|
1363 | hi2s->State= HAL_I2S_STATE_READY;
|
---|
1364 |
|
---|
1365 | /* Process Unlocked */
|
---|
1366 | __HAL_UNLOCK(hi2s);
|
---|
1367 |
|
---|
1368 | return HAL_TIMEOUT;
|
---|
1369 | }
|
---|
1370 | }
|
---|
1371 | }
|
---|
1372 | }
|
---|
1373 | else
|
---|
1374 | {
|
---|
1375 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
|
---|
1376 | {
|
---|
1377 | if(Timeout != HAL_MAX_DELAY)
|
---|
1378 | {
|
---|
1379 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
---|
1380 | {
|
---|
1381 | /* Set the I2S State ready */
|
---|
1382 | hi2s->State= HAL_I2S_STATE_READY;
|
---|
1383 |
|
---|
1384 | /* Process Unlocked */
|
---|
1385 | __HAL_UNLOCK(hi2s);
|
---|
1386 |
|
---|
1387 | return HAL_TIMEOUT;
|
---|
1388 | }
|
---|
1389 | }
|
---|
1390 | }
|
---|
1391 | }
|
---|
1392 | return HAL_OK;
|
---|
1393 | }
|
---|
1394 |
|
---|
1395 | /**
|
---|
1396 | * @}
|
---|
1397 | */
|
---|
1398 |
|
---|
1399 | #endif /* HAL_I2S_MODULE_ENABLED */
|
---|
1400 | /**
|
---|
1401 | * @}
|
---|
1402 | */
|
---|
1403 |
|
---|
1404 | /**
|
---|
1405 | * @}
|
---|
1406 | */
|
---|
1407 |
|
---|
1408 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
---|