[303] | 1 | /**
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| 2 | ******************************************************************************
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| 3 | * @file stm32f4xx_hal_flash_ex.c
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| 4 | * @author MCD Application Team
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| 5 | * @version V1.4.1
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| 6 | * @date 09-October-2015
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| 7 | * @brief Extended FLASH HAL module driver.
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| 8 | * This file provides firmware functions to manage the following
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| 9 | * functionalities of the FLASH extension peripheral:
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| 10 | * + Extended programming operations functions
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| 11 | *
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| 12 | @verbatim
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| 13 | ==============================================================================
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| 14 | ##### Flash Extension features #####
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| 15 | ==============================================================================
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| 16 |
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| 17 | [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
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| 18 | STM32F429xx/439xx devices contains the following additional features
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| 19 |
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| 20 | (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
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| 21 | capability (RWW)
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| 22 | (+) Dual bank memory organization
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| 23 | (+) PCROP protection for all banks
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| 24 |
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| 25 | ##### How to use this driver #####
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| 26 | ==============================================================================
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| 27 | [..] This driver provides functions to configure and program the FLASH memory
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| 28 | of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
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| 29 | devices. It includes
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| 30 | (#) FLASH Memory Erase functions:
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| 31 | (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
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| 32 | HAL_FLASH_Lock() functions
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| 33 | (++) Erase function: Erase sector, erase all sectors
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| 34 | (++) There are two modes of erase :
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| 35 | (+++) Polling Mode using HAL_FLASHEx_Erase()
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| 36 | (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
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| 37 |
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| 38 | (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
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| 39 | (++) Set/Reset the write protection
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| 40 | (++) Set the Read protection Level
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| 41 | (++) Set the BOR level
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| 42 | (++) Program the user Option Bytes
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| 43 | (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
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| 44 | (++) Extended space (bank 2) erase function
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| 45 | (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
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| 46 | (++) Dual Boot activation
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| 47 | (++) Write protection configuration for bank 2
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| 48 | (++) PCROP protection configuration and control for both banks
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| 49 |
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| 50 | @endverbatim
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| 51 | ******************************************************************************
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| 52 | * @attention
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| 53 | *
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| 54 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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| 55 | *
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| 56 | * Redistribution and use in source and binary forms, with or without modification,
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| 57 | * are permitted provided that the following conditions are met:
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| 58 | * 1. Redistributions of source code must retain the above copyright notice,
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| 59 | * this list of conditions and the following disclaimer.
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| 60 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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| 61 | * this list of conditions and the following disclaimer in the documentation
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| 62 | * and/or other materials provided with the distribution.
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| 63 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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| 64 | * may be used to endorse or promote products derived from this software
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| 65 | * without specific prior written permission.
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| 66 | *
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| 67 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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| 68 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| 69 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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| 70 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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| 71 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| 72 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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| 73 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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| 74 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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| 75 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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| 76 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 77 | *
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| 78 | ******************************************************************************
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| 79 | */
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| 80 |
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| 81 | /* Includes ------------------------------------------------------------------*/
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| 82 | #include "stm32f4xx_hal.h"
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| 83 |
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| 84 | /** @addtogroup STM32F4xx_HAL_Driver
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| 85 | * @{
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| 86 | */
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| 87 |
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| 88 | /** @defgroup FLASHEx FLASHEx
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| 89 | * @brief FLASH HAL Extension module driver
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| 90 | * @{
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| 91 | */
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| 92 |
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| 93 | #ifdef HAL_FLASH_MODULE_ENABLED
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| 94 |
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| 95 | /* Private typedef -----------------------------------------------------------*/
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| 96 | /* Private define ------------------------------------------------------------*/
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| 97 | /** @addtogroup FLASHEx_Private_Constants
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| 98 | * @{
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| 99 | */
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| 100 | #define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
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| 101 | /**
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| 102 | * @}
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| 103 | */
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| 104 |
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| 105 | /* Private macro -------------------------------------------------------------*/
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| 106 | /* Private variables ---------------------------------------------------------*/
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| 107 | /** @addtogroup FLASHEx_Private_Variables
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| 108 | * @{
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| 109 | */
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| 110 | extern FLASH_ProcessTypeDef pFlash;
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| 111 | /**
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| 112 | * @}
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| 113 | */
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| 114 |
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| 115 | /* Private function prototypes -----------------------------------------------*/
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| 116 | /** @addtogroup FLASHEx_Private_Functions
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| 117 | * @{
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| 118 | */
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| 119 | /* Option bytes control */
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| 120 | static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
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| 121 | void FLASH_FlushCaches(void);
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| 122 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
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| 123 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
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| 124 | static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
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| 125 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
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| 126 | static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
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| 127 | static uint8_t FLASH_OB_GetUser(void);
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| 128 | static uint16_t FLASH_OB_GetWRP(void);
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| 129 | static uint8_t FLASH_OB_GetRDP(void);
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| 130 | static uint8_t FLASH_OB_GetBOR(void);
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| 131 |
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| 132 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
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| 133 | defined(STM32F446xx)
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| 134 | static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
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| 135 | static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
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| 136 | #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
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| 137 |
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| 138 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
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| 139 | static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
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| 140 | static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
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| 141 | static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
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| 142 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
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| 143 |
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| 144 | extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
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| 145 | /**
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| 146 | * @}
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| 147 | */
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| 148 |
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| 149 | /* Exported functions --------------------------------------------------------*/
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| 150 | /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
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| 151 | * @{
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| 152 | */
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| 153 |
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| 154 | /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
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| 155 | * @brief Extended IO operation functions
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| 156 | *
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| 157 | @verbatim
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| 158 | ===============================================================================
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| 159 | ##### Extended programming operation functions #####
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| 160 | ===============================================================================
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| 161 | [..]
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| 162 | This subsection provides a set of functions allowing to manage the Extension FLASH
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| 163 | programming operations.
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| 164 |
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| 165 | @endverbatim
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| 166 | * @{
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| 167 | */
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| 168 | /**
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| 169 | * @brief Perform a mass erase or erase the specified FLASH memory sectors
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| 170 | * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
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| 171 | * contains the configuration information for the erasing.
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| 172 | *
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| 173 | * @param[out] SectorError: pointer to variable that
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| 174 | * contains the configuration information on faulty sector in case of error
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| 175 | * (0xFFFFFFFF means that all the sectors have been correctly erased)
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| 176 | *
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| 177 | * @retval HAL Status
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| 178 | */
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| 179 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
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| 180 | {
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| 181 | HAL_StatusTypeDef status = HAL_ERROR;
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| 182 | uint32_t index = 0;
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| 183 |
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| 184 | /* Process Locked */
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| 185 | __HAL_LOCK(&pFlash);
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| 186 |
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| 187 | /* Check the parameters */
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| 188 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
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| 189 |
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| 190 | /* Wait for last operation to be completed */
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| 191 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
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| 192 |
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| 193 | if(status == HAL_OK)
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| 194 | {
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| 195 | /*Initialization of SectorError variable*/
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| 196 | *SectorError = 0xFFFFFFFF;
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| 197 |
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| 198 | if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
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| 199 | {
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| 200 | /*Mass erase to be done*/
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| 201 | FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
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| 202 |
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| 203 | /* Wait for last operation to be completed */
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| 204 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
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| 205 |
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| 206 | /* if the erase operation is completed, disable the MER Bit */
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| 207 | FLASH->CR &= (~FLASH_MER_BIT);
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| 208 | }
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| 209 | else
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| 210 | {
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| 211 | /* Check the parameters */
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| 212 | assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
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| 213 |
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| 214 | /* Erase by sector by sector to be done*/
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| 215 | for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
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| 216 | {
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| 217 | FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
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| 218 |
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| 219 | /* Wait for last operation to be completed */
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| 220 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
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| 221 |
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| 222 | /* If the erase operation is completed, disable the SER and SNB Bits */
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| 223 | CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
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| 224 |
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| 225 | if(status != HAL_OK)
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| 226 | {
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| 227 | /* In case of error, stop erase procedure and return the faulty sector*/
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| 228 | *SectorError = index;
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| 229 | break;
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| 230 | }
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| 231 | }
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| 232 | }
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| 233 | /* Flush the caches to be sure of the data consistency */
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| 234 | FLASH_FlushCaches();
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| 235 | }
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| 236 |
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| 237 | /* Process Unlocked */
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| 238 | __HAL_UNLOCK(&pFlash);
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| 239 |
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| 240 | return status;
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| 241 | }
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| 242 |
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| 243 | /**
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| 244 | * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
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| 245 | * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
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| 246 | * contains the configuration information for the erasing.
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| 247 | *
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| 248 | * @retval HAL Status
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| 249 | */
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| 250 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
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| 251 | {
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| 252 | HAL_StatusTypeDef status = HAL_OK;
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| 253 |
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| 254 | /* Process Locked */
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| 255 | __HAL_LOCK(&pFlash);
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| 256 |
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| 257 | /* Check the parameters */
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| 258 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
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| 259 |
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| 260 | /* Enable End of FLASH Operation interrupt */
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| 261 | __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
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| 262 |
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| 263 | /* Enable Error source interrupt */
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| 264 | __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
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| 265 |
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| 266 | /* Clear pending flags (if any) */
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| 267 | __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
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| 268 | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
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| 269 |
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| 270 | if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
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| 271 | {
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| 272 | /*Mass erase to be done*/
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| 273 | pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
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| 274 | pFlash.Bank = pEraseInit->Banks;
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| 275 | FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
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| 276 | }
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| 277 | else
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| 278 | {
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| 279 | /* Erase by sector to be done*/
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| 280 |
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| 281 | /* Check the parameters */
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| 282 | assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
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| 283 |
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| 284 | pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
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| 285 | pFlash.NbSectorsToErase = pEraseInit->NbSectors;
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| 286 | pFlash.Sector = pEraseInit->Sector;
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| 287 | pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
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| 288 |
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| 289 | /*Erase 1st sector and wait for IT*/
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| 290 | FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
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| 291 | }
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| 292 |
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| 293 | return status;
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| 294 | }
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| 295 |
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| 296 | /**
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| 297 | * @brief Program option bytes
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| 298 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
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| 299 | * contains the configuration information for the programming.
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| 300 | *
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| 301 | * @retval HAL Status
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| 302 | */
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| 303 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
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| 304 | {
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| 305 | HAL_StatusTypeDef status = HAL_ERROR;
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| 306 |
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| 307 | /* Process Locked */
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| 308 | __HAL_LOCK(&pFlash);
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| 309 |
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| 310 | /* Check the parameters */
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| 311 | assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
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| 312 |
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| 313 | /*Write protection configuration*/
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| 314 | if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
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| 315 | {
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| 316 | assert_param(IS_WRPSTATE(pOBInit->WRPState));
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| 317 | if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
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| 318 | {
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| 319 | /*Enable of Write protection on the selected Sector*/
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| 320 | status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
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| 321 | }
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| 322 | else
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| 323 | {
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| 324 | /*Disable of Write protection on the selected Sector*/
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| 325 | status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
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| 326 | }
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| 327 | }
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| 328 |
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| 329 | /*Read protection configuration*/
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| 330 | if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
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| 331 | {
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| 332 | status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
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| 333 | }
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| 334 |
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| 335 | /*USER configuration*/
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| 336 | if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
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| 337 | {
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| 338 | status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
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| 339 | pOBInit->USERConfig&OB_STOP_NO_RST,
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| 340 | pOBInit->USERConfig&OB_STDBY_NO_RST);
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| 341 | }
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| 342 |
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| 343 | /*BOR Level configuration*/
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| 344 | if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
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| 345 | {
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| 346 | status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
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| 347 | }
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| 348 |
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| 349 | /* Process Unlocked */
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| 350 | __HAL_UNLOCK(&pFlash);
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| 351 |
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| 352 | return status;
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| 353 | }
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| 354 |
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| 355 | /**
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| 356 | * @brief Flush the instruction and data caches
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| 357 | * @retval None
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| 358 | */
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| 359 | void FLASH_FlushCaches(void)
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| 360 | {
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| 361 | /* Flush instruction cache */
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| 362 | if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN))
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| 363 | {
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| 364 | /* Disable instruction cache */
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| 365 | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
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| 366 | /* Reset instruction cache */
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| 367 | __HAL_FLASH_INSTRUCTION_CACHE_RESET();
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| 368 | /* Enable instruction cache */
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| 369 | __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
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| 370 | }
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| 371 |
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| 372 | /* Flush data cache */
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| 373 | if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN))
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| 374 | {
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| 375 | /* Disable data cache */
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| 376 | __HAL_FLASH_DATA_CACHE_DISABLE();
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| 377 | /* Reset data cache */
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| 378 | __HAL_FLASH_DATA_CACHE_RESET();
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| 379 | /* Enable data cache */
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| 380 | __HAL_FLASH_DATA_CACHE_ENABLE();
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| 381 | }
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| 382 | }
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| 383 |
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| 384 | /**
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| 385 | * @brief Get the Option byte configuration
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| 386 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
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| 387 | * contains the configuration information for the programming.
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| 388 | *
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| 389 | * @retval None
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| 390 | */
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| 391 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
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| 392 | {
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| 393 | pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
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| 394 |
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| 395 | /*Get WRP*/
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| 396 | pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
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| 397 |
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| 398 | /*Get RDP Level*/
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| 399 | pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
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| 400 |
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| 401 | /*Get USER*/
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| 402 | pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
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| 403 |
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| 404 | /*Get BOR Level*/
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| 405 | pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
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| 406 | }
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| 407 |
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| 408 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
|
---|
| 409 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
|
---|
| 410 | defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
|
---|
| 411 | defined(STM32F479xx)
|
---|
| 412 | /**
|
---|
| 413 | * @brief Program option bytes
|
---|
| 414 | * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
|
---|
| 415 | * contains the configuration information for the programming.
|
---|
| 416 | *
|
---|
| 417 | * @retval HAL Status
|
---|
| 418 | */
|
---|
| 419 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
|
---|
| 420 | {
|
---|
| 421 | HAL_StatusTypeDef status = HAL_ERROR;
|
---|
| 422 |
|
---|
| 423 | /* Check the parameters */
|
---|
| 424 | assert_param(IS_OBEX(pAdvOBInit->OptionType));
|
---|
| 425 |
|
---|
| 426 | /*Program PCROP option byte*/
|
---|
| 427 | if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
|
---|
| 428 | {
|
---|
| 429 | /* Check the parameters */
|
---|
| 430 | assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
|
---|
| 431 | if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
|
---|
| 432 | {
|
---|
| 433 | /*Enable of Write protection on the selected Sector*/
|
---|
| 434 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
|
---|
| 435 | defined(STM32F411xE) || defined(STM32F446xx)
|
---|
| 436 | status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
|
---|
| 437 | #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
|
---|
| 438 | status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
|
---|
| 439 | #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
|
---|
| 440 | }
|
---|
| 441 | else
|
---|
| 442 | {
|
---|
| 443 | /*Disable of Write protection on the selected Sector*/
|
---|
| 444 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
|
---|
| 445 | defined(STM32F411xE) || defined(STM32F446xx)
|
---|
| 446 | status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
|
---|
| 447 | #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
|
---|
| 448 | status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
|
---|
| 449 | #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
|
---|
| 450 | }
|
---|
| 451 | }
|
---|
| 452 |
|
---|
| 453 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
|
---|
| 454 | /*Program BOOT config option byte*/
|
---|
| 455 | if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
|
---|
| 456 | {
|
---|
| 457 | status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
|
---|
| 458 | }
|
---|
| 459 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
|
---|
| 460 |
|
---|
| 461 | return status;
|
---|
| 462 | }
|
---|
| 463 |
|
---|
| 464 | /**
|
---|
| 465 | * @brief Get the OBEX byte configuration
|
---|
| 466 | * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
|
---|
| 467 | * contains the configuration information for the programming.
|
---|
| 468 | *
|
---|
| 469 | * @retval None
|
---|
| 470 | */
|
---|
| 471 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
|
---|
| 472 | {
|
---|
| 473 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
|
---|
| 474 | defined(STM32F411xE) || defined(STM32F446xx)
|
---|
| 475 | /*Get Sector*/
|
---|
| 476 | pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
---|
| 477 | #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
|
---|
| 478 | /*Get Sector for Bank1*/
|
---|
| 479 | pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
---|
| 480 |
|
---|
| 481 | /*Get Sector for Bank2*/
|
---|
| 482 | pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
|
---|
| 483 |
|
---|
| 484 | /*Get Boot config OB*/
|
---|
| 485 | pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
|
---|
| 486 | #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
|
---|
| 487 | }
|
---|
| 488 |
|
---|
| 489 | /**
|
---|
| 490 | * @brief Select the Protection Mode
|
---|
| 491 | *
|
---|
| 492 | * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
|
---|
| 493 | * Global Read Out Protection modification (from level1 to level0)
|
---|
| 494 | * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
|
---|
| 495 | * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
|
---|
| 496 | * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
|
---|
| 497 | * STM32F469xx/STM32F479xx devices.
|
---|
| 498 | *
|
---|
| 499 | * @retval HAL Status
|
---|
| 500 | */
|
---|
| 501 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
|
---|
| 502 | {
|
---|
| 503 | uint8_t optiontmp = 0xFF;
|
---|
| 504 |
|
---|
| 505 | /* Mask SPRMOD bit */
|
---|
| 506 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
|
---|
| 507 |
|
---|
| 508 | /* Update Option Byte */
|
---|
| 509 | *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
|
---|
| 510 |
|
---|
| 511 | return HAL_OK;
|
---|
| 512 | }
|
---|
| 513 |
|
---|
| 514 | /**
|
---|
| 515 | * @brief Deselect the Protection Mode
|
---|
| 516 | *
|
---|
| 517 | * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
|
---|
| 518 | * Global Read Out Protection modification (from level1 to level0)
|
---|
| 519 | * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
|
---|
| 520 | * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
|
---|
| 521 | * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
|
---|
| 522 | * STM32F469xx/STM32F479xx devices.
|
---|
| 523 | *
|
---|
| 524 | * @retval HAL Status
|
---|
| 525 | */
|
---|
| 526 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
|
---|
| 527 | {
|
---|
| 528 | uint8_t optiontmp = 0xFF;
|
---|
| 529 |
|
---|
| 530 | /* Mask SPRMOD bit */
|
---|
| 531 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
|
---|
| 532 |
|
---|
| 533 | /* Update Option Byte */
|
---|
| 534 | *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
|
---|
| 535 |
|
---|
| 536 | return HAL_OK;
|
---|
| 537 | }
|
---|
| 538 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
|
---|
| 539 | STM32F411xE || STM32F469xx || STM32F479xx */
|
---|
| 540 |
|
---|
| 541 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
|
---|
| 542 | /**
|
---|
| 543 | * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
|
---|
| 544 | * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
|
---|
| 545 | * @retval The FLASH Write Protection Option Bytes value
|
---|
| 546 | */
|
---|
| 547 | uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
|
---|
| 548 | {
|
---|
| 549 | /* Return the FLASH write protection Register value */
|
---|
| 550 | return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
|
---|
| 551 | }
|
---|
| 552 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
|
---|
| 553 |
|
---|
| 554 | /**
|
---|
| 555 | * @}
|
---|
| 556 | */
|
---|
| 557 |
|
---|
| 558 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
|
---|
| 559 | /**
|
---|
| 560 | * @brief Full erase of FLASH memory sectors
|
---|
| 561 | * @param VoltageRange: The device voltage range which defines the erase parallelism.
|
---|
| 562 | * This parameter can be one of the following values:
|
---|
| 563 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
---|
| 564 | * the operation will be done by byte (8-bit)
|
---|
| 565 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
---|
| 566 | * the operation will be done by half word (16-bit)
|
---|
| 567 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
---|
| 568 | * the operation will be done by word (32-bit)
|
---|
| 569 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
---|
| 570 | * the operation will be done by double word (64-bit)
|
---|
| 571 | *
|
---|
| 572 | * @param Banks: Banks to be erased
|
---|
| 573 | * This parameter can be one of the following values:
|
---|
| 574 | * @arg FLASH_BANK_1: Bank1 to be erased
|
---|
| 575 | * @arg FLASH_BANK_2: Bank2 to be erased
|
---|
| 576 | * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
|
---|
| 577 | *
|
---|
| 578 | * @retval HAL Status
|
---|
| 579 | */
|
---|
| 580 | static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
|
---|
| 581 | {
|
---|
| 582 | uint32_t tmp_psize = 0;
|
---|
| 583 |
|
---|
| 584 | /* Check the parameters */
|
---|
| 585 | assert_param(IS_VOLTAGERANGE(VoltageRange));
|
---|
| 586 | assert_param(IS_FLASH_BANK(Banks));
|
---|
| 587 |
|
---|
| 588 | /* if the previous operation is completed, proceed to erase all sectors */
|
---|
| 589 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
|
---|
| 590 | FLASH->CR |= tmp_psize;
|
---|
| 591 | if(Banks == FLASH_BANK_BOTH)
|
---|
| 592 | {
|
---|
| 593 | /* bank1 & bank2 will be erased*/
|
---|
| 594 | FLASH->CR |= FLASH_MER_BIT;
|
---|
| 595 | }
|
---|
| 596 | else if(Banks == FLASH_BANK_1)
|
---|
| 597 | {
|
---|
| 598 | /*Only bank1 will be erased*/
|
---|
| 599 | FLASH->CR |= FLASH_CR_MER1;
|
---|
| 600 | }
|
---|
| 601 | else
|
---|
| 602 | {
|
---|
| 603 | /*Only bank2 will be erased*/
|
---|
| 604 | FLASH->CR |= FLASH_CR_MER2;
|
---|
| 605 | }
|
---|
| 606 | FLASH->CR |= FLASH_CR_STRT;
|
---|
| 607 | }
|
---|
| 608 |
|
---|
| 609 | /**
|
---|
| 610 | * @brief Erase the specified FLASH memory sector
|
---|
| 611 | * @param Sector: FLASH sector to erase
|
---|
| 612 | * The value of this parameter depend on device used within the same series
|
---|
| 613 | * @param VoltageRange: The device voltage range which defines the erase parallelism.
|
---|
| 614 | * This parameter can be one of the following values:
|
---|
| 615 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
---|
| 616 | * the operation will be done by byte (8-bit)
|
---|
| 617 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
---|
| 618 | * the operation will be done by half word (16-bit)
|
---|
| 619 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
---|
| 620 | * the operation will be done by word (32-bit)
|
---|
| 621 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
---|
| 622 | * the operation will be done by double word (64-bit)
|
---|
| 623 | *
|
---|
| 624 | * @retval None
|
---|
| 625 | */
|
---|
| 626 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
|
---|
| 627 | {
|
---|
| 628 | uint32_t tmp_psize = 0;
|
---|
| 629 |
|
---|
| 630 | /* Check the parameters */
|
---|
| 631 | assert_param(IS_FLASH_SECTOR(Sector));
|
---|
| 632 | assert_param(IS_VOLTAGERANGE(VoltageRange));
|
---|
| 633 |
|
---|
| 634 | if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
|
---|
| 635 | {
|
---|
| 636 | tmp_psize = FLASH_PSIZE_BYTE;
|
---|
| 637 | }
|
---|
| 638 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
|
---|
| 639 | {
|
---|
| 640 | tmp_psize = FLASH_PSIZE_HALF_WORD;
|
---|
| 641 | }
|
---|
| 642 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
|
---|
| 643 | {
|
---|
| 644 | tmp_psize = FLASH_PSIZE_WORD;
|
---|
| 645 | }
|
---|
| 646 | else
|
---|
| 647 | {
|
---|
| 648 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
|
---|
| 649 | }
|
---|
| 650 |
|
---|
| 651 | /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
|
---|
| 652 | if(Sector > FLASH_SECTOR_11)
|
---|
| 653 | {
|
---|
| 654 | Sector += 4;
|
---|
| 655 | }
|
---|
| 656 | /* If the previous operation is completed, proceed to erase the sector */
|
---|
| 657 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
|
---|
| 658 | FLASH->CR |= tmp_psize;
|
---|
| 659 | CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
|
---|
| 660 | FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
|
---|
| 661 | FLASH->CR |= FLASH_CR_STRT;
|
---|
| 662 | }
|
---|
| 663 |
|
---|
| 664 | /**
|
---|
| 665 | * @brief Enable the write protection of the desired bank1 or bank 2 sectors
|
---|
| 666 | *
|
---|
| 667 | * @note When the memory read protection level is selected (RDP level = 1),
|
---|
| 668 | * it is not possible to program or erase the flash sector i if CortexM4
|
---|
| 669 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
---|
| 670 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
---|
| 671 | *
|
---|
| 672 | * @param WRPSector: specifies the sector(s) to be write protected.
|
---|
| 673 | * This parameter can be one of the following values:
|
---|
| 674 | * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
|
---|
| 675 | * @arg OB_WRP_SECTOR_All
|
---|
| 676 | * @note BANK2 starts from OB_WRP_SECTOR_12
|
---|
| 677 | *
|
---|
| 678 | * @param Banks: Enable write protection on all the sectors for the specific bank
|
---|
| 679 | * This parameter can be one of the following values:
|
---|
| 680 | * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
---|
| 681 | * @arg FLASH_BANK_2: WRP on all sectors of bank2
|
---|
| 682 | * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
---|
| 683 | *
|
---|
| 684 | * @retval HAL FLASH State
|
---|
| 685 | */
|
---|
| 686 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
|
---|
| 687 | {
|
---|
| 688 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 689 |
|
---|
| 690 | /* Check the parameters */
|
---|
| 691 | assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
---|
| 692 | assert_param(IS_FLASH_BANK(Banks));
|
---|
| 693 |
|
---|
| 694 | /* Wait for last operation to be completed */
|
---|
| 695 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 696 |
|
---|
| 697 | if(status == HAL_OK)
|
---|
| 698 | {
|
---|
| 699 | if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
|
---|
| 700 | (WRPSector < OB_WRP_SECTOR_12))
|
---|
| 701 | {
|
---|
| 702 | if(WRPSector == OB_WRP_SECTOR_All)
|
---|
| 703 | {
|
---|
| 704 | /*Write protection on all sector of BANK1*/
|
---|
| 705 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
---|
| 706 | }
|
---|
| 707 | else
|
---|
| 708 | {
|
---|
| 709 | /*Write protection done on sectors of BANK1*/
|
---|
| 710 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
|
---|
| 711 | }
|
---|
| 712 | }
|
---|
| 713 | else
|
---|
| 714 | {
|
---|
| 715 | /*Write protection done on sectors of BANK2*/
|
---|
| 716 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
---|
| 717 | }
|
---|
| 718 |
|
---|
| 719 | /*Write protection on all sector of BANK2*/
|
---|
| 720 | if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
|
---|
| 721 | {
|
---|
| 722 | /* Wait for last operation to be completed */
|
---|
| 723 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 724 |
|
---|
| 725 | if(status == HAL_OK)
|
---|
| 726 | {
|
---|
| 727 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
---|
| 728 | }
|
---|
| 729 | }
|
---|
| 730 |
|
---|
| 731 | }
|
---|
| 732 | return status;
|
---|
| 733 | }
|
---|
| 734 |
|
---|
| 735 | /**
|
---|
| 736 | * @brief Disable the write protection of the desired bank1 or bank 2 sectors
|
---|
| 737 | *
|
---|
| 738 | * @note When the memory read protection level is selected (RDP level = 1),
|
---|
| 739 | * it is not possible to program or erase the flash sector i if CortexM4
|
---|
| 740 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
---|
| 741 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
---|
| 742 | *
|
---|
| 743 | * @param WRPSector: specifies the sector(s) to be write protected.
|
---|
| 744 | * This parameter can be one of the following values:
|
---|
| 745 | * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
|
---|
| 746 | * @arg OB_WRP_Sector_All
|
---|
| 747 | * @note BANK2 starts from OB_WRP_SECTOR_12
|
---|
| 748 | *
|
---|
| 749 | * @param Banks: Disable write protection on all the sectors for the specific bank
|
---|
| 750 | * This parameter can be one of the following values:
|
---|
| 751 | * @arg FLASH_BANK_1: Bank1 to be erased
|
---|
| 752 | * @arg FLASH_BANK_2: Bank2 to be erased
|
---|
| 753 | * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
|
---|
| 754 | *
|
---|
| 755 | * @retval HAL Status
|
---|
| 756 | */
|
---|
| 757 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
|
---|
| 758 | {
|
---|
| 759 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 760 |
|
---|
| 761 | /* Check the parameters */
|
---|
| 762 | assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
---|
| 763 | assert_param(IS_FLASH_BANK(Banks));
|
---|
| 764 |
|
---|
| 765 | /* Wait for last operation to be completed */
|
---|
| 766 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 767 |
|
---|
| 768 | if(status == HAL_OK)
|
---|
| 769 | {
|
---|
| 770 | if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
|
---|
| 771 | (WRPSector < OB_WRP_SECTOR_12))
|
---|
| 772 | {
|
---|
| 773 | if(WRPSector == OB_WRP_SECTOR_All)
|
---|
| 774 | {
|
---|
| 775 | /*Write protection on all sector of BANK1*/
|
---|
| 776 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
---|
| 777 | }
|
---|
| 778 | else
|
---|
| 779 | {
|
---|
| 780 | /*Write protection done on sectors of BANK1*/
|
---|
| 781 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
|
---|
| 782 | }
|
---|
| 783 | }
|
---|
| 784 | else
|
---|
| 785 | {
|
---|
| 786 | /*Write protection done on sectors of BANK2*/
|
---|
| 787 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
---|
| 788 | }
|
---|
| 789 |
|
---|
| 790 | /*Write protection on all sector of BANK2*/
|
---|
| 791 | if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
|
---|
| 792 | {
|
---|
| 793 | /* Wait for last operation to be completed */
|
---|
| 794 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 795 |
|
---|
| 796 | if(status == HAL_OK)
|
---|
| 797 | {
|
---|
| 798 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
---|
| 799 | }
|
---|
| 800 | }
|
---|
| 801 |
|
---|
| 802 | }
|
---|
| 803 |
|
---|
| 804 | return status;
|
---|
| 805 | }
|
---|
| 806 |
|
---|
| 807 | /**
|
---|
| 808 | * @brief Configure the Dual Bank Boot.
|
---|
| 809 | *
|
---|
| 810 | * @note This function can be used only for STM32F42xxx/43xxx devices.
|
---|
| 811 | *
|
---|
| 812 | * @param BootConfig specifies the Dual Bank Boot Option byte.
|
---|
| 813 | * This parameter can be one of the following values:
|
---|
| 814 | * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
|
---|
| 815 | * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
|
---|
| 816 | * @retval None
|
---|
| 817 | */
|
---|
| 818 | static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
|
---|
| 819 | {
|
---|
| 820 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 821 |
|
---|
| 822 | /* Check the parameters */
|
---|
| 823 | assert_param(IS_OB_BOOT(BootConfig));
|
---|
| 824 |
|
---|
| 825 | /* Wait for last operation to be completed */
|
---|
| 826 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 827 |
|
---|
| 828 | if(status == HAL_OK)
|
---|
| 829 | {
|
---|
| 830 | /* Set Dual Bank Boot */
|
---|
| 831 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
|
---|
| 832 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
|
---|
| 833 | }
|
---|
| 834 |
|
---|
| 835 | return status;
|
---|
| 836 | }
|
---|
| 837 |
|
---|
| 838 | /**
|
---|
| 839 | * @brief Enable the read/write protection (PCROP) of the desired
|
---|
| 840 | * sectors of Bank 1 and/or Bank 2.
|
---|
| 841 | * @note This function can be used only for STM32F42xxx/43xxx devices.
|
---|
| 842 | * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
|
---|
| 843 | * This parameter can be one of the following values:
|
---|
| 844 | * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
|
---|
| 845 | * @arg OB_PCROP_SECTOR__All
|
---|
| 846 | * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
|
---|
| 847 | * This parameter can be one of the following values:
|
---|
| 848 | * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
|
---|
| 849 | * @arg OB_PCROP_SECTOR__All
|
---|
| 850 | * @param Banks Enable PCROP protection on all the sectors for the specific bank
|
---|
| 851 | * This parameter can be one of the following values:
|
---|
| 852 | * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
---|
| 853 | * @arg FLASH_BANK_2: WRP on all sectors of bank2
|
---|
| 854 | * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
---|
| 855 | *
|
---|
| 856 | * @retval HAL Status
|
---|
| 857 | */
|
---|
| 858 | static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
|
---|
| 859 | {
|
---|
| 860 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 861 |
|
---|
| 862 | assert_param(IS_FLASH_BANK(Banks));
|
---|
| 863 |
|
---|
| 864 | /* Wait for last operation to be completed */
|
---|
| 865 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 866 |
|
---|
| 867 | if(status == HAL_OK)
|
---|
| 868 | {
|
---|
| 869 | if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
|
---|
| 870 | {
|
---|
| 871 | assert_param(IS_OB_PCROP(SectorBank1));
|
---|
| 872 | /*Write protection done on sectors of BANK1*/
|
---|
| 873 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
|
---|
| 874 | }
|
---|
| 875 | else
|
---|
| 876 | {
|
---|
| 877 | assert_param(IS_OB_PCROP(SectorBank2));
|
---|
| 878 | /*Write protection done on sectors of BANK2*/
|
---|
| 879 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
|
---|
| 880 | }
|
---|
| 881 |
|
---|
| 882 | /*Write protection on all sector of BANK2*/
|
---|
| 883 | if(Banks == FLASH_BANK_BOTH)
|
---|
| 884 | {
|
---|
| 885 | assert_param(IS_OB_PCROP(SectorBank2));
|
---|
| 886 | /* Wait for last operation to be completed */
|
---|
| 887 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 888 |
|
---|
| 889 | if(status == HAL_OK)
|
---|
| 890 | {
|
---|
| 891 | /*Write protection done on sectors of BANK2*/
|
---|
| 892 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
|
---|
| 893 | }
|
---|
| 894 | }
|
---|
| 895 |
|
---|
| 896 | }
|
---|
| 897 |
|
---|
| 898 | return status;
|
---|
| 899 | }
|
---|
| 900 |
|
---|
| 901 |
|
---|
| 902 | /**
|
---|
| 903 | * @brief Disable the read/write protection (PCROP) of the desired
|
---|
| 904 | * sectors of Bank 1 and/or Bank 2.
|
---|
| 905 | * @note This function can be used only for STM32F42xxx/43xxx devices.
|
---|
| 906 | * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
|
---|
| 907 | * This parameter can be one of the following values:
|
---|
| 908 | * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
|
---|
| 909 | * @arg OB_PCROP_SECTOR__All
|
---|
| 910 | * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
|
---|
| 911 | * This parameter can be one of the following values:
|
---|
| 912 | * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
|
---|
| 913 | * @arg OB_PCROP_SECTOR__All
|
---|
| 914 | * @param Banks Disable PCROP protection on all the sectors for the specific bank
|
---|
| 915 | * This parameter can be one of the following values:
|
---|
| 916 | * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
---|
| 917 | * @arg FLASH_BANK_2: WRP on all sectors of bank2
|
---|
| 918 | * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
---|
| 919 | *
|
---|
| 920 | * @retval HAL Status
|
---|
| 921 | */
|
---|
| 922 | static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
|
---|
| 923 | {
|
---|
| 924 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 925 |
|
---|
| 926 | /* Check the parameters */
|
---|
| 927 | assert_param(IS_FLASH_BANK(Banks));
|
---|
| 928 |
|
---|
| 929 | /* Wait for last operation to be completed */
|
---|
| 930 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 931 |
|
---|
| 932 | if(status == HAL_OK)
|
---|
| 933 | {
|
---|
| 934 | if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
|
---|
| 935 | {
|
---|
| 936 | assert_param(IS_OB_PCROP(SectorBank1));
|
---|
| 937 | /*Write protection done on sectors of BANK1*/
|
---|
| 938 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
|
---|
| 939 | }
|
---|
| 940 | else
|
---|
| 941 | {
|
---|
| 942 | /*Write protection done on sectors of BANK2*/
|
---|
| 943 | assert_param(IS_OB_PCROP(SectorBank2));
|
---|
| 944 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
|
---|
| 945 | }
|
---|
| 946 |
|
---|
| 947 | /*Write protection on all sector of BANK2*/
|
---|
| 948 | if(Banks == FLASH_BANK_BOTH)
|
---|
| 949 | {
|
---|
| 950 | assert_param(IS_OB_PCROP(SectorBank2));
|
---|
| 951 | /* Wait for last operation to be completed */
|
---|
| 952 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 953 |
|
---|
| 954 | if(status == HAL_OK)
|
---|
| 955 | {
|
---|
| 956 | /*Write protection done on sectors of BANK2*/
|
---|
| 957 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
|
---|
| 958 | }
|
---|
| 959 | }
|
---|
| 960 |
|
---|
| 961 | }
|
---|
| 962 |
|
---|
| 963 | return status;
|
---|
| 964 |
|
---|
| 965 | }
|
---|
| 966 |
|
---|
| 967 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
|
---|
| 968 |
|
---|
| 969 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
|
---|
| 970 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
|
---|
| 971 | defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
|
---|
| 972 | /**
|
---|
| 973 | * @brief Mass erase of FLASH memory
|
---|
| 974 | * @param VoltageRange: The device voltage range which defines the erase parallelism.
|
---|
| 975 | * This parameter can be one of the following values:
|
---|
| 976 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
---|
| 977 | * the operation will be done by byte (8-bit)
|
---|
| 978 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
---|
| 979 | * the operation will be done by half word (16-bit)
|
---|
| 980 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
---|
| 981 | * the operation will be done by word (32-bit)
|
---|
| 982 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
---|
| 983 | * the operation will be done by double word (64-bit)
|
---|
| 984 | *
|
---|
| 985 | * @param Banks: Banks to be erased
|
---|
| 986 | * This parameter can be one of the following values:
|
---|
| 987 | * @arg FLASH_BANK_1: Bank1 to be erased
|
---|
| 988 | *
|
---|
| 989 | * @retval None
|
---|
| 990 | */
|
---|
| 991 | static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
|
---|
| 992 | {
|
---|
| 993 | uint32_t tmp_psize = 0;
|
---|
| 994 |
|
---|
| 995 | /* Check the parameters */
|
---|
| 996 | assert_param(IS_VOLTAGERANGE(VoltageRange));
|
---|
| 997 | assert_param(IS_FLASH_BANK(Banks));
|
---|
| 998 |
|
---|
| 999 | /* If the previous operation is completed, proceed to erase all sectors */
|
---|
| 1000 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
|
---|
| 1001 | FLASH->CR |= tmp_psize;
|
---|
| 1002 | FLASH->CR |= FLASH_CR_MER;
|
---|
| 1003 | FLASH->CR |= FLASH_CR_STRT;
|
---|
| 1004 | }
|
---|
| 1005 |
|
---|
| 1006 | /**
|
---|
| 1007 | * @brief Erase the specified FLASH memory sector
|
---|
| 1008 | * @param Sector: FLASH sector to erase
|
---|
| 1009 | * The value of this parameter depend on device used within the same series
|
---|
| 1010 | * @param VoltageRange: The device voltage range which defines the erase parallelism.
|
---|
| 1011 | * This parameter can be one of the following values:
|
---|
| 1012 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
---|
| 1013 | * the operation will be done by byte (8-bit)
|
---|
| 1014 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
---|
| 1015 | * the operation will be done by half word (16-bit)
|
---|
| 1016 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
---|
| 1017 | * the operation will be done by word (32-bit)
|
---|
| 1018 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
---|
| 1019 | * the operation will be done by double word (64-bit)
|
---|
| 1020 | *
|
---|
| 1021 | * @retval None
|
---|
| 1022 | */
|
---|
| 1023 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
|
---|
| 1024 | {
|
---|
| 1025 | uint32_t tmp_psize = 0;
|
---|
| 1026 |
|
---|
| 1027 | /* Check the parameters */
|
---|
| 1028 | assert_param(IS_FLASH_SECTOR(Sector));
|
---|
| 1029 | assert_param(IS_VOLTAGERANGE(VoltageRange));
|
---|
| 1030 |
|
---|
| 1031 | if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
|
---|
| 1032 | {
|
---|
| 1033 | tmp_psize = FLASH_PSIZE_BYTE;
|
---|
| 1034 | }
|
---|
| 1035 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
|
---|
| 1036 | {
|
---|
| 1037 | tmp_psize = FLASH_PSIZE_HALF_WORD;
|
---|
| 1038 | }
|
---|
| 1039 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
|
---|
| 1040 | {
|
---|
| 1041 | tmp_psize = FLASH_PSIZE_WORD;
|
---|
| 1042 | }
|
---|
| 1043 | else
|
---|
| 1044 | {
|
---|
| 1045 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
|
---|
| 1046 | }
|
---|
| 1047 |
|
---|
| 1048 | /* If the previous operation is completed, proceed to erase the sector */
|
---|
| 1049 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
|
---|
| 1050 | FLASH->CR |= tmp_psize;
|
---|
| 1051 | CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
|
---|
| 1052 | FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
|
---|
| 1053 | FLASH->CR |= FLASH_CR_STRT;
|
---|
| 1054 | }
|
---|
| 1055 |
|
---|
| 1056 | /**
|
---|
| 1057 | * @brief Enable the write protection of the desired bank 1 sectors
|
---|
| 1058 | *
|
---|
| 1059 | * @note When the memory read protection level is selected (RDP level = 1),
|
---|
| 1060 | * it is not possible to program or erase the flash sector i if CortexM4
|
---|
| 1061 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
---|
| 1062 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
---|
| 1063 | *
|
---|
| 1064 | * @param WRPSector: specifies the sector(s) to be write protected.
|
---|
| 1065 | * The value of this parameter depend on device used within the same series
|
---|
| 1066 | *
|
---|
| 1067 | * @param Banks: Enable write protection on all the sectors for the specific bank
|
---|
| 1068 | * This parameter can be one of the following values:
|
---|
| 1069 | * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
---|
| 1070 | *
|
---|
| 1071 | * @retval HAL Status
|
---|
| 1072 | */
|
---|
| 1073 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
|
---|
| 1074 | {
|
---|
| 1075 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 1076 |
|
---|
| 1077 | /* Check the parameters */
|
---|
| 1078 | assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
---|
| 1079 | assert_param(IS_FLASH_BANK(Banks));
|
---|
| 1080 |
|
---|
| 1081 | /* Wait for last operation to be completed */
|
---|
| 1082 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 1083 |
|
---|
| 1084 | if(status == HAL_OK)
|
---|
| 1085 | {
|
---|
| 1086 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
|
---|
| 1087 | }
|
---|
| 1088 |
|
---|
| 1089 | return status;
|
---|
| 1090 | }
|
---|
| 1091 |
|
---|
| 1092 | /**
|
---|
| 1093 | * @brief Disable the write protection of the desired bank 1 sectors
|
---|
| 1094 | *
|
---|
| 1095 | * @note When the memory read protection level is selected (RDP level = 1),
|
---|
| 1096 | * it is not possible to program or erase the flash sector i if CortexM4
|
---|
| 1097 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
---|
| 1098 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
---|
| 1099 | *
|
---|
| 1100 | * @param WRPSector: specifies the sector(s) to be write protected.
|
---|
| 1101 | * The value of this parameter depend on device used within the same series
|
---|
| 1102 | *
|
---|
| 1103 | * @param Banks: Enable write protection on all the sectors for the specific bank
|
---|
| 1104 | * This parameter can be one of the following values:
|
---|
| 1105 | * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
---|
| 1106 | *
|
---|
| 1107 | * @retval HAL Status
|
---|
| 1108 | */
|
---|
| 1109 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
|
---|
| 1110 | {
|
---|
| 1111 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 1112 |
|
---|
| 1113 | /* Check the parameters */
|
---|
| 1114 | assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
---|
| 1115 | assert_param(IS_FLASH_BANK(Banks));
|
---|
| 1116 |
|
---|
| 1117 | /* Wait for last operation to be completed */
|
---|
| 1118 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 1119 |
|
---|
| 1120 | if(status == HAL_OK)
|
---|
| 1121 | {
|
---|
| 1122 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
|
---|
| 1123 | }
|
---|
| 1124 |
|
---|
| 1125 | return status;
|
---|
| 1126 | }
|
---|
| 1127 | #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx */
|
---|
| 1128 |
|
---|
| 1129 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
|
---|
| 1130 | defined(STM32F411xE) || defined(STM32F446xx)
|
---|
| 1131 | /**
|
---|
| 1132 | * @brief Enable the read/write protection (PCROP) of the desired sectors.
|
---|
| 1133 | * @note This function can be used only for STM32F401xx devices.
|
---|
| 1134 | * @param Sector specifies the sector(s) to be read/write protected or unprotected.
|
---|
| 1135 | * This parameter can be one of the following values:
|
---|
| 1136 | * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
|
---|
| 1137 | * @arg OB_PCROP_Sector_All
|
---|
| 1138 | * @retval HAL Status
|
---|
| 1139 | */
|
---|
| 1140 | static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
|
---|
| 1141 | {
|
---|
| 1142 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 1143 |
|
---|
| 1144 | /* Check the parameters */
|
---|
| 1145 | assert_param(IS_OB_PCROP(Sector));
|
---|
| 1146 |
|
---|
| 1147 | /* Wait for last operation to be completed */
|
---|
| 1148 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 1149 |
|
---|
| 1150 | if(status == HAL_OK)
|
---|
| 1151 | {
|
---|
| 1152 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
|
---|
| 1153 | }
|
---|
| 1154 |
|
---|
| 1155 | return status;
|
---|
| 1156 | }
|
---|
| 1157 |
|
---|
| 1158 |
|
---|
| 1159 | /**
|
---|
| 1160 | * @brief Disable the read/write protection (PCROP) of the desired sectors.
|
---|
| 1161 | * @note This function can be used only for STM32F401xx devices.
|
---|
| 1162 | * @param Sector specifies the sector(s) to be read/write protected or unprotected.
|
---|
| 1163 | * This parameter can be one of the following values:
|
---|
| 1164 | * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
|
---|
| 1165 | * @arg OB_PCROP_Sector_All
|
---|
| 1166 | * @retval HAL Status
|
---|
| 1167 | */
|
---|
| 1168 | static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
|
---|
| 1169 | {
|
---|
| 1170 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 1171 |
|
---|
| 1172 | /* Check the parameters */
|
---|
| 1173 | assert_param(IS_OB_PCROP(Sector));
|
---|
| 1174 |
|
---|
| 1175 | /* Wait for last operation to be completed */
|
---|
| 1176 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 1177 |
|
---|
| 1178 | if(status == HAL_OK)
|
---|
| 1179 | {
|
---|
| 1180 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
|
---|
| 1181 | }
|
---|
| 1182 |
|
---|
| 1183 | return status;
|
---|
| 1184 |
|
---|
| 1185 | }
|
---|
| 1186 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
|
---|
| 1187 |
|
---|
| 1188 | /**
|
---|
| 1189 | * @brief Set the read protection level.
|
---|
| 1190 | * @param Level: specifies the read protection level.
|
---|
| 1191 | * This parameter can be one of the following values:
|
---|
| 1192 | * @arg OB_RDP_LEVEL_0: No protection
|
---|
| 1193 | * @arg OB_RDP_LEVEL_1: Read protection of the memory
|
---|
| 1194 | * @arg OB_RDP_LEVEL_2: Full chip protection
|
---|
| 1195 | *
|
---|
| 1196 | * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
|
---|
| 1197 | *
|
---|
| 1198 | * @retval HAL Status
|
---|
| 1199 | */
|
---|
| 1200 | static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
|
---|
| 1201 | {
|
---|
| 1202 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 1203 |
|
---|
| 1204 | /* Check the parameters */
|
---|
| 1205 | assert_param(IS_OB_RDP_LEVEL(Level));
|
---|
| 1206 |
|
---|
| 1207 | /* Wait for last operation to be completed */
|
---|
| 1208 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 1209 |
|
---|
| 1210 | if(status == HAL_OK)
|
---|
| 1211 | {
|
---|
| 1212 | *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
|
---|
| 1213 | }
|
---|
| 1214 |
|
---|
| 1215 | return status;
|
---|
| 1216 | }
|
---|
| 1217 |
|
---|
| 1218 | /**
|
---|
| 1219 | * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
|
---|
| 1220 | * @param Iwdg: Selects the IWDG mode
|
---|
| 1221 | * This parameter can be one of the following values:
|
---|
| 1222 | * @arg OB_IWDG_SW: Software IWDG selected
|
---|
| 1223 | * @arg OB_IWDG_HW: Hardware IWDG selected
|
---|
| 1224 | * @param Stop: Reset event when entering STOP mode.
|
---|
| 1225 | * This parameter can be one of the following values:
|
---|
| 1226 | * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
|
---|
| 1227 | * @arg OB_STOP_RST: Reset generated when entering in STOP
|
---|
| 1228 | * @param Stdby: Reset event when entering Standby mode.
|
---|
| 1229 | * This parameter can be one of the following values:
|
---|
| 1230 | * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
|
---|
| 1231 | * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
|
---|
| 1232 | * @retval HAL Status
|
---|
| 1233 | */
|
---|
| 1234 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
|
---|
| 1235 | {
|
---|
| 1236 | uint8_t optiontmp = 0xFF;
|
---|
| 1237 | HAL_StatusTypeDef status = HAL_OK;
|
---|
| 1238 |
|
---|
| 1239 | /* Check the parameters */
|
---|
| 1240 | assert_param(IS_OB_IWDG_SOURCE(Iwdg));
|
---|
| 1241 | assert_param(IS_OB_STOP_SOURCE(Stop));
|
---|
| 1242 | assert_param(IS_OB_STDBY_SOURCE(Stdby));
|
---|
| 1243 |
|
---|
| 1244 | /* Wait for last operation to be completed */
|
---|
| 1245 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
---|
| 1246 |
|
---|
| 1247 | if(status == HAL_OK)
|
---|
| 1248 | {
|
---|
| 1249 | /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
|
---|
| 1250 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
|
---|
| 1251 |
|
---|
| 1252 | /* Update User Option Byte */
|
---|
| 1253 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
|
---|
| 1254 | }
|
---|
| 1255 |
|
---|
| 1256 | return status;
|
---|
| 1257 | }
|
---|
| 1258 |
|
---|
| 1259 | /**
|
---|
| 1260 | * @brief Set the BOR Level.
|
---|
| 1261 | * @param Level: specifies the Option Bytes BOR Reset Level.
|
---|
| 1262 | * This parameter can be one of the following values:
|
---|
| 1263 | * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
|
---|
| 1264 | * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
|
---|
| 1265 | * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
|
---|
| 1266 | * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
|
---|
| 1267 | * @retval HAL Status
|
---|
| 1268 | */
|
---|
| 1269 | static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
|
---|
| 1270 | {
|
---|
| 1271 | /* Check the parameters */
|
---|
| 1272 | assert_param(IS_OB_BOR_LEVEL(Level));
|
---|
| 1273 |
|
---|
| 1274 | /* Set the BOR Level */
|
---|
| 1275 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
|
---|
| 1276 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
|
---|
| 1277 |
|
---|
| 1278 | return HAL_OK;
|
---|
| 1279 |
|
---|
| 1280 | }
|
---|
| 1281 |
|
---|
| 1282 | /**
|
---|
| 1283 | * @brief Return the FLASH User Option Byte value.
|
---|
| 1284 | * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
|
---|
| 1285 | * and RST_STDBY(Bit2).
|
---|
| 1286 | */
|
---|
| 1287 | static uint8_t FLASH_OB_GetUser(void)
|
---|
| 1288 | {
|
---|
| 1289 | /* Return the User Option Byte */
|
---|
| 1290 | return ((uint8_t)(FLASH->OPTCR & 0xE0));
|
---|
| 1291 | }
|
---|
| 1292 |
|
---|
| 1293 | /**
|
---|
| 1294 | * @brief Return the FLASH Write Protection Option Bytes value.
|
---|
| 1295 | * @retval uint16_t FLASH Write Protection Option Bytes value
|
---|
| 1296 | */
|
---|
| 1297 | static uint16_t FLASH_OB_GetWRP(void)
|
---|
| 1298 | {
|
---|
| 1299 | /* Return the FLASH write protection Register value */
|
---|
| 1300 | return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
---|
| 1301 | }
|
---|
| 1302 |
|
---|
| 1303 | /**
|
---|
| 1304 | * @brief Returns the FLASH Read Protection level.
|
---|
| 1305 | * @retval FLASH ReadOut Protection Status:
|
---|
| 1306 | * This parameter can be one of the following values:
|
---|
| 1307 | * @arg OB_RDP_LEVEL_0: No protection
|
---|
| 1308 | * @arg OB_RDP_LEVEL_1: Read protection of the memory
|
---|
| 1309 | * @arg OB_RDP_LEVEL_2: Full chip protection
|
---|
| 1310 | */
|
---|
| 1311 | static uint8_t FLASH_OB_GetRDP(void)
|
---|
| 1312 | {
|
---|
| 1313 | uint8_t readstatus = OB_RDP_LEVEL_0;
|
---|
| 1314 |
|
---|
| 1315 | if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
|
---|
| 1316 | {
|
---|
| 1317 | readstatus = OB_RDP_LEVEL_2;
|
---|
| 1318 | }
|
---|
| 1319 | else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
|
---|
| 1320 | {
|
---|
| 1321 | readstatus = OB_RDP_LEVEL_1;
|
---|
| 1322 | }
|
---|
| 1323 | else
|
---|
| 1324 | {
|
---|
| 1325 | readstatus = OB_RDP_LEVEL_0;
|
---|
| 1326 | }
|
---|
| 1327 |
|
---|
| 1328 | return readstatus;
|
---|
| 1329 | }
|
---|
| 1330 |
|
---|
| 1331 | /**
|
---|
| 1332 | * @brief Returns the FLASH BOR level.
|
---|
| 1333 | * @retval uint8_t The FLASH BOR level:
|
---|
| 1334 | * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
|
---|
| 1335 | * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
|
---|
| 1336 | * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
|
---|
| 1337 | * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
|
---|
| 1338 | */
|
---|
| 1339 | static uint8_t FLASH_OB_GetBOR(void)
|
---|
| 1340 | {
|
---|
| 1341 | /* Return the FLASH BOR level */
|
---|
| 1342 | return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
|
---|
| 1343 | }
|
---|
| 1344 |
|
---|
| 1345 | /**
|
---|
| 1346 | * @}
|
---|
| 1347 | */
|
---|
| 1348 |
|
---|
| 1349 | #endif /* HAL_FLASH_MODULE_ENABLED */
|
---|
| 1350 |
|
---|
| 1351 | /**
|
---|
| 1352 | * @}
|
---|
| 1353 | */
|
---|
| 1354 |
|
---|
| 1355 | /**
|
---|
| 1356 | * @}
|
---|
| 1357 | */
|
---|
| 1358 |
|
---|
| 1359 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
---|