1 | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_hal_spi.h
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4 | * @author MCD Application Team
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5 | * @version V1.4.1
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6 | * @date 09-October-2015
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7 | * @brief Header file of SPI HAL module.
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8 | ******************************************************************************
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9 | * @attention
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10 | *
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11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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12 | *
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13 | * Redistribution and use in source and binary forms, with or without modification,
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14 | * are permitted provided that the following conditions are met:
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15 | * 1. Redistributions of source code must retain the above copyright notice,
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16 | * this list of conditions and the following disclaimer.
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17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 | * this list of conditions and the following disclaimer in the documentation
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19 | * and/or other materials provided with the distribution.
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20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 | * may be used to endorse or promote products derived from this software
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22 | * without specific prior written permission.
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23 | *
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 | *
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35 | ******************************************************************************
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36 | */
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37 |
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38 | /* Define to prevent recursive inclusion -------------------------------------*/
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39 | #ifndef __STM32F4xx_HAL_SPI_H
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40 | #define __STM32F4xx_HAL_SPI_H
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41 |
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42 | #ifdef __cplusplus
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43 | extern "C" {
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44 | #endif
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45 |
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46 | /* Includes ------------------------------------------------------------------*/
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47 | #include "stm32f4xx_hal_def.h"
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48 |
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49 | /** @addtogroup STM32F4xx_HAL_Driver
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50 | * @{
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51 | */
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52 |
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53 | /** @addtogroup SPI
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54 | * @{
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55 | */
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56 |
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57 | /* Exported types ------------------------------------------------------------*/
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58 | /** @defgroup SPI_Exported_Types SPI Exported Types
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59 | * @{
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60 | */
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61 |
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62 | /**
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63 | * @brief SPI Configuration Structure definition
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64 | */
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65 | typedef struct
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66 | {
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67 | uint32_t Mode; /*!< Specifies the SPI operating mode.
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68 | This parameter can be a value of @ref SPI_mode */
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69 |
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70 | uint32_t Direction; /*!< Specifies the SPI Directional mode state.
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71 | This parameter can be a value of @ref SPI_Direction_mode */
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72 |
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73 | uint32_t DataSize; /*!< Specifies the SPI data size.
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74 | This parameter can be a value of @ref SPI_data_size */
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75 |
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76 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
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77 | This parameter can be a value of @ref SPI_Clock_Polarity */
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78 |
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79 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
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80 | This parameter can be a value of @ref SPI_Clock_Phase */
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81 |
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82 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
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83 | hardware (NSS pin) or by software using the SSI bit.
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84 | This parameter can be a value of @ref SPI_Slave_Select_management */
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85 |
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86 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
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87 | used to configure the transmit and receive SCK clock.
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88 | This parameter can be a value of @ref SPI_BaudRate_Prescaler
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89 | @note The communication clock is derived from the master
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90 | clock. The slave clock does not need to be set */
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91 |
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92 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
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93 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */
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94 |
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95 | uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
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96 | This parameter can be a value of @ref SPI_TI_mode */
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97 |
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98 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
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99 | This parameter can be a value of @ref SPI_CRC_Calculation */
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100 |
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101 | uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
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102 | This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
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103 |
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104 | }SPI_InitTypeDef;
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105 |
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106 | /**
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107 | * @brief HAL SPI State structure definition
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108 | */
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109 | typedef enum
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110 | {
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111 | HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
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112 | HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
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113 | HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
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114 | HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
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115 | HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
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116 | HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
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117 | HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
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118 |
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119 | }HAL_SPI_StateTypeDef;
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120 |
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121 | /**
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122 | * @brief SPI handle Structure definition
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123 | */
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124 | typedef struct __SPI_HandleTypeDef
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125 | {
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126 | SPI_TypeDef *Instance; /* SPI registers base address */
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127 |
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128 | SPI_InitTypeDef Init; /* SPI communication parameters */
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129 |
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130 | uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
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131 |
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132 | uint16_t TxXferSize; /* SPI Tx transfer size */
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133 |
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134 | uint16_t TxXferCount; /* SPI Tx Transfer Counter */
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135 |
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136 | uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
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137 |
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138 | uint16_t RxXferSize; /* SPI Rx transfer size */
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139 |
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140 | uint16_t RxXferCount; /* SPI Rx Transfer Counter */
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141 |
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142 | DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA handle parameters */
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143 |
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144 | DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA handle parameters */
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145 |
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146 | void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */
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147 |
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148 | void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */
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149 |
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150 | HAL_LockTypeDef Lock; /* SPI locking object */
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151 |
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152 | __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
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153 |
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154 | __IO uint32_t ErrorCode; /* SPI Error code */
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155 |
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156 | }SPI_HandleTypeDef;
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157 | /**
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158 | * @}
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159 | */
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160 |
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161 | /* Exported constants --------------------------------------------------------*/
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162 | /** @defgroup SPI_Exported_Constants SPI Exported Constants
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163 | * @{
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164 | */
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165 |
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166 | /** @defgroup SPI_Error_Code SPI Error Code
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167 | * @brief SPI Error Code
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168 | * @{
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169 | */
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170 | #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
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171 | #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001) /*!< MODF error */
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172 | #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002) /*!< CRC error */
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173 | #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004) /*!< OVR error */
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174 | #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008) /*!< FRE error */
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175 | #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
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176 | #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020) /*!< Flag: RXNE,TXE, BSY */
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177 | /**
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178 | * @}
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179 | */
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180 |
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181 | /** @defgroup SPI_mode SPI Mode
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182 | * @{
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183 | */
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184 | #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
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185 | #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
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186 | /**
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187 | * @}
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188 | */
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189 |
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190 | /** @defgroup SPI_Direction_mode SPI Direction Mode
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191 | * @{
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192 | */
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193 | #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
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194 | #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
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195 | #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
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196 | /**
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197 | * @}
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198 | */
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199 |
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200 | /** @defgroup SPI_data_size SPI Data Size
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201 | * @{
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202 | */
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203 | #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
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204 | #define SPI_DATASIZE_16BIT SPI_CR1_DFF
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205 | /**
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206 | * @}
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207 | */
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208 |
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209 | /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
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210 | * @{
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211 | */
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212 | #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
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213 | #define SPI_POLARITY_HIGH SPI_CR1_CPOL
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214 | /**
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215 | * @}
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216 | */
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217 |
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218 | /** @defgroup SPI_Clock_Phase SPI Clock Phase
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219 | * @{
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220 | */
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221 | #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
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222 | #define SPI_PHASE_2EDGE SPI_CR1_CPHA
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223 | /**
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224 | * @}
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225 | */
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226 |
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227 | /** @defgroup SPI_Slave_Select_management SPI Slave Select Management
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228 | * @{
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229 | */
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230 | #define SPI_NSS_SOFT SPI_CR1_SSM
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231 | #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
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232 | #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
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233 | /**
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234 | * @}
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235 | */
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236 |
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237 | /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
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238 | * @{
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239 | */
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240 | #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
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241 | #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
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242 | #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
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243 | #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
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244 | #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
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245 | #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
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246 | #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
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247 | #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
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248 | /**
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249 | * @}
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250 | */
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251 |
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252 | /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transsmission
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253 | * @{
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254 | */
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255 | #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
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256 | #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
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257 | /**
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258 | * @}
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259 | */
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260 |
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261 | /** @defgroup SPI_TI_mode SPI TI Mode
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262 | * @{
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263 | */
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264 | #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
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265 | #define SPI_TIMODE_ENABLE SPI_CR2_FRF
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266 | /**
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267 | * @}
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268 | */
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269 |
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270 | /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
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271 | * @{
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272 | */
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273 | #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
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274 | #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
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275 | /**
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276 | * @}
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277 | */
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278 |
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279 | /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
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280 | * @{
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281 | */
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282 | #define SPI_IT_TXE SPI_CR2_TXEIE
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283 | #define SPI_IT_RXNE SPI_CR2_RXNEIE
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284 | #define SPI_IT_ERR SPI_CR2_ERRIE
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285 | /**
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286 | * @}
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287 | */
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288 |
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289 | /** @defgroup SPI_Flags_definition SPI Flags Definition
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290 | * @{
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291 | */
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292 | #define SPI_FLAG_RXNE SPI_SR_RXNE
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293 | #define SPI_FLAG_TXE SPI_SR_TXE
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294 | #define SPI_FLAG_CRCERR SPI_SR_CRCERR
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295 | #define SPI_FLAG_MODF SPI_SR_MODF
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296 | #define SPI_FLAG_OVR SPI_SR_OVR
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297 | #define SPI_FLAG_BSY SPI_SR_BSY
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298 | #define SPI_FLAG_FRE SPI_SR_FRE
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299 | /**
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300 | * @}
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301 | */
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302 |
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303 | /**
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304 | * @}
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305 | */
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306 |
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307 | /* Exported macro ------------------------------------------------------------*/
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308 | /** @defgroup SPI_Exported_Macros SPI Exported Macros
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309 | * @{
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310 | */
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311 | /** @brief Reset SPI handle state
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312 | * @param __HANDLE__: specifies the SPI handle.
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313 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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314 | * @retval None
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315 | */
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316 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
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317 |
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318 | /** @brief Enable or disable the specified SPI interrupts.
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319 | * @param __HANDLE__: specifies the SPI handle.
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320 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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321 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
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322 | * This parameter can be one of the following values:
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323 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
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324 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
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325 | * @arg SPI_IT_ERR: Error interrupt enable
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326 | * @retval None
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327 | */
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328 | #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
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329 | #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
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330 |
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331 | /** @brief Check if the specified SPI interrupt source is enabled or disabled.
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332 | * @param __HANDLE__: specifies the SPI handle.
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333 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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334 | * @param __INTERRUPT__: specifies the SPI interrupt source to check.
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335 | * This parameter can be one of the following values:
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336 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
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337 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
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338 | * @arg SPI_IT_ERR: Error interrupt enable
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339 | * @retval The new state of __IT__ (TRUE or FALSE).
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340 | */
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341 | #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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342 |
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343 | /** @brief Check whether the specified SPI flag is set or not.
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344 | * @param __HANDLE__: specifies the SPI handle.
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345 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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346 | * @param __FLAG__: specifies the flag to check.
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347 | * This parameter can be one of the following values:
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348 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
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349 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag
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350 | * @arg SPI_FLAG_CRCERR: CRC error flag
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351 | * @arg SPI_FLAG_MODF: Mode fault flag
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352 | * @arg SPI_FLAG_OVR: Overrun flag
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353 | * @arg SPI_FLAG_BSY: Busy flag
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354 | * @arg SPI_FLAG_FRE: Frame format error flag
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355 | * @retval The new state of __FLAG__ (TRUE or FALSE).
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356 | */
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357 | #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
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358 |
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359 | /** @brief Clear the SPI CRCERR pending flag.
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360 | * @param __HANDLE__: specifies the SPI handle.
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361 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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362 | * @retval None
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363 | */
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364 | #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
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365 |
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366 | /** @brief Clear the SPI MODF pending flag.
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367 | * @param __HANDLE__: specifies the SPI handle.
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368 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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369 | * @retval None
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370 | */
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371 | #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
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372 | do{ \
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373 | __IO uint32_t tmpreg; \
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374 | tmpreg = (__HANDLE__)->Instance->SR; \
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375 | (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
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376 | UNUSED(tmpreg); \
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377 | } while(0)
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378 |
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379 | /** @brief Clear the SPI OVR pending flag.
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380 | * @param __HANDLE__: specifies the SPI handle.
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381 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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382 | * @retval None
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383 | */
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384 | #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
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385 | do{ \
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386 | __IO uint32_t tmpreg; \
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387 | tmpreg = (__HANDLE__)->Instance->DR; \
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388 | tmpreg = (__HANDLE__)->Instance->SR; \
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389 | UNUSED(tmpreg); \
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390 | } while(0)
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391 |
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392 | /** @brief Clear the SPI FRE pending flag.
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393 | * @param __HANDLE__: specifies the SPI handle.
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394 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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395 | * @retval None
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396 | */
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397 | #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
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398 | do{ \
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399 | __IO uint32_t tmpreg; \
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400 | tmpreg = (__HANDLE__)->Instance->SR; \
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401 | UNUSED(tmpreg); \
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402 | }while(0)
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403 |
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404 | /** @brief Enable SPI
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405 | * @param __HANDLE__: specifies the SPI Handle.
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406 | * @retval None
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407 | */
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408 | #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
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409 |
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410 | /** @brief Disable SPI
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411 | * @param __HANDLE__: specifies the SPI Handle.
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412 | * @retval None
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413 | */
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414 | #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
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415 | /**
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416 | * @}
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417 | */
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418 |
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419 | /* Exported functions --------------------------------------------------------*/
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420 | /** @addtogroup SPI_Exported_Functions
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421 | * @{
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422 | */
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423 |
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424 | /** @addtogroup SPI_Exported_Functions_Group1
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425 | * @{
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426 | */
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427 | /* Initialization/de-initialization functions **********************************/
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428 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
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429 | HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
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430 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
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431 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
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432 | /**
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433 | * @}
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434 | */
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435 |
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436 | /** @addtogroup SPI_Exported_Functions_Group2
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437 | * @{
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438 | */
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439 | /* I/O operation functions *****************************************************/
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440 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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441 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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442 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
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443 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
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444 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
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445 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
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446 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
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447 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
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448 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
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449 | HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
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450 | HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
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451 | HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
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452 |
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453 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
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454 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
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455 | void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
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456 | void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
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457 | void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
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458 | void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
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459 | void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
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460 | void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
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461 | /**
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462 | * @}
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463 | */
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464 |
|
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465 | /** @addtogroup SPI_Exported_Functions_Group3
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466 | * @{
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467 | */
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468 | /* Peripheral State and Control functions **************************************/
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469 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
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470 | uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
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471 |
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472 | /**
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473 | * @}
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474 | */
|
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475 |
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476 | /**
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477 | * @}
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478 | */
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479 |
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480 | /* Private types -------------------------------------------------------------*/
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481 | /* Private variables ---------------------------------------------------------*/
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482 | /* Private constants ---------------------------------------------------------*/
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483 | /** @defgroup SPI_Private_Constants SPI Private Constants
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484 | * @{
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485 | */
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486 | /**
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487 | * @}
|
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488 | */
|
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489 |
|
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490 | /* Private macros ------------------------------------------------------------*/
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491 | /** @defgroup SPI_Private_Macros SPI Private Macros
|
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492 | * @{
|
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493 | */
|
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494 |
|
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495 | #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
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496 | ((MODE) == SPI_MODE_MASTER))
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497 |
|
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498 |
|
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499 | #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
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500 | ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
|
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501 | ((MODE) == SPI_DIRECTION_1LINE))
|
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502 |
|
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503 | #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
|
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504 | ((MODE) == SPI_DIRECTION_1LINE))
|
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505 |
|
---|
506 | #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
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507 |
|
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508 | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
|
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509 | ((DATASIZE) == SPI_DATASIZE_8BIT))
|
---|
510 |
|
---|
511 | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
|
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512 | ((CPOL) == SPI_POLARITY_HIGH))
|
---|
513 |
|
---|
514 | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
|
---|
515 | ((CPHA) == SPI_PHASE_2EDGE))
|
---|
516 |
|
---|
517 | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
|
---|
518 | ((NSS) == SPI_NSS_HARD_INPUT) || \
|
---|
519 | ((NSS) == SPI_NSS_HARD_OUTPUT))
|
---|
520 |
|
---|
521 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
|
---|
522 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
|
---|
523 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
|
---|
524 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
|
---|
525 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
|
---|
526 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
|
---|
527 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
|
---|
528 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
|
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529 |
|
---|
530 | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
|
---|
531 | ((BIT) == SPI_FIRSTBIT_LSB))
|
---|
532 |
|
---|
533 | #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
|
---|
534 | ((MODE) == SPI_TIMODE_ENABLE))
|
---|
535 |
|
---|
536 | #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
|
---|
537 | ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
|
---|
538 |
|
---|
539 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
|
---|
540 |
|
---|
541 | #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
|
---|
542 |
|
---|
543 | #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
|
---|
544 |
|
---|
545 | #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
|
---|
546 | (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
|
---|
547 | /**
|
---|
548 | * @}
|
---|
549 | */
|
---|
550 |
|
---|
551 | /* Private functions ---------------------------------------------------------*/
|
---|
552 | /** @defgroup SPI_Private_Functions SPI Private Functions
|
---|
553 | * @{
|
---|
554 | */
|
---|
555 |
|
---|
556 | /**
|
---|
557 | * @}
|
---|
558 | */
|
---|
559 |
|
---|
560 | /**
|
---|
561 | * @}
|
---|
562 | */
|
---|
563 |
|
---|
564 | /**
|
---|
565 | * @}
|
---|
566 | */
|
---|
567 |
|
---|
568 |
|
---|
569 | #ifdef __cplusplus
|
---|
570 | }
|
---|
571 | #endif
|
---|
572 |
|
---|
573 | #endif /* __STM32F4xx_HAL_SPI_H */
|
---|
574 |
|
---|
575 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
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