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source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago
nucleo_f401re依存部の追加
File size: 23.8 KB

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1	/**
2	******************************************************************************
3	* @file stm32f4xx_hal_dma2d.h
4	* @author MCD Application Team
5	* @version V1.4.1
6	* @date 09-October-2015
7	* @brief Header file of DMA2D HAL module.
8	******************************************************************************
9	* @attention
10	*
11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12	*
13	* Redistribution and use in source and binary forms, with or without modification,
14	* are permitted provided that the following conditions are met:
15	* 1. Redistributions of source code must retain the above copyright notice,
16	* this list of conditions and the following disclaimer.
17	* 2. Redistributions in binary form must reproduce the above copyright notice,
18	* this list of conditions and the following disclaimer in the documentation
19	* and/or other materials provided with the distribution.
20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
21	* may be used to endorse or promote products derived from this software
22	* without specific prior written permission.
23	*
24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34	*
35	******************************************************************************
36	*/
37
38	/* Define to prevent recursive inclusion -------------------------------------*/
39	#ifndef __STM32F4xx_HAL_DMA2D_H
40	#define __STM32F4xx_HAL_DMA2D_H
41
42	#ifdef __cplusplus
43	extern "C" {
44	#endif
45
46	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
47	defined(STM32F469xx) \|\| defined(STM32F479xx)
48	/* Includes ------------------------------------------------------------------*/
49	#include "stm32f4xx_hal_def.h"
50
51	/** @addtogroup STM32F4xx_HAL_Driver
52	* @{
53	*/
54
55	/** @defgroup DMA2D DMA2D
56	* @brief DMA2D HAL module driver
57	* @{
58	*/
59
60	/* Exported types ------------------------------------------------------------*/
61	/** @defgroup DMA2D_Exported_Types DMA2D Exported Types
62	* @{
63	*/
64	#define MAX_DMA2D_LAYER 2
65
66	/**
67	* @brief DMA2D color Structure definition
68	*/
69	typedef struct
70	{
71	uint32_t Blue; /*!< Configures the blue value.
72	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
73
74	uint32_t Green; /*!< Configures the green value.
75	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
76
77	uint32_t Red; /*!< Configures the red value.
78	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
79	} DMA2D_ColorTypeDef;
80
81	/**
82	* @brief DMA2D CLUT Structure definition
83	*/
84	typedef struct
85	{
86	uint32_t pCLUT; /!< Configures the DMA2D CLUT memory address.*/
87
88	uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
89	This parameter can be one value of @ref DMA2D_CLUT_CM */
90
91	uint32_t Size; /*!< configures the DMA2D CLUT size.
92	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
93	} DMA2D_CLUTCfgTypeDef;
94
95	/**
96	* @brief DMA2D Init structure definition
97	*/
98	typedef struct
99	{
100	uint32_t Mode; /*!< configures the DMA2D transfer mode.
101	This parameter can be one value of @ref DMA2D_Mode */
102
103	uint32_t ColorMode; /*!< configures the color format of the output image.
104	This parameter can be one value of @ref DMA2D_Color_Mode */
105
106	uint32_t OutputOffset; /*!< Specifies the Offset value.
107	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
108	} DMA2D_InitTypeDef;
109
110	/**
111	* @brief DMA2D Layer structure definition
112	*/
113	typedef struct
114	{
115	uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
116	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
117
118	uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
119	This parameter can be one value of @ref DMA2D_Input_Color_Mode */
120
121	uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
122	This parameter can be one value of @ref DMA2D_ALPHA_MODE */
123
124	uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
125	This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
126	in case of A8 or A4 color mode (ARGB).
127	Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
128
129	} DMA2D_LayerCfgTypeDef;
130
131	/**
132	* @brief HAL DMA2D State structures definition
133	*/
134	typedef enum
135	{
136	HAL_DMA2D_STATE_RESET = 0x00, /!< DMA2D not yet initialized or disabled /
137	HAL_DMA2D_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
138	HAL_DMA2D_STATE_BUSY = 0x02, /!< an internal process is ongoing /
139	HAL_DMA2D_STATE_TIMEOUT = 0x03, /!< Timeout state /
140	HAL_DMA2D_STATE_ERROR = 0x04, /!< DMA2D state error /
141	HAL_DMA2D_STATE_SUSPEND = 0x05 /!< DMA2D process is suspended /
142	}HAL_DMA2D_StateTypeDef;
143
144	/**
145	* @brief DMA2D handle Structure definition
146	*/
147	typedef struct __DMA2D_HandleTypeDef
148	{
149	DMA2D_TypeDef Instance; /!< DMA2D Register base address */
150
151	DMA2D_InitTypeDef Init; /!< DMA2D communication parameters /
152
153	void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /!< DMA2D transfer complete callback /
154
155	void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /!< DMA2D transfer error callback /
156
157	DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /!< DMA2D Layers parameters /
158
159	HAL_LockTypeDef Lock; /!< DMA2D Lock /
160
161	__IO HAL_DMA2D_StateTypeDef State; /!< DMA2D transfer state /
162
163	__IO uint32_t ErrorCode; /!< DMA2D Error code /
164	} DMA2D_HandleTypeDef;
165	/**
166	* @}
167	*/
168
169	/* Exported constants --------------------------------------------------------*/
170	/** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
171	* @{
172	*/
173
174	/** @defgroup DMA2D_Error_Code DMA2D Error Code
175	* @{
176	*/
177	#define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /!< No error /
178	#define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /!< Transfer error /
179	#define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /!< Configuration error /
180	#define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /!< Timeout error /
181	/**
182	* @}
183	*/
184
185	/** @defgroup DMA2D_Mode DMA2D Mode
186	* @{
187	*/
188	#define DMA2D_M2M ((uint32_t)0x00000000) /!< DMA2D memory to memory transfer mode /
189	#define DMA2D_M2M_PFC ((uint32_t)0x00010000) /!< DMA2D memory to memory with pixel format conversion transfer mode /
190	#define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /!< DMA2D memory to memory with blending transfer mode /
191	#define DMA2D_R2M ((uint32_t)0x00030000) /!< DMA2D register to memory transfer mode /
192	/**
193	* @}
194	*/
195
196	/** @defgroup DMA2D_Color_Mode DMA2D Color Mode
197	* @{
198	*/
199	#define DMA2D_ARGB8888 ((uint32_t)0x00000000) /!< ARGB8888 DMA2D color mode /
200	#define DMA2D_RGB888 ((uint32_t)0x00000001) /!< RGB888 DMA2D color mode /
201	#define DMA2D_RGB565 ((uint32_t)0x00000002) /!< RGB565 DMA2D color mode /
202	#define DMA2D_ARGB1555 ((uint32_t)0x00000003) /!< ARGB1555 DMA2D color mode /
203	#define DMA2D_ARGB4444 ((uint32_t)0x00000004) /!< ARGB4444 DMA2D color mode /
204	/**
205	* @}
206	*/
207
208	/** @defgroup DMA2D_COLOR_VALUE DMA2D COLOR VALUE
209	* @{
210	*/
211	#define COLOR_VALUE ((uint32_t)0x000000FF) /!< color value mask /
212	/**
213	* @}
214	*/
215
216	/** @defgroup DMA2D_SIZE DMA2D SIZE
217	* @{
218	*/
219	#define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /!< DMA2D pixel per line /
220	#define DMA2D_LINE DMA2D_NLR_NL /!< DMA2D number of line /
221	/**
222	* @}
223	*/
224
225	/** @defgroup DMA2D_Offset DMA2D Offset
226	* @{
227	*/
228	#define DMA2D_OFFSET DMA2D_FGOR_LO /!< Line Offset /
229	/**
230	* @}
231	*/
232
233	/** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
234	* @{
235	*/
236	#define CM_ARGB8888 ((uint32_t)0x00000000) /!< ARGB8888 color mode /
237	#define CM_RGB888 ((uint32_t)0x00000001) /!< RGB888 color mode /
238	#define CM_RGB565 ((uint32_t)0x00000002) /!< RGB565 color mode /
239	#define CM_ARGB1555 ((uint32_t)0x00000003) /!< ARGB1555 color mode /
240	#define CM_ARGB4444 ((uint32_t)0x00000004) /!< ARGB4444 color mode /
241	#define CM_L8 ((uint32_t)0x00000005) /!< L8 color mode /
242	#define CM_AL44 ((uint32_t)0x00000006) /!< AL44 color mode /
243	#define CM_AL88 ((uint32_t)0x00000007) /!< AL88 color mode /
244	#define CM_L4 ((uint32_t)0x00000008) /!< L4 color mode /
245	#define CM_A8 ((uint32_t)0x00000009) /!< A8 color mode /
246	#define CM_A4 ((uint32_t)0x0000000A) /!< A4 color mode /
247	/**
248	* @}
249	*/
250
251	/** @defgroup DMA2D_ALPHA_MODE DMA2D ALPHA MODE
252	* @{
253	*/
254	#define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /!< No modification of the alpha channel value /
255	#define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /!< Replace original alpha channel value by programmed alpha value /
256	#define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
257	with original alpha channel value */
258	/**
259	* @}
260	*/
261
262	/** @defgroup DMA2D_CLUT_CM DMA2D CLUT CM
263	* @{
264	*/
265	#define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /!< ARGB8888 DMA2D C-LUT color mode /
266	#define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /!< RGB888 DMA2D C-LUT color mode /
267	/**
268	* @}
269	*/
270
271	/** @defgroup DMA2D_Size_Clut DMA2D Size Clut
272	* @{
273	*/
274	#define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /!< DMA2D C-LUT size /
275	/**
276	* @}
277	*/
278
279	/** @defgroup DMA2D_DeadTime DMA2D DeadTime
280	* @{
281	*/
282	#define LINE_WATERMARK DMA2D_LWR_LW
283	/**
284	* @}
285	*/
286
287	/** @defgroup DMA2D_Interrupts DMA2D Interrupts
288	* @{
289	*/
290	#define DMA2D_IT_CE DMA2D_CR_CEIE /!< Configuration Error Interrupt /
291	#define DMA2D_IT_CTC DMA2D_CR_CTCIE /!< C-LUT Transfer Complete Interrupt /
292	#define DMA2D_IT_CAE DMA2D_CR_CAEIE /!< C-LUT Access Error Interrupt /
293	#define DMA2D_IT_TW DMA2D_CR_TWIE /!< Transfer Watermark Interrupt /
294	#define DMA2D_IT_TC DMA2D_CR_TCIE /!< Transfer Complete Interrupt /
295	#define DMA2D_IT_TE DMA2D_CR_TEIE /!< Transfer Error Interrupt /
296	/**
297	* @}
298	*/
299
300	/** @defgroup DMA2D_Flag DMA2D Flag
301	* @{
302	*/
303	#define DMA2D_FLAG_CE DMA2D_ISR_CEIF /!< Configuration Error Interrupt Flag /
304	#define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /!< C-LUT Transfer Complete Interrupt Flag /
305	#define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /!< C-LUT Access Error Interrupt Flag /
306	#define DMA2D_FLAG_TW DMA2D_ISR_TWIF /!< Transfer Watermark Interrupt Flag /
307	#define DMA2D_FLAG_TC DMA2D_ISR_TCIF /!< Transfer Complete Interrupt Flag /
308	#define DMA2D_FLAG_TE DMA2D_ISR_TEIF /!< Transfer Error Interrupt Flag /
309	/**
310	* @}
311	*/
312
313	/**
314	* @}
315	*/
316	/* Exported macro ------------------------------------------------------------*/
317	/** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
318	* @{
319	*/
320
321	/** @brief Reset DMA2D handle state
322	* @param __HANDLE__: specifies the DMA2D handle.
323	* @retval None
324	*/
325	#define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
326
327	/**
328	* @brief Enable the DMA2D.
329	* @param __HANDLE__: DMA2D handle
330	* @retval None.
331	*/
332	#define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= DMA2D_CR_START)
333
334	/**
335	* @brief Disable the DMA2D.
336	* @param __HANDLE__: DMA2D handle
337	* @retval None.
338	*/
339	#define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
340
341	/* Interrupt & Flag management */
342	/**
343	* @brief Get the DMA2D pending flags.
344	* @param __HANDLE__: DMA2D handle
345	* @param __FLAG__: Get the specified flag.
346	* This parameter can be any combination of the following values:
347	* @arg DMA2D_FLAG_CE: Configuration error flag
348	* @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
349	* @arg DMA2D_FLAG_CAE: C-LUT access error flag
350	* @arg DMA2D_FLAG_TW: Transfer Watermark flag
351	* @arg DMA2D_FLAG_TC: Transfer complete flag
352	* @arg DMA2D_FLAG_TE: Transfer error flag
353	* @retval The state of FLAG.
354	*/
355	#define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
356
357	/**
358	* @brief Clears the DMA2D pending flags.
359	* @param __HANDLE__: DMA2D handle
360	* @param __FLAG__: specifies the flag to clear.
361	* This parameter can be any combination of the following values:
362	* @arg DMA2D_FLAG_CE: Configuration error flag
363	* @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
364	* @arg DMA2D_FLAG_CAE: C-LUT access error flag
365	* @arg DMA2D_FLAG_TW: Transfer Watermark flag
366	* @arg DMA2D_FLAG_TC: Transfer complete flag
367	* @arg DMA2D_FLAG_TE: Transfer error flag
368	* @retval None
369	*/
370	#define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
371
372	/**
373	* @brief Enables the specified DMA2D interrupts.
374	* @param __HANDLE__: DMA2D handle
375	* @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
376	* This parameter can be any combination of the following values:
377	* @arg DMA2D_IT_CE: Configuration error interrupt mask
378	* @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
379	* @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
380	* @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
381	* @arg DMA2D_IT_TC: Transfer complete interrupt mask
382	* @arg DMA2D_IT_TE: Transfer error interrupt mask
383	* @retval None
384	*/
385	#define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR \|= (__INTERRUPT__))
386
387	/**
388	* @brief Disables the specified DMA2D interrupts.
389	* @param __HANDLE__: DMA2D handle
390	* @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
391	* This parameter can be any combination of the following values:
392	* @arg DMA2D_IT_CE: Configuration error interrupt mask
393	* @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
394	* @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
395	* @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
396	* @arg DMA2D_IT_TC: Transfer complete interrupt mask
397	* @arg DMA2D_IT_TE: Transfer error interrupt mask
398	* @retval None
399	*/
400	#define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
401
402	/**
403	* @brief Checks whether the specified DMA2D interrupt has occurred or not.
404	* @param __HANDLE__: DMA2D handle
405	* @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
406	* This parameter can be one of the following values:
407	* @arg DMA2D_IT_CE: Configuration error interrupt mask
408	* @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
409	* @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
410	* @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
411	* @arg DMA2D_IT_TC: Transfer complete interrupt mask
412	* @arg DMA2D_IT_TE: Transfer error interrupt mask
413	* @retval The state of INTERRUPT.
414	*/
415	#define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
416	/**
417	* @}
418	*/
419
420	/* Exported functions --------------------------------------------------------*/
421	/** @defgroup DMA2D_Exported_Functions DMA2D Exported Functions
422	* @{
423	*/
424	/* Initialization and de-initialization functions *******************************/
425	HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
426	HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
427	void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
428	void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
429
430	/* IO operation functions *******************************************************/
431	HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
432	HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
433	HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
434	HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
435	HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
436	HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
437	HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
438	HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
439	void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
440
441	/* Peripheral Control functions *************************************************/
442	HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
443	HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
444	HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
445	HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
446	HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
447
448	/* Peripheral State functions ***************************************************/
449	HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
450	uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
451	/**
452	* @}
453	*/
454
455	/* Private types -------------------------------------------------------------*/
456	/** @defgroup DMA2D_Private_Types DMA2D Private Types
457	* @{
458	*/
459
460	/**
461	* @}
462	*/
463
464	/* Private defines -------------------------------------------------------------*/
465	/** @defgroup DMA2D_Private_Defines DMA2D Private Defines
466	* @{
467	*/
468
469	/**
470	* @}
471	*/
472
473	/* Private variables ---------------------------------------------------------*/
474	/** @defgroup DMA2D_Private_Variables DMA2D Private Variables
475	* @{
476	*/
477
478	/**
479	* @}
480	*/
481
482	/* Private constants ---------------------------------------------------------*/
483	/** @defgroup DMA2D_Private_Constants DMA2D Private Constants
484	* @{
485	*/
486
487	/**
488	* @}
489	*/
490
491	/* Private macros ------------------------------------------------------------*/
492	/** @defgroup DMA2D_Private_Macros DMA2D Private Macros
493	* @{
494	*/
495	#define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
496	#define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) \|\| ((MODE) == DMA2D_M2M_PFC) \|\| \
497	((MODE) == DMA2D_M2M_BLEND) \|\| ((MODE) == DMA2D_R2M))
498	#define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) \|\| ((MODE_ARGB) == DMA2D_RGB888) \|\| \
499	((MODE_ARGB) == DMA2D_RGB565) \|\| ((MODE_ARGB) == DMA2D_ARGB1555) \|\| \
500	((MODE_ARGB) == DMA2D_ARGB4444))
501	#define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
502	#define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
503	#define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
504	#define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
505	#define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) \|\| ((INPUT_CM) == CM_RGB888) \|\| \
506	((INPUT_CM) == CM_RGB565) \|\| ((INPUT_CM) == CM_ARGB1555) \|\| \
507	((INPUT_CM) == CM_ARGB4444) \|\| ((INPUT_CM) == CM_L8) \|\| \
508	((INPUT_CM) == CM_AL44) \|\| ((INPUT_CM) == CM_AL88) \|\| \
509	((INPUT_CM) == CM_L4) \|\| ((INPUT_CM) == CM_A8) \|\| \
510	((INPUT_CM) == CM_A4))
511	#define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) \|\| \
512	((AlphaMode) == DMA2D_REPLACE_ALPHA) \|\| \
513	((AlphaMode) == DMA2D_COMBINE_ALPHA))
514	#define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) \|\| ((CLUT_CM) == DMA2D_CCM_RGB888))
515	#define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
516	#define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
517	/**
518	* @}
519	*/
520
521	/* Private functions prototypes ---------------------------------------------------------*/
522	/** @defgroup DMA2D_Private_Functions_Prototypes DMA2D Private Functions Prototypes
523	* @{
524	*/
525
526	/**
527	* @}
528	*/
529
530	/* Private functions ---------------------------------------------------------*/
531	/** @defgroup DMA2D_Private_Functions DMA2D Private Functions
532	* @{
533	*/
534
535	/**
536	* @}
537	*/
538
539	/**
540	* @}
541	*/
542
543	/**
544	* @}
545	*/
546
547	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
548
549	#ifdef __cplusplus
550	}
551	#endif
552
553	#endif /* __STM32F4xx_HAL_DMA2D_H */
554
555	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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