source: asp3_tinet_ecnl_rx/trunk/ntshell/ntshell/core/vtrecv.c@ 337

Last change on this file since 337 was 337, checked in by coas-nagasima, 6 years ago

ASP3版ECNLを追加
  • Property svn:eol-style set to native
  • Property svn:mime-type set to text/x-csrc;charset=UTF-8
File size: 146.7 KB
Line 
1/**
2 * @file vtrecv.c
3 * @author CuBeatSystems
4 * @author Shinichiro Nakamura
5 * @copyright
6 * ===============================================================
7 * Natural Tiny Shell (NT-Shell) Version 0.3.1
8 * ===============================================================
9 * Copyright (c) 2010-2016 Shinichiro Nakamura
10 *
11 * Permission is hereby granted, free of charge, to any person
12 * obtaining a copy of this software and associated documentation
13 * files (the "Software"), to deal in the Software without
14 * restriction, including without limitation the rights to use,
15 * copy, modify, merge, publish, distribute, sublicense, and/or
16 * sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following
18 * conditions:
19 *
20 * The above copyright notice and this permission notice shall be
21 * included in all copies or substantial portions of the Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
25 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
27 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
28 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
29 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
30 * OTHER DEALINGS IN THE SOFTWARE.
31 */
32
33/*
34 * @note
35 * An implementation of Paul Williams' DEC compatible state machine parser.
36 * This code is in the public domain.
37 *
38 * @author Joshua Haberman <joshua@reverberate.org>
39 * @author Shinichiro Nakamura : Modified for Natural Tiny Shell (NT-Shell)
40 */
41
42#include "vtrecv.h"
43
44static state_change_t GET_STATE_TABLE(const int state, const int ch);
45static vtrecv_action_t GET_ENTRY_ACTIONS(const int state);
46static vtrecv_action_t GET_EXIT_ACTIONS(const int state);
47
48#if (USE_ORIGINAL_LUT==1)
49static const state_change_t STATE_TABLE[14][256] = {
50 { /* VTRECV_STATE_CSI_ENTRY = 0 */
51 /*0 */ VTRECV_ACTION_EXECUTE | (0 << 4),
52 /*1 */ VTRECV_ACTION_EXECUTE | (0 << 4),
53 /*2 */ VTRECV_ACTION_EXECUTE | (0 << 4),
54 /*3 */ VTRECV_ACTION_EXECUTE | (0 << 4),
55 /*4 */ VTRECV_ACTION_EXECUTE | (0 << 4),
56 /*5 */ VTRECV_ACTION_EXECUTE | (0 << 4),
57 /*6 */ VTRECV_ACTION_EXECUTE | (0 << 4),
58 /*7 */ VTRECV_ACTION_EXECUTE | (0 << 4),
59 /*8 */ VTRECV_ACTION_EXECUTE | (0 << 4),
60 /*9 */ VTRECV_ACTION_EXECUTE | (0 << 4),
61 /*10 */ VTRECV_ACTION_EXECUTE | (0 << 4),
62 /*11 */ VTRECV_ACTION_EXECUTE | (0 << 4),
63 /*12 */ VTRECV_ACTION_EXECUTE | (0 << 4),
64 /*13 */ VTRECV_ACTION_EXECUTE | (0 << 4),
65 /*14 */ VTRECV_ACTION_EXECUTE | (0 << 4),
66 /*15 */ VTRECV_ACTION_EXECUTE | (0 << 4),
67 /*16 */ VTRECV_ACTION_EXECUTE | (0 << 4),
68 /*17 */ VTRECV_ACTION_EXECUTE | (0 << 4),
69 /*18 */ VTRECV_ACTION_EXECUTE | (0 << 4),
70 /*19 */ VTRECV_ACTION_EXECUTE | (0 << 4),
71 /*20 */ VTRECV_ACTION_EXECUTE | (0 << 4),
72 /*21 */ VTRECV_ACTION_EXECUTE | (0 << 4),
73 /*22 */ VTRECV_ACTION_EXECUTE | (0 << 4),
74 /*23 */ VTRECV_ACTION_EXECUTE | (0 << 4),
75 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
76 /*25 */ VTRECV_ACTION_EXECUTE | (0 << 4),
77 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
78 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
79 /*28 */ VTRECV_ACTION_EXECUTE | (0 << 4),
80 /*29 */ VTRECV_ACTION_EXECUTE | (0 << 4),
81 /*30 */ VTRECV_ACTION_EXECUTE | (0 << 4),
82 /*31 */ VTRECV_ACTION_EXECUTE | (0 << 4),
83 /*32 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
84 /*33 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
85 /*34 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
86 /*35 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
87 /*36 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
88 /*37 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
89 /*38 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
90 /*39 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
91 /*40 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
92 /*41 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
93 /*42 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
94 /*43 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
95 /*44 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
96 /*45 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
97 /*46 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
98 /*47 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
99 /*48 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
100 /*49 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
101 /*50 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
102 /*51 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
103 /*52 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
104 /*53 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
105 /*54 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
106 /*55 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
107 /*56 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
108 /*57 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
109 /*58 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
110 /*59 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4),
111 /*60 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_PARAM << 4),
112 /*61 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_PARAM << 4),
113 /*62 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_PARAM << 4),
114 /*63 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_PARAM << 4),
115 /*64 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
116 /*65 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
117 /*66 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
118 /*67 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
119 /*68 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
120 /*69 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
121 /*70 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
122 /*71 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
123 /*72 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
124 /*73 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
125 /*74 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
126 /*75 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
127 /*76 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
128 /*77 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
129 /*78 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
130 /*79 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
131 /*80 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
132 /*81 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
133 /*82 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
134 /*83 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
135 /*84 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
136 /*85 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
137 /*86 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
138 /*87 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
139 /*88 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
140 /*89 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
141 /*90 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
142 /*91 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
143 /*92 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
144 /*93 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
145 /*94 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
146 /*95 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
147 /*96 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
148 /*97 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
149 /*98 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
150 /*99 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
151 /*100*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
152 /*101*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
153 /*102*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
154 /*103*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
155 /*104*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
156 /*105*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
157 /*106*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
158 /*107*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
159 /*108*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
160 /*109*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
161 /*110*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
162 /*111*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
163 /*112*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
164 /*113*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
165 /*114*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
166 /*115*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
167 /*116*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
168 /*117*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
169 /*118*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
170 /*119*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
171 /*120*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
172 /*121*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
173 /*122*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
174 /*123*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
175 /*124*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
176 /*125*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
177 /*126*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
178 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
179 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
180 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
181 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
182 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
183 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
184 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
185 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
186 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
187 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
188 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
189 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
190 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
191 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
192 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
193 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
194 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
195 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
196 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
197 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
198 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
199 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
200 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
201 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
202 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
203 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
204 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
205 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
206 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
207 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
208 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
209 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
210 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
211 },
212 { /* VTRECV_STATE_CSI_IGNORE = 1 */
213 /*0 */ VTRECV_ACTION_EXECUTE | (0 << 4),
214 /*1 */ VTRECV_ACTION_EXECUTE | (0 << 4),
215 /*2 */ VTRECV_ACTION_EXECUTE | (0 << 4),
216 /*3 */ VTRECV_ACTION_EXECUTE | (0 << 4),
217 /*4 */ VTRECV_ACTION_EXECUTE | (0 << 4),
218 /*5 */ VTRECV_ACTION_EXECUTE | (0 << 4),
219 /*6 */ VTRECV_ACTION_EXECUTE | (0 << 4),
220 /*7 */ VTRECV_ACTION_EXECUTE | (0 << 4),
221 /*8 */ VTRECV_ACTION_EXECUTE | (0 << 4),
222 /*9 */ VTRECV_ACTION_EXECUTE | (0 << 4),
223 /*10 */ VTRECV_ACTION_EXECUTE | (0 << 4),
224 /*11 */ VTRECV_ACTION_EXECUTE | (0 << 4),
225 /*12 */ VTRECV_ACTION_EXECUTE | (0 << 4),
226 /*13 */ VTRECV_ACTION_EXECUTE | (0 << 4),
227 /*14 */ VTRECV_ACTION_EXECUTE | (0 << 4),
228 /*15 */ VTRECV_ACTION_EXECUTE | (0 << 4),
229 /*16 */ VTRECV_ACTION_EXECUTE | (0 << 4),
230 /*17 */ VTRECV_ACTION_EXECUTE | (0 << 4),
231 /*18 */ VTRECV_ACTION_EXECUTE | (0 << 4),
232 /*19 */ VTRECV_ACTION_EXECUTE | (0 << 4),
233 /*20 */ VTRECV_ACTION_EXECUTE | (0 << 4),
234 /*21 */ VTRECV_ACTION_EXECUTE | (0 << 4),
235 /*22 */ VTRECV_ACTION_EXECUTE | (0 << 4),
236 /*23 */ VTRECV_ACTION_EXECUTE | (0 << 4),
237 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
238 /*25 */ VTRECV_ACTION_EXECUTE | (0 << 4),
239 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
240 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
241 /*28 */ VTRECV_ACTION_EXECUTE | (0 << 4),
242 /*29 */ VTRECV_ACTION_EXECUTE | (0 << 4),
243 /*30 */ VTRECV_ACTION_EXECUTE | (0 << 4),
244 /*31 */ VTRECV_ACTION_EXECUTE | (0 << 4),
245 /*32 */ VTRECV_ACTION_IGNORE | (0 << 4),
246 /*33 */ VTRECV_ACTION_IGNORE | (0 << 4),
247 /*34 */ VTRECV_ACTION_IGNORE | (0 << 4),
248 /*35 */ VTRECV_ACTION_IGNORE | (0 << 4),
249 /*36 */ VTRECV_ACTION_IGNORE | (0 << 4),
250 /*37 */ VTRECV_ACTION_IGNORE | (0 << 4),
251 /*38 */ VTRECV_ACTION_IGNORE | (0 << 4),
252 /*39 */ VTRECV_ACTION_IGNORE | (0 << 4),
253 /*40 */ VTRECV_ACTION_IGNORE | (0 << 4),
254 /*41 */ VTRECV_ACTION_IGNORE | (0 << 4),
255 /*42 */ VTRECV_ACTION_IGNORE | (0 << 4),
256 /*43 */ VTRECV_ACTION_IGNORE | (0 << 4),
257 /*44 */ VTRECV_ACTION_IGNORE | (0 << 4),
258 /*45 */ VTRECV_ACTION_IGNORE | (0 << 4),
259 /*46 */ VTRECV_ACTION_IGNORE | (0 << 4),
260 /*47 */ VTRECV_ACTION_IGNORE | (0 << 4),
261 /*48 */ VTRECV_ACTION_IGNORE | (0 << 4),
262 /*49 */ VTRECV_ACTION_IGNORE | (0 << 4),
263 /*50 */ VTRECV_ACTION_IGNORE | (0 << 4),
264 /*51 */ VTRECV_ACTION_IGNORE | (0 << 4),
265 /*52 */ VTRECV_ACTION_IGNORE | (0 << 4),
266 /*53 */ VTRECV_ACTION_IGNORE | (0 << 4),
267 /*54 */ VTRECV_ACTION_IGNORE | (0 << 4),
268 /*55 */ VTRECV_ACTION_IGNORE | (0 << 4),
269 /*56 */ VTRECV_ACTION_IGNORE | (0 << 4),
270 /*57 */ VTRECV_ACTION_IGNORE | (0 << 4),
271 /*58 */ VTRECV_ACTION_IGNORE | (0 << 4),
272 /*59 */ VTRECV_ACTION_IGNORE | (0 << 4),
273 /*60 */ VTRECV_ACTION_IGNORE | (0 << 4),
274 /*61 */ VTRECV_ACTION_IGNORE | (0 << 4),
275 /*62 */ VTRECV_ACTION_IGNORE | (0 << 4),
276 /*63 */ VTRECV_ACTION_IGNORE | (0 << 4),
277 /*64 */ 0 | (VTRECV_STATE_GROUND << 4),
278 /*65 */ 0 | (VTRECV_STATE_GROUND << 4),
279 /*66 */ 0 | (VTRECV_STATE_GROUND << 4),
280 /*67 */ 0 | (VTRECV_STATE_GROUND << 4),
281 /*68 */ 0 | (VTRECV_STATE_GROUND << 4),
282 /*69 */ 0 | (VTRECV_STATE_GROUND << 4),
283 /*70 */ 0 | (VTRECV_STATE_GROUND << 4),
284 /*71 */ 0 | (VTRECV_STATE_GROUND << 4),
285 /*72 */ 0 | (VTRECV_STATE_GROUND << 4),
286 /*73 */ 0 | (VTRECV_STATE_GROUND << 4),
287 /*74 */ 0 | (VTRECV_STATE_GROUND << 4),
288 /*75 */ 0 | (VTRECV_STATE_GROUND << 4),
289 /*76 */ 0 | (VTRECV_STATE_GROUND << 4),
290 /*77 */ 0 | (VTRECV_STATE_GROUND << 4),
291 /*78 */ 0 | (VTRECV_STATE_GROUND << 4),
292 /*79 */ 0 | (VTRECV_STATE_GROUND << 4),
293 /*80 */ 0 | (VTRECV_STATE_GROUND << 4),
294 /*81 */ 0 | (VTRECV_STATE_GROUND << 4),
295 /*82 */ 0 | (VTRECV_STATE_GROUND << 4),
296 /*83 */ 0 | (VTRECV_STATE_GROUND << 4),
297 /*84 */ 0 | (VTRECV_STATE_GROUND << 4),
298 /*85 */ 0 | (VTRECV_STATE_GROUND << 4),
299 /*86 */ 0 | (VTRECV_STATE_GROUND << 4),
300 /*87 */ 0 | (VTRECV_STATE_GROUND << 4),
301 /*88 */ 0 | (VTRECV_STATE_GROUND << 4),
302 /*89 */ 0 | (VTRECV_STATE_GROUND << 4),
303 /*90 */ 0 | (VTRECV_STATE_GROUND << 4),
304 /*91 */ 0 | (VTRECV_STATE_GROUND << 4),
305 /*92 */ 0 | (VTRECV_STATE_GROUND << 4),
306 /*93 */ 0 | (VTRECV_STATE_GROUND << 4),
307 /*94 */ 0 | (VTRECV_STATE_GROUND << 4),
308 /*95 */ 0 | (VTRECV_STATE_GROUND << 4),
309 /*96 */ 0 | (VTRECV_STATE_GROUND << 4),
310 /*97 */ 0 | (VTRECV_STATE_GROUND << 4),
311 /*98 */ 0 | (VTRECV_STATE_GROUND << 4),
312 /*99 */ 0 | (VTRECV_STATE_GROUND << 4),
313 /*100*/ 0 | (VTRECV_STATE_GROUND << 4),
314 /*101*/ 0 | (VTRECV_STATE_GROUND << 4),
315 /*102*/ 0 | (VTRECV_STATE_GROUND << 4),
316 /*103*/ 0 | (VTRECV_STATE_GROUND << 4),
317 /*104*/ 0 | (VTRECV_STATE_GROUND << 4),
318 /*105*/ 0 | (VTRECV_STATE_GROUND << 4),
319 /*106*/ 0 | (VTRECV_STATE_GROUND << 4),
320 /*107*/ 0 | (VTRECV_STATE_GROUND << 4),
321 /*108*/ 0 | (VTRECV_STATE_GROUND << 4),
322 /*109*/ 0 | (VTRECV_STATE_GROUND << 4),
323 /*110*/ 0 | (VTRECV_STATE_GROUND << 4),
324 /*111*/ 0 | (VTRECV_STATE_GROUND << 4),
325 /*112*/ 0 | (VTRECV_STATE_GROUND << 4),
326 /*113*/ 0 | (VTRECV_STATE_GROUND << 4),
327 /*114*/ 0 | (VTRECV_STATE_GROUND << 4),
328 /*115*/ 0 | (VTRECV_STATE_GROUND << 4),
329 /*116*/ 0 | (VTRECV_STATE_GROUND << 4),
330 /*117*/ 0 | (VTRECV_STATE_GROUND << 4),
331 /*118*/ 0 | (VTRECV_STATE_GROUND << 4),
332 /*119*/ 0 | (VTRECV_STATE_GROUND << 4),
333 /*120*/ 0 | (VTRECV_STATE_GROUND << 4),
334 /*121*/ 0 | (VTRECV_STATE_GROUND << 4),
335 /*122*/ 0 | (VTRECV_STATE_GROUND << 4),
336 /*123*/ 0 | (VTRECV_STATE_GROUND << 4),
337 /*124*/ 0 | (VTRECV_STATE_GROUND << 4),
338 /*125*/ 0 | (VTRECV_STATE_GROUND << 4),
339 /*126*/ 0 | (VTRECV_STATE_GROUND << 4),
340 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
341 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
342 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
343 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
344 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
345 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
346 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
347 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
348 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
349 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
350 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
351 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
352 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
353 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
354 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
355 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
356 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
357 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
358 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
359 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
360 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
361 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
362 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
363 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
364 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
365 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
366 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
367 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
368 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
369 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
370 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
371 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
372 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
373 },
374 { /* VTRECV_STATE_CSI_INTERMEDIATE = 2 */
375 /*0 */ VTRECV_ACTION_EXECUTE | (0 << 4),
376 /*1 */ VTRECV_ACTION_EXECUTE | (0 << 4),
377 /*2 */ VTRECV_ACTION_EXECUTE | (0 << 4),
378 /*3 */ VTRECV_ACTION_EXECUTE | (0 << 4),
379 /*4 */ VTRECV_ACTION_EXECUTE | (0 << 4),
380 /*5 */ VTRECV_ACTION_EXECUTE | (0 << 4),
381 /*6 */ VTRECV_ACTION_EXECUTE | (0 << 4),
382 /*7 */ VTRECV_ACTION_EXECUTE | (0 << 4),
383 /*8 */ VTRECV_ACTION_EXECUTE | (0 << 4),
384 /*9 */ VTRECV_ACTION_EXECUTE | (0 << 4),
385 /*10 */ VTRECV_ACTION_EXECUTE | (0 << 4),
386 /*11 */ VTRECV_ACTION_EXECUTE | (0 << 4),
387 /*12 */ VTRECV_ACTION_EXECUTE | (0 << 4),
388 /*13 */ VTRECV_ACTION_EXECUTE | (0 << 4),
389 /*14 */ VTRECV_ACTION_EXECUTE | (0 << 4),
390 /*15 */ VTRECV_ACTION_EXECUTE | (0 << 4),
391 /*16 */ VTRECV_ACTION_EXECUTE | (0 << 4),
392 /*17 */ VTRECV_ACTION_EXECUTE | (0 << 4),
393 /*18 */ VTRECV_ACTION_EXECUTE | (0 << 4),
394 /*19 */ VTRECV_ACTION_EXECUTE | (0 << 4),
395 /*20 */ VTRECV_ACTION_EXECUTE | (0 << 4),
396 /*21 */ VTRECV_ACTION_EXECUTE | (0 << 4),
397 /*22 */ VTRECV_ACTION_EXECUTE | (0 << 4),
398 /*23 */ VTRECV_ACTION_EXECUTE | (0 << 4),
399 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
400 /*25 */ VTRECV_ACTION_EXECUTE | (0 << 4),
401 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
402 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
403 /*28 */ VTRECV_ACTION_EXECUTE | (0 << 4),
404 /*29 */ VTRECV_ACTION_EXECUTE | (0 << 4),
405 /*30 */ VTRECV_ACTION_EXECUTE | (0 << 4),
406 /*31 */ VTRECV_ACTION_EXECUTE | (0 << 4),
407 /*32 */ VTRECV_ACTION_COLLECT | (0 << 4),
408 /*33 */ VTRECV_ACTION_COLLECT | (0 << 4),
409 /*34 */ VTRECV_ACTION_COLLECT | (0 << 4),
410 /*35 */ VTRECV_ACTION_COLLECT | (0 << 4),
411 /*36 */ VTRECV_ACTION_COLLECT | (0 << 4),
412 /*37 */ VTRECV_ACTION_COLLECT | (0 << 4),
413 /*38 */ VTRECV_ACTION_COLLECT | (0 << 4),
414 /*39 */ VTRECV_ACTION_COLLECT | (0 << 4),
415 /*40 */ VTRECV_ACTION_COLLECT | (0 << 4),
416 /*41 */ VTRECV_ACTION_COLLECT | (0 << 4),
417 /*42 */ VTRECV_ACTION_COLLECT | (0 << 4),
418 /*43 */ VTRECV_ACTION_COLLECT | (0 << 4),
419 /*44 */ VTRECV_ACTION_COLLECT | (0 << 4),
420 /*45 */ VTRECV_ACTION_COLLECT | (0 << 4),
421 /*46 */ VTRECV_ACTION_COLLECT | (0 << 4),
422 /*47 */ VTRECV_ACTION_COLLECT | (0 << 4),
423 /*48 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
424 /*49 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
425 /*50 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
426 /*51 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
427 /*52 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
428 /*53 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
429 /*54 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
430 /*55 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
431 /*56 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
432 /*57 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
433 /*58 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
434 /*59 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
435 /*60 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
436 /*61 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
437 /*62 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
438 /*63 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
439 /*64 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
440 /*65 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
441 /*66 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
442 /*67 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
443 /*68 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
444 /*69 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
445 /*70 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
446 /*71 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
447 /*72 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
448 /*73 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
449 /*74 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
450 /*75 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
451 /*76 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
452 /*77 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
453 /*78 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
454 /*79 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
455 /*80 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
456 /*81 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
457 /*82 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
458 /*83 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
459 /*84 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
460 /*85 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
461 /*86 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
462 /*87 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
463 /*88 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
464 /*89 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
465 /*90 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
466 /*91 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
467 /*92 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
468 /*93 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
469 /*94 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
470 /*95 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
471 /*96 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
472 /*97 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
473 /*98 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
474 /*99 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
475 /*100*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
476 /*101*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
477 /*102*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
478 /*103*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
479 /*104*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
480 /*105*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
481 /*106*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
482 /*107*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
483 /*108*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
484 /*109*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
485 /*110*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
486 /*111*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
487 /*112*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
488 /*113*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
489 /*114*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
490 /*115*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
491 /*116*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
492 /*117*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
493 /*118*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
494 /*119*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
495 /*120*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
496 /*121*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
497 /*122*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
498 /*123*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
499 /*124*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
500 /*125*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
501 /*126*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
502 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
503 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
504 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
505 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
506 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
507 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
508 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
509 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
510 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
511 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
512 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
513 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
514 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
515 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
516 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
517 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
518 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
519 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
520 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
521 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
522 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
523 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
524 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
525 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
526 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
527 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
528 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
529 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
530 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
531 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
532 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
533 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
534 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
535 },
536 { /* VTRECV_STATE_CSI_PARAM = 3 */
537 /*0 */ VTRECV_ACTION_EXECUTE | (0 << 4),
538 /*1 */ VTRECV_ACTION_EXECUTE | (0 << 4),
539 /*2 */ VTRECV_ACTION_EXECUTE | (0 << 4),
540 /*3 */ VTRECV_ACTION_EXECUTE | (0 << 4),
541 /*4 */ VTRECV_ACTION_EXECUTE | (0 << 4),
542 /*5 */ VTRECV_ACTION_EXECUTE | (0 << 4),
543 /*6 */ VTRECV_ACTION_EXECUTE | (0 << 4),
544 /*7 */ VTRECV_ACTION_EXECUTE | (0 << 4),
545 /*8 */ VTRECV_ACTION_EXECUTE | (0 << 4),
546 /*9 */ VTRECV_ACTION_EXECUTE | (0 << 4),
547 /*10 */ VTRECV_ACTION_EXECUTE | (0 << 4),
548 /*11 */ VTRECV_ACTION_EXECUTE | (0 << 4),
549 /*12 */ VTRECV_ACTION_EXECUTE | (0 << 4),
550 /*13 */ VTRECV_ACTION_EXECUTE | (0 << 4),
551 /*14 */ VTRECV_ACTION_EXECUTE | (0 << 4),
552 /*15 */ VTRECV_ACTION_EXECUTE | (0 << 4),
553 /*16 */ VTRECV_ACTION_EXECUTE | (0 << 4),
554 /*17 */ VTRECV_ACTION_EXECUTE | (0 << 4),
555 /*18 */ VTRECV_ACTION_EXECUTE | (0 << 4),
556 /*19 */ VTRECV_ACTION_EXECUTE | (0 << 4),
557 /*20 */ VTRECV_ACTION_EXECUTE | (0 << 4),
558 /*21 */ VTRECV_ACTION_EXECUTE | (0 << 4),
559 /*22 */ VTRECV_ACTION_EXECUTE | (0 << 4),
560 /*23 */ VTRECV_ACTION_EXECUTE | (0 << 4),
561 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
562 /*25 */ VTRECV_ACTION_EXECUTE | (0 << 4),
563 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
564 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
565 /*28 */ VTRECV_ACTION_EXECUTE | (0 << 4),
566 /*29 */ VTRECV_ACTION_EXECUTE | (0 << 4),
567 /*30 */ VTRECV_ACTION_EXECUTE | (0 << 4),
568 /*31 */ VTRECV_ACTION_EXECUTE | (0 << 4),
569 /*32 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
570 /*33 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
571 /*34 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
572 /*35 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
573 /*36 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
574 /*37 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
575 /*38 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
576 /*39 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
577 /*40 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
578 /*41 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
579 /*42 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
580 /*43 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
581 /*44 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
582 /*45 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
583 /*46 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
584 /*47 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4),
585 /*48 */ VTRECV_ACTION_PARAM | (0 << 4),
586 /*49 */ VTRECV_ACTION_PARAM | (0 << 4),
587 /*50 */ VTRECV_ACTION_PARAM | (0 << 4),
588 /*51 */ VTRECV_ACTION_PARAM | (0 << 4),
589 /*52 */ VTRECV_ACTION_PARAM | (0 << 4),
590 /*53 */ VTRECV_ACTION_PARAM | (0 << 4),
591 /*54 */ VTRECV_ACTION_PARAM | (0 << 4),
592 /*55 */ VTRECV_ACTION_PARAM | (0 << 4),
593 /*56 */ VTRECV_ACTION_PARAM | (0 << 4),
594 /*57 */ VTRECV_ACTION_PARAM | (0 << 4),
595 /*58 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
596 /*59 */ VTRECV_ACTION_PARAM | (0 << 4),
597 /*60 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
598 /*61 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
599 /*62 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
600 /*63 */ 0 | (VTRECV_STATE_CSI_IGNORE << 4),
601 /*64 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
602 /*65 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
603 /*66 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
604 /*67 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
605 /*68 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
606 /*69 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
607 /*70 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
608 /*71 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
609 /*72 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
610 /*73 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
611 /*74 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
612 /*75 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
613 /*76 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
614 /*77 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
615 /*78 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
616 /*79 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
617 /*80 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
618 /*81 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
619 /*82 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
620 /*83 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
621 /*84 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
622 /*85 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
623 /*86 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
624 /*87 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
625 /*88 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
626 /*89 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
627 /*90 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
628 /*91 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
629 /*92 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
630 /*93 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
631 /*94 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
632 /*95 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
633 /*96 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
634 /*97 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
635 /*98 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
636 /*99 */ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
637 /*100*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
638 /*101*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
639 /*102*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
640 /*103*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
641 /*104*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
642 /*105*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
643 /*106*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
644 /*107*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
645 /*108*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
646 /*109*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
647 /*110*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
648 /*111*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
649 /*112*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
650 /*113*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
651 /*114*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
652 /*115*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
653 /*116*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
654 /*117*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
655 /*118*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
656 /*119*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
657 /*120*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
658 /*121*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
659 /*122*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
660 /*123*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
661 /*124*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
662 /*125*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
663 /*126*/ VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4),
664 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
665 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
666 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
667 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
668 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
669 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
670 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
671 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
672 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
673 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
674 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
675 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
676 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
677 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
678 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
679 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
680 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
681 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
682 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
683 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
684 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
685 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
686 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
687 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
688 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
689 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
690 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
691 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
692 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
693 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
694 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
695 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
696 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
697 },
698 { /* VTRECV_STATE_DCS_ENTRY = 4 */
699 /*0 */ VTRECV_ACTION_IGNORE | (0 << 4),
700 /*1 */ VTRECV_ACTION_IGNORE | (0 << 4),
701 /*2 */ VTRECV_ACTION_IGNORE | (0 << 4),
702 /*3 */ VTRECV_ACTION_IGNORE | (0 << 4),
703 /*4 */ VTRECV_ACTION_IGNORE | (0 << 4),
704 /*5 */ VTRECV_ACTION_IGNORE | (0 << 4),
705 /*6 */ VTRECV_ACTION_IGNORE | (0 << 4),
706 /*7 */ VTRECV_ACTION_IGNORE | (0 << 4),
707 /*8 */ VTRECV_ACTION_IGNORE | (0 << 4),
708 /*9 */ VTRECV_ACTION_IGNORE | (0 << 4),
709 /*10 */ VTRECV_ACTION_IGNORE | (0 << 4),
710 /*11 */ VTRECV_ACTION_IGNORE | (0 << 4),
711 /*12 */ VTRECV_ACTION_IGNORE | (0 << 4),
712 /*13 */ VTRECV_ACTION_IGNORE | (0 << 4),
713 /*14 */ VTRECV_ACTION_IGNORE | (0 << 4),
714 /*15 */ VTRECV_ACTION_IGNORE | (0 << 4),
715 /*16 */ VTRECV_ACTION_IGNORE | (0 << 4),
716 /*17 */ VTRECV_ACTION_IGNORE | (0 << 4),
717 /*18 */ VTRECV_ACTION_IGNORE | (0 << 4),
718 /*19 */ VTRECV_ACTION_IGNORE | (0 << 4),
719 /*20 */ VTRECV_ACTION_IGNORE | (0 << 4),
720 /*21 */ VTRECV_ACTION_IGNORE | (0 << 4),
721 /*22 */ VTRECV_ACTION_IGNORE | (0 << 4),
722 /*23 */ VTRECV_ACTION_IGNORE | (0 << 4),
723 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
724 /*25 */ VTRECV_ACTION_IGNORE | (0 << 4),
725 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
726 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
727 /*28 */ VTRECV_ACTION_IGNORE | (0 << 4),
728 /*29 */ VTRECV_ACTION_IGNORE | (0 << 4),
729 /*30 */ VTRECV_ACTION_IGNORE | (0 << 4),
730 /*31 */ VTRECV_ACTION_IGNORE | (0 << 4),
731 /*32 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
732 /*33 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
733 /*34 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
734 /*35 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
735 /*36 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
736 /*37 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
737 /*38 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
738 /*39 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
739 /*40 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
740 /*41 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
741 /*42 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
742 /*43 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
743 /*44 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
744 /*45 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
745 /*46 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
746 /*47 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
747 /*48 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
748 /*49 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
749 /*50 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
750 /*51 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
751 /*52 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
752 /*53 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
753 /*54 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
754 /*55 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
755 /*56 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
756 /*57 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
757 /*58 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
758 /*59 */ VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4),
759 /*60 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_PARAM << 4),
760 /*61 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_PARAM << 4),
761 /*62 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_PARAM << 4),
762 /*63 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_PARAM << 4),
763 /*64 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
764 /*65 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
765 /*66 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
766 /*67 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
767 /*68 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
768 /*69 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
769 /*70 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
770 /*71 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
771 /*72 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
772 /*73 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
773 /*74 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
774 /*75 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
775 /*76 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
776 /*77 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
777 /*78 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
778 /*79 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
779 /*80 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
780 /*81 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
781 /*82 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
782 /*83 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
783 /*84 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
784 /*85 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
785 /*86 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
786 /*87 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
787 /*88 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
788 /*89 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
789 /*90 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
790 /*91 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
791 /*92 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
792 /*93 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
793 /*94 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
794 /*95 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
795 /*96 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
796 /*97 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
797 /*98 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
798 /*99 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
799 /*100*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
800 /*101*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
801 /*102*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
802 /*103*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
803 /*104*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
804 /*105*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
805 /*106*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
806 /*107*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
807 /*108*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
808 /*109*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
809 /*110*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
810 /*111*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
811 /*112*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
812 /*113*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
813 /*114*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
814 /*115*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
815 /*116*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
816 /*117*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
817 /*118*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
818 /*119*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
819 /*120*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
820 /*121*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
821 /*122*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
822 /*123*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
823 /*124*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
824 /*125*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
825 /*126*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
826 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
827 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
828 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
829 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
830 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
831 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
832 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
833 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
834 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
835 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
836 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
837 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
838 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
839 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
840 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
841 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
842 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
843 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
844 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
845 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
846 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
847 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
848 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
849 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
850 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
851 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
852 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
853 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
854 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
855 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
856 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
857 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
858 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
859 },
860 { /* VTRECV_STATE_DCS_IGNORE = 5 */
861 /*0 */ VTRECV_ACTION_IGNORE | (0 << 4),
862 /*1 */ VTRECV_ACTION_IGNORE | (0 << 4),
863 /*2 */ VTRECV_ACTION_IGNORE | (0 << 4),
864 /*3 */ VTRECV_ACTION_IGNORE | (0 << 4),
865 /*4 */ VTRECV_ACTION_IGNORE | (0 << 4),
866 /*5 */ VTRECV_ACTION_IGNORE | (0 << 4),
867 /*6 */ VTRECV_ACTION_IGNORE | (0 << 4),
868 /*7 */ VTRECV_ACTION_IGNORE | (0 << 4),
869 /*8 */ VTRECV_ACTION_IGNORE | (0 << 4),
870 /*9 */ VTRECV_ACTION_IGNORE | (0 << 4),
871 /*10 */ VTRECV_ACTION_IGNORE | (0 << 4),
872 /*11 */ VTRECV_ACTION_IGNORE | (0 << 4),
873 /*12 */ VTRECV_ACTION_IGNORE | (0 << 4),
874 /*13 */ VTRECV_ACTION_IGNORE | (0 << 4),
875 /*14 */ VTRECV_ACTION_IGNORE | (0 << 4),
876 /*15 */ VTRECV_ACTION_IGNORE | (0 << 4),
877 /*16 */ VTRECV_ACTION_IGNORE | (0 << 4),
878 /*17 */ VTRECV_ACTION_IGNORE | (0 << 4),
879 /*18 */ VTRECV_ACTION_IGNORE | (0 << 4),
880 /*19 */ VTRECV_ACTION_IGNORE | (0 << 4),
881 /*20 */ VTRECV_ACTION_IGNORE | (0 << 4),
882 /*21 */ VTRECV_ACTION_IGNORE | (0 << 4),
883 /*22 */ VTRECV_ACTION_IGNORE | (0 << 4),
884 /*23 */ VTRECV_ACTION_IGNORE | (0 << 4),
885 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
886 /*25 */ VTRECV_ACTION_IGNORE | (0 << 4),
887 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
888 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
889 /*28 */ VTRECV_ACTION_IGNORE | (0 << 4),
890 /*29 */ VTRECV_ACTION_IGNORE | (0 << 4),
891 /*30 */ VTRECV_ACTION_IGNORE | (0 << 4),
892 /*31 */ VTRECV_ACTION_IGNORE | (0 << 4),
893 /*32 */ VTRECV_ACTION_IGNORE | (0 << 4),
894 /*33 */ VTRECV_ACTION_IGNORE | (0 << 4),
895 /*34 */ VTRECV_ACTION_IGNORE | (0 << 4),
896 /*35 */ VTRECV_ACTION_IGNORE | (0 << 4),
897 /*36 */ VTRECV_ACTION_IGNORE | (0 << 4),
898 /*37 */ VTRECV_ACTION_IGNORE | (0 << 4),
899 /*38 */ VTRECV_ACTION_IGNORE | (0 << 4),
900 /*39 */ VTRECV_ACTION_IGNORE | (0 << 4),
901 /*40 */ VTRECV_ACTION_IGNORE | (0 << 4),
902 /*41 */ VTRECV_ACTION_IGNORE | (0 << 4),
903 /*42 */ VTRECV_ACTION_IGNORE | (0 << 4),
904 /*43 */ VTRECV_ACTION_IGNORE | (0 << 4),
905 /*44 */ VTRECV_ACTION_IGNORE | (0 << 4),
906 /*45 */ VTRECV_ACTION_IGNORE | (0 << 4),
907 /*46 */ VTRECV_ACTION_IGNORE | (0 << 4),
908 /*47 */ VTRECV_ACTION_IGNORE | (0 << 4),
909 /*48 */ VTRECV_ACTION_IGNORE | (0 << 4),
910 /*49 */ VTRECV_ACTION_IGNORE | (0 << 4),
911 /*50 */ VTRECV_ACTION_IGNORE | (0 << 4),
912 /*51 */ VTRECV_ACTION_IGNORE | (0 << 4),
913 /*52 */ VTRECV_ACTION_IGNORE | (0 << 4),
914 /*53 */ VTRECV_ACTION_IGNORE | (0 << 4),
915 /*54 */ VTRECV_ACTION_IGNORE | (0 << 4),
916 /*55 */ VTRECV_ACTION_IGNORE | (0 << 4),
917 /*56 */ VTRECV_ACTION_IGNORE | (0 << 4),
918 /*57 */ VTRECV_ACTION_IGNORE | (0 << 4),
919 /*58 */ VTRECV_ACTION_IGNORE | (0 << 4),
920 /*59 */ VTRECV_ACTION_IGNORE | (0 << 4),
921 /*60 */ VTRECV_ACTION_IGNORE | (0 << 4),
922 /*61 */ VTRECV_ACTION_IGNORE | (0 << 4),
923 /*62 */ VTRECV_ACTION_IGNORE | (0 << 4),
924 /*63 */ VTRECV_ACTION_IGNORE | (0 << 4),
925 /*64 */ VTRECV_ACTION_IGNORE | (0 << 4),
926 /*65 */ VTRECV_ACTION_IGNORE | (0 << 4),
927 /*66 */ VTRECV_ACTION_IGNORE | (0 << 4),
928 /*67 */ VTRECV_ACTION_IGNORE | (0 << 4),
929 /*68 */ VTRECV_ACTION_IGNORE | (0 << 4),
930 /*69 */ VTRECV_ACTION_IGNORE | (0 << 4),
931 /*70 */ VTRECV_ACTION_IGNORE | (0 << 4),
932 /*71 */ VTRECV_ACTION_IGNORE | (0 << 4),
933 /*72 */ VTRECV_ACTION_IGNORE | (0 << 4),
934 /*73 */ VTRECV_ACTION_IGNORE | (0 << 4),
935 /*74 */ VTRECV_ACTION_IGNORE | (0 << 4),
936 /*75 */ VTRECV_ACTION_IGNORE | (0 << 4),
937 /*76 */ VTRECV_ACTION_IGNORE | (0 << 4),
938 /*77 */ VTRECV_ACTION_IGNORE | (0 << 4),
939 /*78 */ VTRECV_ACTION_IGNORE | (0 << 4),
940 /*79 */ VTRECV_ACTION_IGNORE | (0 << 4),
941 /*80 */ VTRECV_ACTION_IGNORE | (0 << 4),
942 /*81 */ VTRECV_ACTION_IGNORE | (0 << 4),
943 /*82 */ VTRECV_ACTION_IGNORE | (0 << 4),
944 /*83 */ VTRECV_ACTION_IGNORE | (0 << 4),
945 /*84 */ VTRECV_ACTION_IGNORE | (0 << 4),
946 /*85 */ VTRECV_ACTION_IGNORE | (0 << 4),
947 /*86 */ VTRECV_ACTION_IGNORE | (0 << 4),
948 /*87 */ VTRECV_ACTION_IGNORE | (0 << 4),
949 /*88 */ VTRECV_ACTION_IGNORE | (0 << 4),
950 /*89 */ VTRECV_ACTION_IGNORE | (0 << 4),
951 /*90 */ VTRECV_ACTION_IGNORE | (0 << 4),
952 /*91 */ VTRECV_ACTION_IGNORE | (0 << 4),
953 /*92 */ VTRECV_ACTION_IGNORE | (0 << 4),
954 /*93 */ VTRECV_ACTION_IGNORE | (0 << 4),
955 /*94 */ VTRECV_ACTION_IGNORE | (0 << 4),
956 /*95 */ VTRECV_ACTION_IGNORE | (0 << 4),
957 /*96 */ VTRECV_ACTION_IGNORE | (0 << 4),
958 /*97 */ VTRECV_ACTION_IGNORE | (0 << 4),
959 /*98 */ VTRECV_ACTION_IGNORE | (0 << 4),
960 /*99 */ VTRECV_ACTION_IGNORE | (0 << 4),
961 /*100*/ VTRECV_ACTION_IGNORE | (0 << 4),
962 /*101*/ VTRECV_ACTION_IGNORE | (0 << 4),
963 /*102*/ VTRECV_ACTION_IGNORE | (0 << 4),
964 /*103*/ VTRECV_ACTION_IGNORE | (0 << 4),
965 /*104*/ VTRECV_ACTION_IGNORE | (0 << 4),
966 /*105*/ VTRECV_ACTION_IGNORE | (0 << 4),
967 /*106*/ VTRECV_ACTION_IGNORE | (0 << 4),
968 /*107*/ VTRECV_ACTION_IGNORE | (0 << 4),
969 /*108*/ VTRECV_ACTION_IGNORE | (0 << 4),
970 /*109*/ VTRECV_ACTION_IGNORE | (0 << 4),
971 /*110*/ VTRECV_ACTION_IGNORE | (0 << 4),
972 /*111*/ VTRECV_ACTION_IGNORE | (0 << 4),
973 /*112*/ VTRECV_ACTION_IGNORE | (0 << 4),
974 /*113*/ VTRECV_ACTION_IGNORE | (0 << 4),
975 /*114*/ VTRECV_ACTION_IGNORE | (0 << 4),
976 /*115*/ VTRECV_ACTION_IGNORE | (0 << 4),
977 /*116*/ VTRECV_ACTION_IGNORE | (0 << 4),
978 /*117*/ VTRECV_ACTION_IGNORE | (0 << 4),
979 /*118*/ VTRECV_ACTION_IGNORE | (0 << 4),
980 /*119*/ VTRECV_ACTION_IGNORE | (0 << 4),
981 /*120*/ VTRECV_ACTION_IGNORE | (0 << 4),
982 /*121*/ VTRECV_ACTION_IGNORE | (0 << 4),
983 /*122*/ VTRECV_ACTION_IGNORE | (0 << 4),
984 /*123*/ VTRECV_ACTION_IGNORE | (0 << 4),
985 /*124*/ VTRECV_ACTION_IGNORE | (0 << 4),
986 /*125*/ VTRECV_ACTION_IGNORE | (0 << 4),
987 /*126*/ VTRECV_ACTION_IGNORE | (0 << 4),
988 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
989 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
990 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
991 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
992 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
993 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
994 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
995 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
996 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
997 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
998 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
999 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1000 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1001 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1002 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1003 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1004 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1005 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
1006 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1007 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1008 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1009 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1010 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1011 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1012 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1013 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1014 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1015 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1016 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
1017 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
1018 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
1019 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1020 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1021 },
1022 { /* VTRECV_STATE_DCS_INTERMEDIATE = 6 */
1023 /*0 */ VTRECV_ACTION_IGNORE | (0 << 4),
1024 /*1 */ VTRECV_ACTION_IGNORE | (0 << 4),
1025 /*2 */ VTRECV_ACTION_IGNORE | (0 << 4),
1026 /*3 */ VTRECV_ACTION_IGNORE | (0 << 4),
1027 /*4 */ VTRECV_ACTION_IGNORE | (0 << 4),
1028 /*5 */ VTRECV_ACTION_IGNORE | (0 << 4),
1029 /*6 */ VTRECV_ACTION_IGNORE | (0 << 4),
1030 /*7 */ VTRECV_ACTION_IGNORE | (0 << 4),
1031 /*8 */ VTRECV_ACTION_IGNORE | (0 << 4),
1032 /*9 */ VTRECV_ACTION_IGNORE | (0 << 4),
1033 /*10 */ VTRECV_ACTION_IGNORE | (0 << 4),
1034 /*11 */ VTRECV_ACTION_IGNORE | (0 << 4),
1035 /*12 */ VTRECV_ACTION_IGNORE | (0 << 4),
1036 /*13 */ VTRECV_ACTION_IGNORE | (0 << 4),
1037 /*14 */ VTRECV_ACTION_IGNORE | (0 << 4),
1038 /*15 */ VTRECV_ACTION_IGNORE | (0 << 4),
1039 /*16 */ VTRECV_ACTION_IGNORE | (0 << 4),
1040 /*17 */ VTRECV_ACTION_IGNORE | (0 << 4),
1041 /*18 */ VTRECV_ACTION_IGNORE | (0 << 4),
1042 /*19 */ VTRECV_ACTION_IGNORE | (0 << 4),
1043 /*20 */ VTRECV_ACTION_IGNORE | (0 << 4),
1044 /*21 */ VTRECV_ACTION_IGNORE | (0 << 4),
1045 /*22 */ VTRECV_ACTION_IGNORE | (0 << 4),
1046 /*23 */ VTRECV_ACTION_IGNORE | (0 << 4),
1047 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1048 /*25 */ VTRECV_ACTION_IGNORE | (0 << 4),
1049 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1050 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
1051 /*28 */ VTRECV_ACTION_IGNORE | (0 << 4),
1052 /*29 */ VTRECV_ACTION_IGNORE | (0 << 4),
1053 /*30 */ VTRECV_ACTION_IGNORE | (0 << 4),
1054 /*31 */ VTRECV_ACTION_IGNORE | (0 << 4),
1055 /*32 */ VTRECV_ACTION_COLLECT | (0 << 4),
1056 /*33 */ VTRECV_ACTION_COLLECT | (0 << 4),
1057 /*34 */ VTRECV_ACTION_COLLECT | (0 << 4),
1058 /*35 */ VTRECV_ACTION_COLLECT | (0 << 4),
1059 /*36 */ VTRECV_ACTION_COLLECT | (0 << 4),
1060 /*37 */ VTRECV_ACTION_COLLECT | (0 << 4),
1061 /*38 */ VTRECV_ACTION_COLLECT | (0 << 4),
1062 /*39 */ VTRECV_ACTION_COLLECT | (0 << 4),
1063 /*40 */ VTRECV_ACTION_COLLECT | (0 << 4),
1064 /*41 */ VTRECV_ACTION_COLLECT | (0 << 4),
1065 /*42 */ VTRECV_ACTION_COLLECT | (0 << 4),
1066 /*43 */ VTRECV_ACTION_COLLECT | (0 << 4),
1067 /*44 */ VTRECV_ACTION_COLLECT | (0 << 4),
1068 /*45 */ VTRECV_ACTION_COLLECT | (0 << 4),
1069 /*46 */ VTRECV_ACTION_COLLECT | (0 << 4),
1070 /*47 */ VTRECV_ACTION_COLLECT | (0 << 4),
1071 /*48 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1072 /*49 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1073 /*50 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1074 /*51 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1075 /*52 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1076 /*53 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1077 /*54 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1078 /*55 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1079 /*56 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1080 /*57 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1081 /*58 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1082 /*59 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1083 /*60 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1084 /*61 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1085 /*62 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1086 /*63 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1087 /*64 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1088 /*65 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1089 /*66 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1090 /*67 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1091 /*68 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1092 /*69 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1093 /*70 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1094 /*71 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1095 /*72 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1096 /*73 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1097 /*74 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1098 /*75 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1099 /*76 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1100 /*77 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1101 /*78 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1102 /*79 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1103 /*80 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1104 /*81 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1105 /*82 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1106 /*83 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1107 /*84 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1108 /*85 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1109 /*86 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1110 /*87 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1111 /*88 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1112 /*89 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1113 /*90 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1114 /*91 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1115 /*92 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1116 /*93 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1117 /*94 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1118 /*95 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1119 /*96 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1120 /*97 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1121 /*98 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1122 /*99 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1123 /*100*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1124 /*101*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1125 /*102*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1126 /*103*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1127 /*104*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1128 /*105*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1129 /*106*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1130 /*107*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1131 /*108*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1132 /*109*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1133 /*110*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1134 /*111*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1135 /*112*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1136 /*113*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1137 /*114*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1138 /*115*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1139 /*116*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1140 /*117*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1141 /*118*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1142 /*119*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1143 /*120*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1144 /*121*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1145 /*122*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1146 /*123*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1147 /*124*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1148 /*125*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1149 /*126*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1150 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
1151 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1152 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1153 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1154 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1155 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1156 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1157 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1158 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1159 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1160 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1161 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1162 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1163 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1164 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1165 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1166 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1167 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
1168 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1169 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1170 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1171 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1172 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1173 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1174 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1175 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1176 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1177 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1178 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
1179 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
1180 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
1181 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1182 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1183 },
1184 { /* VTRECV_STATE_DCS_PARAM = 7 */
1185 /*0 */ VTRECV_ACTION_IGNORE | (0 << 4),
1186 /*1 */ VTRECV_ACTION_IGNORE | (0 << 4),
1187 /*2 */ VTRECV_ACTION_IGNORE | (0 << 4),
1188 /*3 */ VTRECV_ACTION_IGNORE | (0 << 4),
1189 /*4 */ VTRECV_ACTION_IGNORE | (0 << 4),
1190 /*5 */ VTRECV_ACTION_IGNORE | (0 << 4),
1191 /*6 */ VTRECV_ACTION_IGNORE | (0 << 4),
1192 /*7 */ VTRECV_ACTION_IGNORE | (0 << 4),
1193 /*8 */ VTRECV_ACTION_IGNORE | (0 << 4),
1194 /*9 */ VTRECV_ACTION_IGNORE | (0 << 4),
1195 /*10 */ VTRECV_ACTION_IGNORE | (0 << 4),
1196 /*11 */ VTRECV_ACTION_IGNORE | (0 << 4),
1197 /*12 */ VTRECV_ACTION_IGNORE | (0 << 4),
1198 /*13 */ VTRECV_ACTION_IGNORE | (0 << 4),
1199 /*14 */ VTRECV_ACTION_IGNORE | (0 << 4),
1200 /*15 */ VTRECV_ACTION_IGNORE | (0 << 4),
1201 /*16 */ VTRECV_ACTION_IGNORE | (0 << 4),
1202 /*17 */ VTRECV_ACTION_IGNORE | (0 << 4),
1203 /*18 */ VTRECV_ACTION_IGNORE | (0 << 4),
1204 /*19 */ VTRECV_ACTION_IGNORE | (0 << 4),
1205 /*20 */ VTRECV_ACTION_IGNORE | (0 << 4),
1206 /*21 */ VTRECV_ACTION_IGNORE | (0 << 4),
1207 /*22 */ VTRECV_ACTION_IGNORE | (0 << 4),
1208 /*23 */ VTRECV_ACTION_IGNORE | (0 << 4),
1209 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1210 /*25 */ VTRECV_ACTION_IGNORE | (0 << 4),
1211 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1212 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
1213 /*28 */ VTRECV_ACTION_IGNORE | (0 << 4),
1214 /*29 */ VTRECV_ACTION_IGNORE | (0 << 4),
1215 /*30 */ VTRECV_ACTION_IGNORE | (0 << 4),
1216 /*31 */ VTRECV_ACTION_IGNORE | (0 << 4),
1217 /*32 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1218 /*33 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1219 /*34 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1220 /*35 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1221 /*36 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1222 /*37 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1223 /*38 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1224 /*39 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1225 /*40 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1226 /*41 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1227 /*42 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1228 /*43 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1229 /*44 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1230 /*45 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1231 /*46 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1232 /*47 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4),
1233 /*48 */ VTRECV_ACTION_PARAM | (0 << 4),
1234 /*49 */ VTRECV_ACTION_PARAM | (0 << 4),
1235 /*50 */ VTRECV_ACTION_PARAM | (0 << 4),
1236 /*51 */ VTRECV_ACTION_PARAM | (0 << 4),
1237 /*52 */ VTRECV_ACTION_PARAM | (0 << 4),
1238 /*53 */ VTRECV_ACTION_PARAM | (0 << 4),
1239 /*54 */ VTRECV_ACTION_PARAM | (0 << 4),
1240 /*55 */ VTRECV_ACTION_PARAM | (0 << 4),
1241 /*56 */ VTRECV_ACTION_PARAM | (0 << 4),
1242 /*57 */ VTRECV_ACTION_PARAM | (0 << 4),
1243 /*58 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1244 /*59 */ VTRECV_ACTION_PARAM | (0 << 4),
1245 /*60 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1246 /*61 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1247 /*62 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1248 /*63 */ 0 | (VTRECV_STATE_DCS_IGNORE << 4),
1249 /*64 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1250 /*65 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1251 /*66 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1252 /*67 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1253 /*68 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1254 /*69 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1255 /*70 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1256 /*71 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1257 /*72 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1258 /*73 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1259 /*74 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1260 /*75 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1261 /*76 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1262 /*77 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1263 /*78 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1264 /*79 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1265 /*80 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1266 /*81 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1267 /*82 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1268 /*83 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1269 /*84 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1270 /*85 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1271 /*86 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1272 /*87 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1273 /*88 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1274 /*89 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1275 /*90 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1276 /*91 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1277 /*92 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1278 /*93 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1279 /*94 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1280 /*95 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1281 /*96 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1282 /*97 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1283 /*98 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1284 /*99 */ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1285 /*100*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1286 /*101*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1287 /*102*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1288 /*103*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1289 /*104*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1290 /*105*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1291 /*106*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1292 /*107*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1293 /*108*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1294 /*109*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1295 /*110*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1296 /*111*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1297 /*112*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1298 /*113*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1299 /*114*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1300 /*115*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1301 /*116*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1302 /*117*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1303 /*118*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1304 /*119*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1305 /*120*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1306 /*121*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1307 /*122*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1308 /*123*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1309 /*124*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1310 /*125*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1311 /*126*/ 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4),
1312 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
1313 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1314 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1315 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1316 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1317 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1318 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1319 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1320 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1321 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1322 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1323 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1324 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1325 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1326 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1327 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1328 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1329 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
1330 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1331 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1332 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1333 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1334 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1335 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1336 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1337 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1338 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1339 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1340 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
1341 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
1342 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
1343 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1344 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1345 },
1346 { /* VTRECV_STATE_DCS_PASSTHROUGH = 8 */
1347 /*0 */ VTRECV_ACTION_PUT | (0 << 4),
1348 /*1 */ VTRECV_ACTION_PUT | (0 << 4),
1349 /*2 */ VTRECV_ACTION_PUT | (0 << 4),
1350 /*3 */ VTRECV_ACTION_PUT | (0 << 4),
1351 /*4 */ VTRECV_ACTION_PUT | (0 << 4),
1352 /*5 */ VTRECV_ACTION_PUT | (0 << 4),
1353 /*6 */ VTRECV_ACTION_PUT | (0 << 4),
1354 /*7 */ VTRECV_ACTION_PUT | (0 << 4),
1355 /*8 */ VTRECV_ACTION_PUT | (0 << 4),
1356 /*9 */ VTRECV_ACTION_PUT | (0 << 4),
1357 /*10 */ VTRECV_ACTION_PUT | (0 << 4),
1358 /*11 */ VTRECV_ACTION_PUT | (0 << 4),
1359 /*12 */ VTRECV_ACTION_PUT | (0 << 4),
1360 /*13 */ VTRECV_ACTION_PUT | (0 << 4),
1361 /*14 */ VTRECV_ACTION_PUT | (0 << 4),
1362 /*15 */ VTRECV_ACTION_PUT | (0 << 4),
1363 /*16 */ VTRECV_ACTION_PUT | (0 << 4),
1364 /*17 */ VTRECV_ACTION_PUT | (0 << 4),
1365 /*18 */ VTRECV_ACTION_PUT | (0 << 4),
1366 /*19 */ VTRECV_ACTION_PUT | (0 << 4),
1367 /*20 */ VTRECV_ACTION_PUT | (0 << 4),
1368 /*21 */ VTRECV_ACTION_PUT | (0 << 4),
1369 /*22 */ VTRECV_ACTION_PUT | (0 << 4),
1370 /*23 */ VTRECV_ACTION_PUT | (0 << 4),
1371 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1372 /*25 */ VTRECV_ACTION_PUT | (0 << 4),
1373 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1374 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
1375 /*28 */ VTRECV_ACTION_PUT | (0 << 4),
1376 /*29 */ VTRECV_ACTION_PUT | (0 << 4),
1377 /*30 */ VTRECV_ACTION_PUT | (0 << 4),
1378 /*31 */ VTRECV_ACTION_PUT | (0 << 4),
1379 /*32 */ VTRECV_ACTION_PUT | (0 << 4),
1380 /*33 */ VTRECV_ACTION_PUT | (0 << 4),
1381 /*34 */ VTRECV_ACTION_PUT | (0 << 4),
1382 /*35 */ VTRECV_ACTION_PUT | (0 << 4),
1383 /*36 */ VTRECV_ACTION_PUT | (0 << 4),
1384 /*37 */ VTRECV_ACTION_PUT | (0 << 4),
1385 /*38 */ VTRECV_ACTION_PUT | (0 << 4),
1386 /*39 */ VTRECV_ACTION_PUT | (0 << 4),
1387 /*40 */ VTRECV_ACTION_PUT | (0 << 4),
1388 /*41 */ VTRECV_ACTION_PUT | (0 << 4),
1389 /*42 */ VTRECV_ACTION_PUT | (0 << 4),
1390 /*43 */ VTRECV_ACTION_PUT | (0 << 4),
1391 /*44 */ VTRECV_ACTION_PUT | (0 << 4),
1392 /*45 */ VTRECV_ACTION_PUT | (0 << 4),
1393 /*46 */ VTRECV_ACTION_PUT | (0 << 4),
1394 /*47 */ VTRECV_ACTION_PUT | (0 << 4),
1395 /*48 */ VTRECV_ACTION_PUT | (0 << 4),
1396 /*49 */ VTRECV_ACTION_PUT | (0 << 4),
1397 /*50 */ VTRECV_ACTION_PUT | (0 << 4),
1398 /*51 */ VTRECV_ACTION_PUT | (0 << 4),
1399 /*52 */ VTRECV_ACTION_PUT | (0 << 4),
1400 /*53 */ VTRECV_ACTION_PUT | (0 << 4),
1401 /*54 */ VTRECV_ACTION_PUT | (0 << 4),
1402 /*55 */ VTRECV_ACTION_PUT | (0 << 4),
1403 /*56 */ VTRECV_ACTION_PUT | (0 << 4),
1404 /*57 */ VTRECV_ACTION_PUT | (0 << 4),
1405 /*58 */ VTRECV_ACTION_PUT | (0 << 4),
1406 /*59 */ VTRECV_ACTION_PUT | (0 << 4),
1407 /*60 */ VTRECV_ACTION_PUT | (0 << 4),
1408 /*61 */ VTRECV_ACTION_PUT | (0 << 4),
1409 /*62 */ VTRECV_ACTION_PUT | (0 << 4),
1410 /*63 */ VTRECV_ACTION_PUT | (0 << 4),
1411 /*64 */ VTRECV_ACTION_PUT | (0 << 4),
1412 /*65 */ VTRECV_ACTION_PUT | (0 << 4),
1413 /*66 */ VTRECV_ACTION_PUT | (0 << 4),
1414 /*67 */ VTRECV_ACTION_PUT | (0 << 4),
1415 /*68 */ VTRECV_ACTION_PUT | (0 << 4),
1416 /*69 */ VTRECV_ACTION_PUT | (0 << 4),
1417 /*70 */ VTRECV_ACTION_PUT | (0 << 4),
1418 /*71 */ VTRECV_ACTION_PUT | (0 << 4),
1419 /*72 */ VTRECV_ACTION_PUT | (0 << 4),
1420 /*73 */ VTRECV_ACTION_PUT | (0 << 4),
1421 /*74 */ VTRECV_ACTION_PUT | (0 << 4),
1422 /*75 */ VTRECV_ACTION_PUT | (0 << 4),
1423 /*76 */ VTRECV_ACTION_PUT | (0 << 4),
1424 /*77 */ VTRECV_ACTION_PUT | (0 << 4),
1425 /*78 */ VTRECV_ACTION_PUT | (0 << 4),
1426 /*79 */ VTRECV_ACTION_PUT | (0 << 4),
1427 /*80 */ VTRECV_ACTION_PUT | (0 << 4),
1428 /*81 */ VTRECV_ACTION_PUT | (0 << 4),
1429 /*82 */ VTRECV_ACTION_PUT | (0 << 4),
1430 /*83 */ VTRECV_ACTION_PUT | (0 << 4),
1431 /*84 */ VTRECV_ACTION_PUT | (0 << 4),
1432 /*85 */ VTRECV_ACTION_PUT | (0 << 4),
1433 /*86 */ VTRECV_ACTION_PUT | (0 << 4),
1434 /*87 */ VTRECV_ACTION_PUT | (0 << 4),
1435 /*88 */ VTRECV_ACTION_PUT | (0 << 4),
1436 /*89 */ VTRECV_ACTION_PUT | (0 << 4),
1437 /*90 */ VTRECV_ACTION_PUT | (0 << 4),
1438 /*91 */ VTRECV_ACTION_PUT | (0 << 4),
1439 /*92 */ VTRECV_ACTION_PUT | (0 << 4),
1440 /*93 */ VTRECV_ACTION_PUT | (0 << 4),
1441 /*94 */ VTRECV_ACTION_PUT | (0 << 4),
1442 /*95 */ VTRECV_ACTION_PUT | (0 << 4),
1443 /*96 */ VTRECV_ACTION_PUT | (0 << 4),
1444 /*97 */ VTRECV_ACTION_PUT | (0 << 4),
1445 /*98 */ VTRECV_ACTION_PUT | (0 << 4),
1446 /*99 */ VTRECV_ACTION_PUT | (0 << 4),
1447 /*100*/ VTRECV_ACTION_PUT | (0 << 4),
1448 /*101*/ VTRECV_ACTION_PUT | (0 << 4),
1449 /*102*/ VTRECV_ACTION_PUT | (0 << 4),
1450 /*103*/ VTRECV_ACTION_PUT | (0 << 4),
1451 /*104*/ VTRECV_ACTION_PUT | (0 << 4),
1452 /*105*/ VTRECV_ACTION_PUT | (0 << 4),
1453 /*106*/ VTRECV_ACTION_PUT | (0 << 4),
1454 /*107*/ VTRECV_ACTION_PUT | (0 << 4),
1455 /*108*/ VTRECV_ACTION_PUT | (0 << 4),
1456 /*109*/ VTRECV_ACTION_PUT | (0 << 4),
1457 /*110*/ VTRECV_ACTION_PUT | (0 << 4),
1458 /*111*/ VTRECV_ACTION_PUT | (0 << 4),
1459 /*112*/ VTRECV_ACTION_PUT | (0 << 4),
1460 /*113*/ VTRECV_ACTION_PUT | (0 << 4),
1461 /*114*/ VTRECV_ACTION_PUT | (0 << 4),
1462 /*115*/ VTRECV_ACTION_PUT | (0 << 4),
1463 /*116*/ VTRECV_ACTION_PUT | (0 << 4),
1464 /*117*/ VTRECV_ACTION_PUT | (0 << 4),
1465 /*118*/ VTRECV_ACTION_PUT | (0 << 4),
1466 /*119*/ VTRECV_ACTION_PUT | (0 << 4),
1467 /*120*/ VTRECV_ACTION_PUT | (0 << 4),
1468 /*121*/ VTRECV_ACTION_PUT | (0 << 4),
1469 /*122*/ VTRECV_ACTION_PUT | (0 << 4),
1470 /*123*/ VTRECV_ACTION_PUT | (0 << 4),
1471 /*124*/ VTRECV_ACTION_PUT | (0 << 4),
1472 /*125*/ VTRECV_ACTION_PUT | (0 << 4),
1473 /*126*/ VTRECV_ACTION_PUT | (0 << 4),
1474 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
1475 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1476 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1477 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1478 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1479 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1480 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1481 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1482 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1483 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1484 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1485 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1486 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1487 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1488 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1489 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1490 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1491 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
1492 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1493 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1494 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1495 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1496 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1497 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1498 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1499 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1500 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1501 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1502 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
1503 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
1504 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
1505 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1506 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1507 },
1508 { /* VTRECV_STATE_ESCAPE = 9 */
1509 /*0 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1510 /*1 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1511 /*2 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1512 /*3 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1513 /*4 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1514 /*5 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1515 /*6 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1516 /*7 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1517 /*8 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1518 /*9 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1519 /*10 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1520 /*11 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1521 /*12 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1522 /*13 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1523 /*14 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1524 /*15 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1525 /*16 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1526 /*17 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1527 /*18 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1528 /*19 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1529 /*20 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1530 /*21 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1531 /*22 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1532 /*23 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1533 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1534 /*25 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1535 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1536 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
1537 /*28 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1538 /*29 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1539 /*30 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1540 /*31 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1541 /*32 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1542 /*33 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1543 /*34 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1544 /*35 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1545 /*36 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1546 /*37 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1547 /*38 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1548 /*39 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1549 /*40 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1550 /*41 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1551 /*42 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1552 /*43 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1553 /*44 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1554 /*45 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1555 /*46 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1556 /*47 */ VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1557 /*48 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1558 /*49 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1559 /*50 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1560 /*51 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1561 /*52 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1562 /*53 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1563 /*54 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1564 /*55 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1565 /*56 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1566 /*57 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1567 /*58 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1568 /*59 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1569 /*60 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1570 /*61 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1571 /*62 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1572 /*63 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1573 /*64 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1574 /*65 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1575 /*66 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1576 /*67 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1577 /*68 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1578 /*69 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1579 /*70 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1580 /*71 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1581 /*72 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1582 /*73 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1583 /*74 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1584 /*75 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1585 /*76 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1586 /*77 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1587 /*78 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1588 /*79 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1589 /*80 */ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
1590 /*81 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1591 /*82 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1592 /*83 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1593 /*84 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1594 /*85 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1595 /*86 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1596 /*87 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1597 /*88 */ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1598 /*89 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1599 /*90 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1600 /*91 */ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
1601 /*92 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1602 /*93 */ 0 | (VTRECV_STATE_OSC_STRING << 4),
1603 /*94 */ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1604 /*95 */ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1605 /*96 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1606 /*97 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1607 /*98 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1608 /*99 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1609 /*100*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1610 /*101*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1611 /*102*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1612 /*103*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1613 /*104*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1614 /*105*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1615 /*106*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1616 /*107*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1617 /*108*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1618 /*109*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1619 /*110*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1620 /*111*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1621 /*112*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1622 /*113*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1623 /*114*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1624 /*115*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1625 /*116*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1626 /*117*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1627 /*118*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1628 /*119*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1629 /*120*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1630 /*121*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1631 /*122*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1632 /*123*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1633 /*124*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1634 /*125*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1635 /*126*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1636 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
1637 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1638 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1639 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1640 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1641 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1642 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1643 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1644 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1645 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1646 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1647 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1648 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1649 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1650 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1651 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1652 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1653 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
1654 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1655 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1656 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1657 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1658 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1659 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1660 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1661 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1662 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1663 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1664 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
1665 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
1666 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
1667 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1668 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1669 },
1670 { /* VTRECV_STATE_ESCAPE_INTERMEDIATE = 10 */
1671 /*0 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1672 /*1 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1673 /*2 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1674 /*3 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1675 /*4 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1676 /*5 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1677 /*6 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1678 /*7 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1679 /*8 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1680 /*9 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1681 /*10 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1682 /*11 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1683 /*12 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1684 /*13 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1685 /*14 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1686 /*15 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1687 /*16 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1688 /*17 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1689 /*18 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1690 /*19 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1691 /*20 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1692 /*21 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1693 /*22 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1694 /*23 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1695 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1696 /*25 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1697 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1698 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
1699 /*28 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1700 /*29 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1701 /*30 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1702 /*31 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1703 /*32 */ VTRECV_ACTION_COLLECT | (0 << 4),
1704 /*33 */ VTRECV_ACTION_COLLECT | (0 << 4),
1705 /*34 */ VTRECV_ACTION_COLLECT | (0 << 4),
1706 /*35 */ VTRECV_ACTION_COLLECT | (0 << 4),
1707 /*36 */ VTRECV_ACTION_COLLECT | (0 << 4),
1708 /*37 */ VTRECV_ACTION_COLLECT | (0 << 4),
1709 /*38 */ VTRECV_ACTION_COLLECT | (0 << 4),
1710 /*39 */ VTRECV_ACTION_COLLECT | (0 << 4),
1711 /*40 */ VTRECV_ACTION_COLLECT | (0 << 4),
1712 /*41 */ VTRECV_ACTION_COLLECT | (0 << 4),
1713 /*42 */ VTRECV_ACTION_COLLECT | (0 << 4),
1714 /*43 */ VTRECV_ACTION_COLLECT | (0 << 4),
1715 /*44 */ VTRECV_ACTION_COLLECT | (0 << 4),
1716 /*45 */ VTRECV_ACTION_COLLECT | (0 << 4),
1717 /*46 */ VTRECV_ACTION_COLLECT | (0 << 4),
1718 /*47 */ VTRECV_ACTION_COLLECT | (0 << 4),
1719 /*48 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1720 /*49 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1721 /*50 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1722 /*51 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1723 /*52 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1724 /*53 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1725 /*54 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1726 /*55 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1727 /*56 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1728 /*57 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1729 /*58 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1730 /*59 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1731 /*60 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1732 /*61 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1733 /*62 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1734 /*63 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1735 /*64 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1736 /*65 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1737 /*66 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1738 /*67 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1739 /*68 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1740 /*69 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1741 /*70 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1742 /*71 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1743 /*72 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1744 /*73 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1745 /*74 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1746 /*75 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1747 /*76 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1748 /*77 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1749 /*78 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1750 /*79 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1751 /*80 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1752 /*81 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1753 /*82 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1754 /*83 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1755 /*84 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1756 /*85 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1757 /*86 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1758 /*87 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1759 /*88 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1760 /*89 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1761 /*90 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1762 /*91 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1763 /*92 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1764 /*93 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1765 /*94 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1766 /*95 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1767 /*96 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1768 /*97 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1769 /*98 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1770 /*99 */ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1771 /*100*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1772 /*101*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1773 /*102*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1774 /*103*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1775 /*104*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1776 /*105*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1777 /*106*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1778 /*107*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1779 /*108*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1780 /*109*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1781 /*110*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1782 /*111*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1783 /*112*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1784 /*113*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1785 /*114*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1786 /*115*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1787 /*116*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1788 /*117*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1789 /*118*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1790 /*119*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1791 /*120*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1792 /*121*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1793 /*122*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1794 /*123*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1795 /*124*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1796 /*125*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1797 /*126*/ VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4),
1798 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
1799 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1800 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1801 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1802 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1803 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1804 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1805 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1806 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1807 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1808 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1809 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1810 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1811 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1812 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1813 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1814 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1815 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
1816 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1817 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1818 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1819 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1820 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1821 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1822 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1823 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1824 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1825 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1826 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
1827 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
1828 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
1829 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1830 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1831 },
1832 { /* VTRECV_STATE_GROUND = 11 */
1833 /*0 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1834 /*1 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1835 /*2 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1836 /*3 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1837 /*4 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1838 /*5 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1839 /*6 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1840 /*7 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1841 /*8 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1842 /*9 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1843 /*10 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1844 /*11 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1845 /*12 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1846 /*13 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1847 /*14 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1848 /*15 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1849 /*16 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1850 /*17 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1851 /*18 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1852 /*19 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1853 /*20 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1854 /*21 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1855 /*22 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1856 /*23 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1857 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1858 /*25 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1859 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1860 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
1861 /*28 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1862 /*29 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1863 /*30 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1864 /*31 */ VTRECV_ACTION_EXECUTE | (0 << 4),
1865 /*32 */ VTRECV_ACTION_PRINT | (0 << 4),
1866 /*33 */ VTRECV_ACTION_PRINT | (0 << 4),
1867 /*34 */ VTRECV_ACTION_PRINT | (0 << 4),
1868 /*35 */ VTRECV_ACTION_PRINT | (0 << 4),
1869 /*36 */ VTRECV_ACTION_PRINT | (0 << 4),
1870 /*37 */ VTRECV_ACTION_PRINT | (0 << 4),
1871 /*38 */ VTRECV_ACTION_PRINT | (0 << 4),
1872 /*39 */ VTRECV_ACTION_PRINT | (0 << 4),
1873 /*40 */ VTRECV_ACTION_PRINT | (0 << 4),
1874 /*41 */ VTRECV_ACTION_PRINT | (0 << 4),
1875 /*42 */ VTRECV_ACTION_PRINT | (0 << 4),
1876 /*43 */ VTRECV_ACTION_PRINT | (0 << 4),
1877 /*44 */ VTRECV_ACTION_PRINT | (0 << 4),
1878 /*45 */ VTRECV_ACTION_PRINT | (0 << 4),
1879 /*46 */ VTRECV_ACTION_PRINT | (0 << 4),
1880 /*47 */ VTRECV_ACTION_PRINT | (0 << 4),
1881 /*48 */ VTRECV_ACTION_PRINT | (0 << 4),
1882 /*49 */ VTRECV_ACTION_PRINT | (0 << 4),
1883 /*50 */ VTRECV_ACTION_PRINT | (0 << 4),
1884 /*51 */ VTRECV_ACTION_PRINT | (0 << 4),
1885 /*52 */ VTRECV_ACTION_PRINT | (0 << 4),
1886 /*53 */ VTRECV_ACTION_PRINT | (0 << 4),
1887 /*54 */ VTRECV_ACTION_PRINT | (0 << 4),
1888 /*55 */ VTRECV_ACTION_PRINT | (0 << 4),
1889 /*56 */ VTRECV_ACTION_PRINT | (0 << 4),
1890 /*57 */ VTRECV_ACTION_PRINT | (0 << 4),
1891 /*58 */ VTRECV_ACTION_PRINT | (0 << 4),
1892 /*59 */ VTRECV_ACTION_PRINT | (0 << 4),
1893 /*60 */ VTRECV_ACTION_PRINT | (0 << 4),
1894 /*61 */ VTRECV_ACTION_PRINT | (0 << 4),
1895 /*62 */ VTRECV_ACTION_PRINT | (0 << 4),
1896 /*63 */ VTRECV_ACTION_PRINT | (0 << 4),
1897 /*64 */ VTRECV_ACTION_PRINT | (0 << 4),
1898 /*65 */ VTRECV_ACTION_PRINT | (0 << 4),
1899 /*66 */ VTRECV_ACTION_PRINT | (0 << 4),
1900 /*67 */ VTRECV_ACTION_PRINT | (0 << 4),
1901 /*68 */ VTRECV_ACTION_PRINT | (0 << 4),
1902 /*69 */ VTRECV_ACTION_PRINT | (0 << 4),
1903 /*70 */ VTRECV_ACTION_PRINT | (0 << 4),
1904 /*71 */ VTRECV_ACTION_PRINT | (0 << 4),
1905 /*72 */ VTRECV_ACTION_PRINT | (0 << 4),
1906 /*73 */ VTRECV_ACTION_PRINT | (0 << 4),
1907 /*74 */ VTRECV_ACTION_PRINT | (0 << 4),
1908 /*75 */ VTRECV_ACTION_PRINT | (0 << 4),
1909 /*76 */ VTRECV_ACTION_PRINT | (0 << 4),
1910 /*77 */ VTRECV_ACTION_PRINT | (0 << 4),
1911 /*78 */ VTRECV_ACTION_PRINT | (0 << 4),
1912 /*79 */ VTRECV_ACTION_PRINT | (0 << 4),
1913 /*80 */ VTRECV_ACTION_PRINT | (0 << 4),
1914 /*81 */ VTRECV_ACTION_PRINT | (0 << 4),
1915 /*82 */ VTRECV_ACTION_PRINT | (0 << 4),
1916 /*83 */ VTRECV_ACTION_PRINT | (0 << 4),
1917 /*84 */ VTRECV_ACTION_PRINT | (0 << 4),
1918 /*85 */ VTRECV_ACTION_PRINT | (0 << 4),
1919 /*86 */ VTRECV_ACTION_PRINT | (0 << 4),
1920 /*87 */ VTRECV_ACTION_PRINT | (0 << 4),
1921 /*88 */ VTRECV_ACTION_PRINT | (0 << 4),
1922 /*89 */ VTRECV_ACTION_PRINT | (0 << 4),
1923 /*90 */ VTRECV_ACTION_PRINT | (0 << 4),
1924 /*91 */ VTRECV_ACTION_PRINT | (0 << 4),
1925 /*92 */ VTRECV_ACTION_PRINT | (0 << 4),
1926 /*93 */ VTRECV_ACTION_PRINT | (0 << 4),
1927 /*94 */ VTRECV_ACTION_PRINT | (0 << 4),
1928 /*95 */ VTRECV_ACTION_PRINT | (0 << 4),
1929 /*96 */ VTRECV_ACTION_PRINT | (0 << 4),
1930 /*97 */ VTRECV_ACTION_PRINT | (0 << 4),
1931 /*98 */ VTRECV_ACTION_PRINT | (0 << 4),
1932 /*99 */ VTRECV_ACTION_PRINT | (0 << 4),
1933 /*100*/ VTRECV_ACTION_PRINT | (0 << 4),
1934 /*101*/ VTRECV_ACTION_PRINT | (0 << 4),
1935 /*102*/ VTRECV_ACTION_PRINT | (0 << 4),
1936 /*103*/ VTRECV_ACTION_PRINT | (0 << 4),
1937 /*104*/ VTRECV_ACTION_PRINT | (0 << 4),
1938 /*105*/ VTRECV_ACTION_PRINT | (0 << 4),
1939 /*106*/ VTRECV_ACTION_PRINT | (0 << 4),
1940 /*107*/ VTRECV_ACTION_PRINT | (0 << 4),
1941 /*108*/ VTRECV_ACTION_PRINT | (0 << 4),
1942 /*109*/ VTRECV_ACTION_PRINT | (0 << 4),
1943 /*110*/ VTRECV_ACTION_PRINT | (0 << 4),
1944 /*111*/ VTRECV_ACTION_PRINT | (0 << 4),
1945 /*112*/ VTRECV_ACTION_PRINT | (0 << 4),
1946 /*113*/ VTRECV_ACTION_PRINT | (0 << 4),
1947 /*114*/ VTRECV_ACTION_PRINT | (0 << 4),
1948 /*115*/ VTRECV_ACTION_PRINT | (0 << 4),
1949 /*116*/ VTRECV_ACTION_PRINT | (0 << 4),
1950 /*117*/ VTRECV_ACTION_PRINT | (0 << 4),
1951 /*118*/ VTRECV_ACTION_PRINT | (0 << 4),
1952 /*119*/ VTRECV_ACTION_PRINT | (0 << 4),
1953 /*120*/ VTRECV_ACTION_PRINT | (0 << 4),
1954 /*121*/ VTRECV_ACTION_PRINT | (0 << 4),
1955 /*122*/ VTRECV_ACTION_PRINT | (0 << 4),
1956 /*123*/ VTRECV_ACTION_PRINT | (0 << 4),
1957 /*124*/ VTRECV_ACTION_PRINT | (0 << 4),
1958 /*125*/ VTRECV_ACTION_PRINT | (0 << 4),
1959 /*126*/ VTRECV_ACTION_PRINT | (0 << 4),
1960 /*127*/ VTRECV_ACTION_PRINT | (0 << 4),
1961 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1962 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1963 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1964 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1965 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1966 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1967 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1968 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1969 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1970 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1971 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1972 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1973 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1974 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1975 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1976 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1977 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
1978 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1979 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1980 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1981 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1982 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1983 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1984 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1985 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1986 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1987 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
1988 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
1989 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
1990 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
1991 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1992 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
1993 },
1994 { /* VTRECV_STATE_OSC_STRING = 12 */
1995 /*0 */ VTRECV_ACTION_IGNORE | (0 << 4),
1996 /*1 */ VTRECV_ACTION_IGNORE | (0 << 4),
1997 /*2 */ VTRECV_ACTION_IGNORE | (0 << 4),
1998 /*3 */ VTRECV_ACTION_IGNORE | (0 << 4),
1999 /*4 */ VTRECV_ACTION_IGNORE | (0 << 4),
2000 /*5 */ VTRECV_ACTION_IGNORE | (0 << 4),
2001 /*6 */ VTRECV_ACTION_IGNORE | (0 << 4),
2002 /*7 */ VTRECV_ACTION_IGNORE | (0 << 4),
2003 /*8 */ VTRECV_ACTION_IGNORE | (0 << 4),
2004 /*9 */ VTRECV_ACTION_IGNORE | (0 << 4),
2005 /*10 */ VTRECV_ACTION_IGNORE | (0 << 4),
2006 /*11 */ VTRECV_ACTION_IGNORE | (0 << 4),
2007 /*12 */ VTRECV_ACTION_IGNORE | (0 << 4),
2008 /*13 */ VTRECV_ACTION_IGNORE | (0 << 4),
2009 /*14 */ VTRECV_ACTION_IGNORE | (0 << 4),
2010 /*15 */ VTRECV_ACTION_IGNORE | (0 << 4),
2011 /*16 */ VTRECV_ACTION_IGNORE | (0 << 4),
2012 /*17 */ VTRECV_ACTION_IGNORE | (0 << 4),
2013 /*18 */ VTRECV_ACTION_IGNORE | (0 << 4),
2014 /*19 */ VTRECV_ACTION_IGNORE | (0 << 4),
2015 /*20 */ VTRECV_ACTION_IGNORE | (0 << 4),
2016 /*21 */ VTRECV_ACTION_IGNORE | (0 << 4),
2017 /*22 */ VTRECV_ACTION_IGNORE | (0 << 4),
2018 /*23 */ VTRECV_ACTION_IGNORE | (0 << 4),
2019 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2020 /*25 */ VTRECV_ACTION_IGNORE | (0 << 4),
2021 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2022 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
2023 /*28 */ VTRECV_ACTION_IGNORE | (0 << 4),
2024 /*29 */ VTRECV_ACTION_IGNORE | (0 << 4),
2025 /*30 */ VTRECV_ACTION_IGNORE | (0 << 4),
2026 /*31 */ VTRECV_ACTION_IGNORE | (0 << 4),
2027 /*32 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2028 /*33 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2029 /*34 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2030 /*35 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2031 /*36 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2032 /*37 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2033 /*38 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2034 /*39 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2035 /*40 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2036 /*41 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2037 /*42 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2038 /*43 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2039 /*44 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2040 /*45 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2041 /*46 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2042 /*47 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2043 /*48 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2044 /*49 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2045 /*50 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2046 /*51 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2047 /*52 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2048 /*53 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2049 /*54 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2050 /*55 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2051 /*56 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2052 /*57 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2053 /*58 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2054 /*59 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2055 /*60 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2056 /*61 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2057 /*62 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2058 /*63 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2059 /*64 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2060 /*65 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2061 /*66 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2062 /*67 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2063 /*68 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2064 /*69 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2065 /*70 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2066 /*71 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2067 /*72 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2068 /*73 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2069 /*74 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2070 /*75 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2071 /*76 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2072 /*77 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2073 /*78 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2074 /*79 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2075 /*80 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2076 /*81 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2077 /*82 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2078 /*83 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2079 /*84 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2080 /*85 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2081 /*86 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2082 /*87 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2083 /*88 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2084 /*89 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2085 /*90 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2086 /*91 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2087 /*92 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2088 /*93 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2089 /*94 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2090 /*95 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2091 /*96 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2092 /*97 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2093 /*98 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2094 /*99 */ VTRECV_ACTION_OSC_PUT | (0 << 4),
2095 /*100*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2096 /*101*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2097 /*102*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2098 /*103*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2099 /*104*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2100 /*105*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2101 /*106*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2102 /*107*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2103 /*108*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2104 /*109*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2105 /*110*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2106 /*111*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2107 /*112*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2108 /*113*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2109 /*114*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2110 /*115*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2111 /*116*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2112 /*117*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2113 /*118*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2114 /*119*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2115 /*120*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2116 /*121*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2117 /*122*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2118 /*123*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2119 /*124*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2120 /*125*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2121 /*126*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2122 /*127*/ VTRECV_ACTION_OSC_PUT | (0 << 4),
2123 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2124 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2125 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2126 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2127 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2128 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2129 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2130 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2131 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2132 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2133 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2134 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2135 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2136 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2137 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2138 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2139 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
2140 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2141 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2142 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2143 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2144 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2145 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2146 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2147 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
2148 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2149 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2150 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
2151 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
2152 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
2153 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
2154 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
2155 },
2156 { /* VTRECV_STATE_SOS_PM_APC_STRING = 13 */
2157 /*0 */ VTRECV_ACTION_IGNORE | (0 << 4),
2158 /*1 */ VTRECV_ACTION_IGNORE | (0 << 4),
2159 /*2 */ VTRECV_ACTION_IGNORE | (0 << 4),
2160 /*3 */ VTRECV_ACTION_IGNORE | (0 << 4),
2161 /*4 */ VTRECV_ACTION_IGNORE | (0 << 4),
2162 /*5 */ VTRECV_ACTION_IGNORE | (0 << 4),
2163 /*6 */ VTRECV_ACTION_IGNORE | (0 << 4),
2164 /*7 */ VTRECV_ACTION_IGNORE | (0 << 4),
2165 /*8 */ VTRECV_ACTION_IGNORE | (0 << 4),
2166 /*9 */ VTRECV_ACTION_IGNORE | (0 << 4),
2167 /*10 */ VTRECV_ACTION_IGNORE | (0 << 4),
2168 /*11 */ VTRECV_ACTION_IGNORE | (0 << 4),
2169 /*12 */ VTRECV_ACTION_IGNORE | (0 << 4),
2170 /*13 */ VTRECV_ACTION_IGNORE | (0 << 4),
2171 /*14 */ VTRECV_ACTION_IGNORE | (0 << 4),
2172 /*15 */ VTRECV_ACTION_IGNORE | (0 << 4),
2173 /*16 */ VTRECV_ACTION_IGNORE | (0 << 4),
2174 /*17 */ VTRECV_ACTION_IGNORE | (0 << 4),
2175 /*18 */ VTRECV_ACTION_IGNORE | (0 << 4),
2176 /*19 */ VTRECV_ACTION_IGNORE | (0 << 4),
2177 /*20 */ VTRECV_ACTION_IGNORE | (0 << 4),
2178 /*21 */ VTRECV_ACTION_IGNORE | (0 << 4),
2179 /*22 */ VTRECV_ACTION_IGNORE | (0 << 4),
2180 /*23 */ VTRECV_ACTION_IGNORE | (0 << 4),
2181 /*24 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2182 /*25 */ VTRECV_ACTION_IGNORE | (0 << 4),
2183 /*26 */ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2184 /*27 */ 0 | (VTRECV_STATE_ESCAPE << 4),
2185 /*28 */ VTRECV_ACTION_IGNORE | (0 << 4),
2186 /*29 */ VTRECV_ACTION_IGNORE | (0 << 4),
2187 /*30 */ VTRECV_ACTION_IGNORE | (0 << 4),
2188 /*31 */ VTRECV_ACTION_IGNORE | (0 << 4),
2189 /*32 */ VTRECV_ACTION_IGNORE | (0 << 4),
2190 /*33 */ VTRECV_ACTION_IGNORE | (0 << 4),
2191 /*34 */ VTRECV_ACTION_IGNORE | (0 << 4),
2192 /*35 */ VTRECV_ACTION_IGNORE | (0 << 4),
2193 /*36 */ VTRECV_ACTION_IGNORE | (0 << 4),
2194 /*37 */ VTRECV_ACTION_IGNORE | (0 << 4),
2195 /*38 */ VTRECV_ACTION_IGNORE | (0 << 4),
2196 /*39 */ VTRECV_ACTION_IGNORE | (0 << 4),
2197 /*40 */ VTRECV_ACTION_IGNORE | (0 << 4),
2198 /*41 */ VTRECV_ACTION_IGNORE | (0 << 4),
2199 /*42 */ VTRECV_ACTION_IGNORE | (0 << 4),
2200 /*43 */ VTRECV_ACTION_IGNORE | (0 << 4),
2201 /*44 */ VTRECV_ACTION_IGNORE | (0 << 4),
2202 /*45 */ VTRECV_ACTION_IGNORE | (0 << 4),
2203 /*46 */ VTRECV_ACTION_IGNORE | (0 << 4),
2204 /*47 */ VTRECV_ACTION_IGNORE | (0 << 4),
2205 /*48 */ VTRECV_ACTION_IGNORE | (0 << 4),
2206 /*49 */ VTRECV_ACTION_IGNORE | (0 << 4),
2207 /*50 */ VTRECV_ACTION_IGNORE | (0 << 4),
2208 /*51 */ VTRECV_ACTION_IGNORE | (0 << 4),
2209 /*52 */ VTRECV_ACTION_IGNORE | (0 << 4),
2210 /*53 */ VTRECV_ACTION_IGNORE | (0 << 4),
2211 /*54 */ VTRECV_ACTION_IGNORE | (0 << 4),
2212 /*55 */ VTRECV_ACTION_IGNORE | (0 << 4),
2213 /*56 */ VTRECV_ACTION_IGNORE | (0 << 4),
2214 /*57 */ VTRECV_ACTION_IGNORE | (0 << 4),
2215 /*58 */ VTRECV_ACTION_IGNORE | (0 << 4),
2216 /*59 */ VTRECV_ACTION_IGNORE | (0 << 4),
2217 /*60 */ VTRECV_ACTION_IGNORE | (0 << 4),
2218 /*61 */ VTRECV_ACTION_IGNORE | (0 << 4),
2219 /*62 */ VTRECV_ACTION_IGNORE | (0 << 4),
2220 /*63 */ VTRECV_ACTION_IGNORE | (0 << 4),
2221 /*64 */ VTRECV_ACTION_IGNORE | (0 << 4),
2222 /*65 */ VTRECV_ACTION_IGNORE | (0 << 4),
2223 /*66 */ VTRECV_ACTION_IGNORE | (0 << 4),
2224 /*67 */ VTRECV_ACTION_IGNORE | (0 << 4),
2225 /*68 */ VTRECV_ACTION_IGNORE | (0 << 4),
2226 /*69 */ VTRECV_ACTION_IGNORE | (0 << 4),
2227 /*70 */ VTRECV_ACTION_IGNORE | (0 << 4),
2228 /*71 */ VTRECV_ACTION_IGNORE | (0 << 4),
2229 /*72 */ VTRECV_ACTION_IGNORE | (0 << 4),
2230 /*73 */ VTRECV_ACTION_IGNORE | (0 << 4),
2231 /*74 */ VTRECV_ACTION_IGNORE | (0 << 4),
2232 /*75 */ VTRECV_ACTION_IGNORE | (0 << 4),
2233 /*76 */ VTRECV_ACTION_IGNORE | (0 << 4),
2234 /*77 */ VTRECV_ACTION_IGNORE | (0 << 4),
2235 /*78 */ VTRECV_ACTION_IGNORE | (0 << 4),
2236 /*79 */ VTRECV_ACTION_IGNORE | (0 << 4),
2237 /*80 */ VTRECV_ACTION_IGNORE | (0 << 4),
2238 /*81 */ VTRECV_ACTION_IGNORE | (0 << 4),
2239 /*82 */ VTRECV_ACTION_IGNORE | (0 << 4),
2240 /*83 */ VTRECV_ACTION_IGNORE | (0 << 4),
2241 /*84 */ VTRECV_ACTION_IGNORE | (0 << 4),
2242 /*85 */ VTRECV_ACTION_IGNORE | (0 << 4),
2243 /*86 */ VTRECV_ACTION_IGNORE | (0 << 4),
2244 /*87 */ VTRECV_ACTION_IGNORE | (0 << 4),
2245 /*88 */ VTRECV_ACTION_IGNORE | (0 << 4),
2246 /*89 */ VTRECV_ACTION_IGNORE | (0 << 4),
2247 /*90 */ VTRECV_ACTION_IGNORE | (0 << 4),
2248 /*91 */ VTRECV_ACTION_IGNORE | (0 << 4),
2249 /*92 */ VTRECV_ACTION_IGNORE | (0 << 4),
2250 /*93 */ VTRECV_ACTION_IGNORE | (0 << 4),
2251 /*94 */ VTRECV_ACTION_IGNORE | (0 << 4),
2252 /*95 */ VTRECV_ACTION_IGNORE | (0 << 4),
2253 /*96 */ VTRECV_ACTION_IGNORE | (0 << 4),
2254 /*97 */ VTRECV_ACTION_IGNORE | (0 << 4),
2255 /*98 */ VTRECV_ACTION_IGNORE | (0 << 4),
2256 /*99 */ VTRECV_ACTION_IGNORE | (0 << 4),
2257 /*100*/ VTRECV_ACTION_IGNORE | (0 << 4),
2258 /*101*/ VTRECV_ACTION_IGNORE | (0 << 4),
2259 /*102*/ VTRECV_ACTION_IGNORE | (0 << 4),
2260 /*103*/ VTRECV_ACTION_IGNORE | (0 << 4),
2261 /*104*/ VTRECV_ACTION_IGNORE | (0 << 4),
2262 /*105*/ VTRECV_ACTION_IGNORE | (0 << 4),
2263 /*106*/ VTRECV_ACTION_IGNORE | (0 << 4),
2264 /*107*/ VTRECV_ACTION_IGNORE | (0 << 4),
2265 /*108*/ VTRECV_ACTION_IGNORE | (0 << 4),
2266 /*109*/ VTRECV_ACTION_IGNORE | (0 << 4),
2267 /*110*/ VTRECV_ACTION_IGNORE | (0 << 4),
2268 /*111*/ VTRECV_ACTION_IGNORE | (0 << 4),
2269 /*112*/ VTRECV_ACTION_IGNORE | (0 << 4),
2270 /*113*/ VTRECV_ACTION_IGNORE | (0 << 4),
2271 /*114*/ VTRECV_ACTION_IGNORE | (0 << 4),
2272 /*115*/ VTRECV_ACTION_IGNORE | (0 << 4),
2273 /*116*/ VTRECV_ACTION_IGNORE | (0 << 4),
2274 /*117*/ VTRECV_ACTION_IGNORE | (0 << 4),
2275 /*118*/ VTRECV_ACTION_IGNORE | (0 << 4),
2276 /*119*/ VTRECV_ACTION_IGNORE | (0 << 4),
2277 /*120*/ VTRECV_ACTION_IGNORE | (0 << 4),
2278 /*121*/ VTRECV_ACTION_IGNORE | (0 << 4),
2279 /*122*/ VTRECV_ACTION_IGNORE | (0 << 4),
2280 /*123*/ VTRECV_ACTION_IGNORE | (0 << 4),
2281 /*124*/ VTRECV_ACTION_IGNORE | (0 << 4),
2282 /*125*/ VTRECV_ACTION_IGNORE | (0 << 4),
2283 /*126*/ VTRECV_ACTION_IGNORE | (0 << 4),
2284 /*127*/ VTRECV_ACTION_IGNORE | (0 << 4),
2285 /*128*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2286 /*129*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2287 /*130*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2288 /*131*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2289 /*132*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2290 /*133*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2291 /*134*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2292 /*135*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2293 /*136*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2294 /*137*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2295 /*138*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2296 /*139*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2297 /*140*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2298 /*141*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2299 /*142*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2300 /*143*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2301 /*144*/ 0 | (VTRECV_STATE_DCS_ENTRY << 4),
2302 /*145*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2303 /*146*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2304 /*147*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2305 /*148*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2306 /*149*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2307 /*150*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2308 /*151*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2309 /*152*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
2310 /*153*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2311 /*154*/ VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4),
2312 /*155*/ 0 | (VTRECV_STATE_CSI_ENTRY << 4),
2313 /*156*/ 0 | (VTRECV_STATE_GROUND << 4),
2314 /*157*/ 0 | (VTRECV_STATE_OSC_STRING << 4),
2315 /*158*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
2316 /*159*/ 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4),
2317 },
2318};
2319#else
2320typedef struct
2321{
2322 int state;
2323 unsigned char code_start;
2324 unsigned char code_end;
2325 state_change_t state_change;
2326} state_table_t;
2327
2328static const state_table_t table[] = {
2329 /*
2330 */
2331 { VTRECV_STATE_CSI_ENTRY, 0, 23, VTRECV_ACTION_EXECUTE | (0 << 4) },
2332 { VTRECV_STATE_CSI_ENTRY, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2333 { VTRECV_STATE_CSI_ENTRY, 25, 25, VTRECV_ACTION_EXECUTE | (0 << 4) },
2334 { VTRECV_STATE_CSI_ENTRY, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2335 { VTRECV_STATE_CSI_ENTRY, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2336 { VTRECV_STATE_CSI_ENTRY, 28, 31, VTRECV_ACTION_EXECUTE | (0 << 4) },
2337 { VTRECV_STATE_CSI_ENTRY, 32, 47, VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4) },
2338 { VTRECV_STATE_CSI_ENTRY, 48, 57, VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4) },
2339 { VTRECV_STATE_CSI_ENTRY, 58, 58, 0 | (VTRECV_STATE_CSI_IGNORE << 4) },
2340 { VTRECV_STATE_CSI_ENTRY, 59, 59, VTRECV_ACTION_PARAM | (VTRECV_STATE_CSI_PARAM << 4) },
2341 { VTRECV_STATE_CSI_ENTRY, 60, 63, VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_PARAM << 4) },
2342 { VTRECV_STATE_CSI_ENTRY, 64, 126, VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2343 { VTRECV_STATE_CSI_ENTRY, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2344 { VTRECV_STATE_CSI_ENTRY, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2345 { VTRECV_STATE_CSI_ENTRY, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2346 { VTRECV_STATE_CSI_ENTRY, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2347 { VTRECV_STATE_CSI_ENTRY, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2348 { VTRECV_STATE_CSI_ENTRY, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2349 { VTRECV_STATE_CSI_ENTRY, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2350 { VTRECV_STATE_CSI_ENTRY, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2351 { VTRECV_STATE_CSI_ENTRY, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2352 { VTRECV_STATE_CSI_ENTRY, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2353 /*
2354 */
2355 { VTRECV_STATE_CSI_IGNORE, 0, 23, VTRECV_ACTION_EXECUTE | (0 << 4) },
2356 { VTRECV_STATE_CSI_IGNORE, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2357 { VTRECV_STATE_CSI_IGNORE, 25, 25, VTRECV_ACTION_EXECUTE | (0 << 4) },
2358 { VTRECV_STATE_CSI_IGNORE, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2359 { VTRECV_STATE_CSI_IGNORE, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2360 { VTRECV_STATE_CSI_IGNORE, 28, 31, VTRECV_ACTION_EXECUTE | (0 << 4) },
2361 { VTRECV_STATE_CSI_IGNORE, 32, 63, VTRECV_ACTION_IGNORE | (0 << 4) },
2362 { VTRECV_STATE_CSI_IGNORE, 64, 126, 0 | (VTRECV_STATE_GROUND << 4) },
2363 { VTRECV_STATE_CSI_IGNORE, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2364 { VTRECV_STATE_CSI_IGNORE, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2365 { VTRECV_STATE_CSI_IGNORE, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2366 { VTRECV_STATE_CSI_IGNORE, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2367 { VTRECV_STATE_CSI_IGNORE, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2368 { VTRECV_STATE_CSI_IGNORE, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2369 { VTRECV_STATE_CSI_IGNORE, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2370 { VTRECV_STATE_CSI_IGNORE, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2371 { VTRECV_STATE_CSI_IGNORE, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2372 { VTRECV_STATE_CSI_IGNORE, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2373 /*
2374 */
2375 { VTRECV_STATE_CSI_INTERMEDIATE, 0, 23, VTRECV_ACTION_EXECUTE | (0 << 4) },
2376 { VTRECV_STATE_CSI_INTERMEDIATE, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2377 { VTRECV_STATE_CSI_INTERMEDIATE, 25, 25, VTRECV_ACTION_EXECUTE | (0 << 4) },
2378 { VTRECV_STATE_CSI_INTERMEDIATE, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2379 { VTRECV_STATE_CSI_INTERMEDIATE, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2380 { VTRECV_STATE_CSI_INTERMEDIATE, 28, 31, VTRECV_ACTION_EXECUTE | (0 << 4) },
2381 { VTRECV_STATE_CSI_INTERMEDIATE, 32, 47, VTRECV_ACTION_COLLECT | (0 << 4) },
2382 { VTRECV_STATE_CSI_INTERMEDIATE, 48, 63, 0 | (VTRECV_STATE_CSI_IGNORE << 4) },
2383 { VTRECV_STATE_CSI_INTERMEDIATE, 64, 126, VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2384 { VTRECV_STATE_CSI_INTERMEDIATE, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2385 { VTRECV_STATE_CSI_INTERMEDIATE, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2386 { VTRECV_STATE_CSI_INTERMEDIATE, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2387 { VTRECV_STATE_CSI_INTERMEDIATE, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2388 { VTRECV_STATE_CSI_INTERMEDIATE, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2389 { VTRECV_STATE_CSI_INTERMEDIATE, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2390 { VTRECV_STATE_CSI_INTERMEDIATE, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2391 { VTRECV_STATE_CSI_INTERMEDIATE, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2392 { VTRECV_STATE_CSI_INTERMEDIATE, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2393 { VTRECV_STATE_CSI_INTERMEDIATE, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2394 /*
2395 */
2396 { VTRECV_STATE_CSI_PARAM, 0, 23, VTRECV_ACTION_EXECUTE | (0 << 4) },
2397 { VTRECV_STATE_CSI_PARAM, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2398 { VTRECV_STATE_CSI_PARAM, 25, 25, VTRECV_ACTION_EXECUTE | (0 << 4) },
2399 { VTRECV_STATE_CSI_PARAM, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2400 { VTRECV_STATE_CSI_PARAM, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2401 { VTRECV_STATE_CSI_PARAM, 28, 31, VTRECV_ACTION_EXECUTE | (0 << 4) },
2402 { VTRECV_STATE_CSI_PARAM, 32, 47, VTRECV_ACTION_COLLECT | (VTRECV_STATE_CSI_INTERMEDIATE << 4) },
2403 { VTRECV_STATE_CSI_PARAM, 48, 57, VTRECV_ACTION_PARAM | (0 << 4) },
2404 { VTRECV_STATE_CSI_PARAM, 58, 58, 0 | (VTRECV_STATE_CSI_IGNORE << 4) },
2405 { VTRECV_STATE_CSI_PARAM, 59, 59, VTRECV_ACTION_PARAM | (0 << 4) },
2406 { VTRECV_STATE_CSI_PARAM, 60, 63, 0 | (VTRECV_STATE_CSI_IGNORE << 4) },
2407 { VTRECV_STATE_CSI_PARAM, 64, 126, VTRECV_ACTION_CSI_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2408 { VTRECV_STATE_CSI_PARAM, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2409 { VTRECV_STATE_CSI_PARAM, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2410 { VTRECV_STATE_CSI_PARAM, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2411 { VTRECV_STATE_CSI_PARAM, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2412 { VTRECV_STATE_CSI_PARAM, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2413 { VTRECV_STATE_CSI_PARAM, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2414 { VTRECV_STATE_CSI_PARAM, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2415 { VTRECV_STATE_CSI_PARAM, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2416 { VTRECV_STATE_CSI_PARAM, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2417 { VTRECV_STATE_CSI_PARAM, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2418 /*
2419 */
2420 { VTRECV_STATE_DCS_ENTRY, 0, 23, VTRECV_ACTION_IGNORE | (0 << 4) },
2421 { VTRECV_STATE_DCS_ENTRY, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2422 { VTRECV_STATE_DCS_ENTRY, 25, 25, VTRECV_ACTION_IGNORE | (0 << 4) },
2423 { VTRECV_STATE_DCS_ENTRY, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2424 { VTRECV_STATE_DCS_ENTRY, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2425 { VTRECV_STATE_DCS_ENTRY, 28, 31, VTRECV_ACTION_IGNORE | (0 << 4) },
2426 { VTRECV_STATE_DCS_ENTRY, 32, 47, VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4) },
2427 { VTRECV_STATE_DCS_ENTRY, 48, 57, VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4) },
2428 { VTRECV_STATE_DCS_ENTRY, 58, 58, 0 | (VTRECV_STATE_DCS_IGNORE << 4) },
2429 { VTRECV_STATE_DCS_ENTRY, 59, 59, VTRECV_ACTION_PARAM | (VTRECV_STATE_DCS_PARAM << 4) },
2430 { VTRECV_STATE_DCS_ENTRY, 60, 63, VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_PARAM << 4) },
2431 { VTRECV_STATE_DCS_ENTRY, 64, 126, 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4) },
2432 { VTRECV_STATE_DCS_ENTRY, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2433 { VTRECV_STATE_DCS_ENTRY, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2434 { VTRECV_STATE_DCS_ENTRY, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2435 { VTRECV_STATE_DCS_ENTRY, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2436 { VTRECV_STATE_DCS_ENTRY, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2437 { VTRECV_STATE_DCS_ENTRY, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2438 { VTRECV_STATE_DCS_ENTRY, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2439 { VTRECV_STATE_DCS_ENTRY, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2440 { VTRECV_STATE_DCS_ENTRY, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2441 { VTRECV_STATE_DCS_ENTRY, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2442 /*
2443 */
2444 { VTRECV_STATE_DCS_IGNORE, 0, 23, VTRECV_ACTION_IGNORE | (0 << 4) },
2445 { VTRECV_STATE_DCS_IGNORE, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2446 { VTRECV_STATE_DCS_IGNORE, 25, 25, VTRECV_ACTION_IGNORE | (0 << 4) },
2447 { VTRECV_STATE_DCS_IGNORE, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2448 { VTRECV_STATE_DCS_IGNORE, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2449 { VTRECV_STATE_DCS_IGNORE, 28, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2450 { VTRECV_STATE_DCS_IGNORE, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2451 { VTRECV_STATE_DCS_IGNORE, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2452 { VTRECV_STATE_DCS_IGNORE, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2453 { VTRECV_STATE_DCS_IGNORE, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2454 { VTRECV_STATE_DCS_IGNORE, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2455 { VTRECV_STATE_DCS_IGNORE, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2456 { VTRECV_STATE_DCS_IGNORE, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2457 { VTRECV_STATE_DCS_IGNORE, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2458 { VTRECV_STATE_DCS_IGNORE, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2459 /*
2460 */
2461 { VTRECV_STATE_DCS_INTERMEDIATE, 0, 23, VTRECV_ACTION_IGNORE | (0 << 4) },
2462 { VTRECV_STATE_DCS_INTERMEDIATE, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2463 { VTRECV_STATE_DCS_INTERMEDIATE, 25, 25, VTRECV_ACTION_IGNORE | (0 << 4) },
2464 { VTRECV_STATE_DCS_INTERMEDIATE, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2465 { VTRECV_STATE_DCS_INTERMEDIATE, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2466 { VTRECV_STATE_DCS_INTERMEDIATE, 28, 31, VTRECV_ACTION_IGNORE | (0 << 4) },
2467 { VTRECV_STATE_DCS_INTERMEDIATE, 32, 47, VTRECV_ACTION_COLLECT | (0 << 4) },
2468 { VTRECV_STATE_DCS_INTERMEDIATE, 48, 63, 0 | (VTRECV_STATE_DCS_IGNORE << 4) },
2469 { VTRECV_STATE_DCS_INTERMEDIATE, 64, 126, 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4) },
2470 { VTRECV_STATE_DCS_INTERMEDIATE, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2471 { VTRECV_STATE_DCS_INTERMEDIATE, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2472 { VTRECV_STATE_DCS_INTERMEDIATE, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2473 { VTRECV_STATE_DCS_INTERMEDIATE, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2474 { VTRECV_STATE_DCS_INTERMEDIATE, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2475 { VTRECV_STATE_DCS_INTERMEDIATE, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2476 { VTRECV_STATE_DCS_INTERMEDIATE, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2477 { VTRECV_STATE_DCS_INTERMEDIATE, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2478 { VTRECV_STATE_DCS_INTERMEDIATE, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2479 { VTRECV_STATE_DCS_INTERMEDIATE, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2480 /*
2481 */
2482 { VTRECV_STATE_DCS_PARAM, 0, 23, VTRECV_ACTION_IGNORE | (0 << 4) },
2483 { VTRECV_STATE_DCS_PARAM, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2484 { VTRECV_STATE_DCS_PARAM, 25, 25, VTRECV_ACTION_IGNORE | (0 << 4) },
2485 { VTRECV_STATE_DCS_PARAM, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2486 { VTRECV_STATE_DCS_PARAM, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2487 { VTRECV_STATE_DCS_PARAM, 28, 31, VTRECV_ACTION_IGNORE | (0 << 4) },
2488 { VTRECV_STATE_DCS_PARAM, 32, 47, VTRECV_ACTION_COLLECT | (VTRECV_STATE_DCS_INTERMEDIATE << 4) },
2489 { VTRECV_STATE_DCS_PARAM, 48, 57, VTRECV_ACTION_PARAM | (0 << 4) },
2490 { VTRECV_STATE_DCS_PARAM, 58, 58, 0 | (VTRECV_STATE_DCS_IGNORE << 4) },
2491 { VTRECV_STATE_DCS_PARAM, 59, 59, VTRECV_ACTION_PARAM | (0 << 4) },
2492 { VTRECV_STATE_DCS_PARAM, 60, 63, 0 | (VTRECV_STATE_DCS_IGNORE << 4) },
2493 { VTRECV_STATE_DCS_PARAM, 64, 126, 0 | (VTRECV_STATE_DCS_PASSTHROUGH << 4) },
2494 { VTRECV_STATE_DCS_PARAM, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2495 { VTRECV_STATE_DCS_PARAM, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2496 { VTRECV_STATE_DCS_PARAM, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2497 { VTRECV_STATE_DCS_PARAM, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2498 { VTRECV_STATE_DCS_PARAM, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2499 { VTRECV_STATE_DCS_PARAM, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2500 { VTRECV_STATE_DCS_PARAM, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2501 { VTRECV_STATE_DCS_PARAM, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2502 { VTRECV_STATE_DCS_PARAM, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2503 { VTRECV_STATE_DCS_PARAM, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2504 /*
2505 */
2506 { VTRECV_STATE_DCS_PASSTHROUGH, 0, 23, VTRECV_ACTION_PUT | (0 << 4) },
2507 { VTRECV_STATE_DCS_PASSTHROUGH, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2508 { VTRECV_STATE_DCS_PASSTHROUGH, 25, 25, VTRECV_ACTION_PUT | (0 << 4) },
2509 { VTRECV_STATE_DCS_PASSTHROUGH, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2510 { VTRECV_STATE_DCS_PASSTHROUGH, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2511 { VTRECV_STATE_DCS_PASSTHROUGH, 28, 126, VTRECV_ACTION_PUT | (0 << 4) },
2512 { VTRECV_STATE_DCS_PASSTHROUGH, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2513 { VTRECV_STATE_DCS_PASSTHROUGH, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2514 { VTRECV_STATE_DCS_PASSTHROUGH, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2515 { VTRECV_STATE_DCS_PASSTHROUGH, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2516 { VTRECV_STATE_DCS_PASSTHROUGH, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2517 { VTRECV_STATE_DCS_PASSTHROUGH, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2518 { VTRECV_STATE_DCS_PASSTHROUGH, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2519 { VTRECV_STATE_DCS_PASSTHROUGH, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2520 { VTRECV_STATE_DCS_PASSTHROUGH, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2521 { VTRECV_STATE_DCS_PASSTHROUGH, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2522 /*
2523 */
2524 { VTRECV_STATE_ESCAPE, 0, 23, VTRECV_ACTION_EXECUTE | (0 << 4) },
2525 { VTRECV_STATE_ESCAPE, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2526 { VTRECV_STATE_ESCAPE, 25, 25, VTRECV_ACTION_EXECUTE | (0 << 4) },
2527 { VTRECV_STATE_ESCAPE, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2528 { VTRECV_STATE_ESCAPE, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2529 { VTRECV_STATE_ESCAPE, 28, 31, VTRECV_ACTION_EXECUTE | (0 << 4) },
2530 { VTRECV_STATE_ESCAPE, 32, 47, VTRECV_ACTION_COLLECT | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4) },
2531 { VTRECV_STATE_ESCAPE, 48, 79, VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2532 { VTRECV_STATE_ESCAPE, 80, 80, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2533 { VTRECV_STATE_ESCAPE, 81, 87, VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2534 { VTRECV_STATE_ESCAPE, 88, 88, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2535 { VTRECV_STATE_ESCAPE, 89, 90, VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2536 { VTRECV_STATE_ESCAPE, 91, 91, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2537 { VTRECV_STATE_ESCAPE, 92, 92, VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2538 { VTRECV_STATE_ESCAPE, 93, 93, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2539 { VTRECV_STATE_ESCAPE, 94, 95, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2540 { VTRECV_STATE_ESCAPE, 96, 126, VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2541 { VTRECV_STATE_ESCAPE, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2542 { VTRECV_STATE_ESCAPE, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2543 { VTRECV_STATE_ESCAPE, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2544 { VTRECV_STATE_ESCAPE, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2545 { VTRECV_STATE_ESCAPE, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2546 { VTRECV_STATE_ESCAPE, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2547 { VTRECV_STATE_ESCAPE, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2548 { VTRECV_STATE_ESCAPE, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2549 { VTRECV_STATE_ESCAPE, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2550 { VTRECV_STATE_ESCAPE, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2551 /*
2552 */
2553 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 0, 23, VTRECV_ACTION_EXECUTE | (0 << 4) },
2554 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2555 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 25, 25, VTRECV_ACTION_EXECUTE | (0 << 4) },
2556 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2557 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2558 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 28, 31, VTRECV_ACTION_EXECUTE | (0 << 4) },
2559 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 32, 47, VTRECV_ACTION_COLLECT | (0 << 4) },
2560 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 48, 126, VTRECV_ACTION_ESC_DISPATCH | (VTRECV_STATE_GROUND << 4) },
2561 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 127, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2562 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2563 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2564 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2565 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2566 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2567 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2568 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2569 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2570 { VTRECV_STATE_ESCAPE_INTERMEDIATE, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2571 /*
2572 */
2573 { VTRECV_STATE_GROUND, 0, 23, VTRECV_ACTION_EXECUTE | (0 << 4) },
2574 { VTRECV_STATE_GROUND, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2575 { VTRECV_STATE_GROUND, 25, 25, VTRECV_ACTION_EXECUTE | (0 << 4) },
2576 { VTRECV_STATE_GROUND, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2577 { VTRECV_STATE_GROUND, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2578 { VTRECV_STATE_GROUND, 28, 31, VTRECV_ACTION_EXECUTE | (0 << 4) },
2579 { VTRECV_STATE_GROUND, 32, 127, VTRECV_ACTION_PRINT | (0 << 4) },
2580 { VTRECV_STATE_GROUND, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2581 { VTRECV_STATE_GROUND, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2582 { VTRECV_STATE_GROUND, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2583 { VTRECV_STATE_GROUND, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2584 { VTRECV_STATE_GROUND, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2585 { VTRECV_STATE_GROUND, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2586 { VTRECV_STATE_GROUND, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2587 { VTRECV_STATE_GROUND, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2588 { VTRECV_STATE_GROUND, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2589 /*
2590 */
2591 { VTRECV_STATE_OSC_STRING, 0, 23, VTRECV_ACTION_IGNORE | (0 << 4) },
2592 { VTRECV_STATE_OSC_STRING, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2593 { VTRECV_STATE_OSC_STRING, 25, 25, VTRECV_ACTION_IGNORE | (0 << 4) },
2594 { VTRECV_STATE_OSC_STRING, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2595 { VTRECV_STATE_OSC_STRING, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2596 { VTRECV_STATE_OSC_STRING, 28, 31, VTRECV_ACTION_IGNORE | (0 << 4) },
2597 { VTRECV_STATE_OSC_STRING, 32, 127, VTRECV_ACTION_OSC_PUT | (0 << 4) },
2598 { VTRECV_STATE_OSC_STRING, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2599 { VTRECV_STATE_OSC_STRING, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2600 { VTRECV_STATE_OSC_STRING, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2601 { VTRECV_STATE_OSC_STRING, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2602 { VTRECV_STATE_OSC_STRING, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2603 { VTRECV_STATE_OSC_STRING, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2604 { VTRECV_STATE_OSC_STRING, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2605 { VTRECV_STATE_OSC_STRING, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2606 { VTRECV_STATE_OSC_STRING, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2607 /*
2608 */
2609 { VTRECV_STATE_SOS_PM_APC_STRING, 0, 23, VTRECV_ACTION_IGNORE | (0 << 4) },
2610 { VTRECV_STATE_SOS_PM_APC_STRING, 24, 24, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2611 { VTRECV_STATE_SOS_PM_APC_STRING, 25, 25, VTRECV_ACTION_IGNORE | (0 << 4) },
2612 { VTRECV_STATE_SOS_PM_APC_STRING, 26, 26, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2613 { VTRECV_STATE_SOS_PM_APC_STRING, 27, 27, 0 | (VTRECV_STATE_ESCAPE << 4) },
2614 { VTRECV_STATE_SOS_PM_APC_STRING, 28, 127, VTRECV_ACTION_IGNORE | (0 << 4) },
2615 { VTRECV_STATE_SOS_PM_APC_STRING, 128, 143, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2616 { VTRECV_STATE_SOS_PM_APC_STRING, 144, 144, 0 | (VTRECV_STATE_DCS_ENTRY << 4) },
2617 { VTRECV_STATE_SOS_PM_APC_STRING, 145, 151, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2618 { VTRECV_STATE_SOS_PM_APC_STRING, 152, 152, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2619 { VTRECV_STATE_SOS_PM_APC_STRING, 153, 154, VTRECV_ACTION_EXECUTE | (VTRECV_STATE_GROUND << 4) },
2620 { VTRECV_STATE_SOS_PM_APC_STRING, 155, 155, 0 | (VTRECV_STATE_CSI_ENTRY << 4) },
2621 { VTRECV_STATE_SOS_PM_APC_STRING, 156, 156, 0 | (VTRECV_STATE_GROUND << 4) },
2622 { VTRECV_STATE_SOS_PM_APC_STRING, 157, 157, 0 | (VTRECV_STATE_OSC_STRING << 4) },
2623 { VTRECV_STATE_SOS_PM_APC_STRING, 158, 159, 0 | (VTRECV_STATE_SOS_PM_APC_STRING << 4) },
2624};
2625#endif
2626
2627static const vtrecv_action_t ENTRY_ACTIONS[] = {
2628 VTRECV_ACTION_CLEAR, /* CSI_ENTRY */
2629 0 /* none for CSI_IGNORE */,
2630 0 /* none for CSI_INTERMEDIATE */,
2631 0 /* none for CSI_PARAM */,
2632 VTRECV_ACTION_CLEAR, /* DCS_ENTRY */
2633 0 /* none for DCS_IGNORE */,
2634 0 /* none for DCS_INTERMEDIATE */,
2635 0 /* none for DCS_PARAM */,
2636 VTRECV_ACTION_HOOK, /* DCS_PASSTHROUGH */
2637 VTRECV_ACTION_CLEAR, /* ESCAPE */
2638 0 /* none for ESCAPE_INTERMEDIATE */,
2639 0 /* none for GROUND */,
2640 VTRECV_ACTION_OSC_START, /* OSC_STRING */
2641 0 /* none for SOS_PM_APC_STRING */,
2642};
2643
2644static const vtrecv_action_t EXIT_ACTIONS[] = {
2645 0 /* none for CSI_ENTRY */,
2646 0 /* none for CSI_IGNORE */,
2647 0 /* none for CSI_INTERMEDIATE */,
2648 0 /* none for CSI_PARAM */,
2649 0 /* none for DCS_ENTRY */,
2650 0 /* none for DCS_IGNORE */,
2651 0 /* none for DCS_INTERMEDIATE */,
2652 0 /* none for DCS_PARAM */,
2653 VTRECV_ACTION_UNHOOK, /* DCS_PASSTHROUGH */
2654 0 /* none for ESCAPE */,
2655 0 /* none for ESCAPE_INTERMEDIATE */,
2656 0 /* none for GROUND */,
2657 VTRECV_ACTION_OSC_END, /* OSC_STRING */
2658 0 /* none for SOS_PM_APC_STRING */,
2659};
2660
2661state_change_t GET_STATE_TABLE(const int state, const int ch)
2662{
2663 if ((state == VTRECV_STATE_GROUND) && (((ch >= 32) && (ch <= 127)) || (ch >= 160))) {
2664 return VTRECV_ACTION_PRINT | (0 << 4);
2665 }
2666#if (USE_ORIGINAL_LUT==1)
2667 /*
2668 * テーブル参照による実現。
2669 * 固定時間で動作するが、コードサイズは比較的大きい。
2670 */
2671 return STATE_TABLE[state - 1][ch];
2672#else
2673 /*
2674 * プログラムによる線形探索バージョン。
2675 * テーブルの後方にあるデータになるほど動作は遅い。
2676 * コードサイズはテーブル参照よりも小さい。
2677 */
2678 const int N = sizeof(table) / sizeof(table[0]);
2679 const state_table_t *tp = &table[0];
2680 int i;
2681 for (i = 0; i < N; i++) {
2682 if (tp->state == state) {
2683 if ((tp->code_start <= ch) && (ch <= tp->code_end)) {
2684 return tp->state_change;
2685 }
2686 }
2687 tp++;
2688 }
2689 return 0;
2690#endif
2691}
2692
2693vtrecv_action_t GET_ENTRY_ACTIONS(const int state)
2694{
2695 return ENTRY_ACTIONS[state];
2696}
2697
2698vtrecv_action_t GET_EXIT_ACTIONS(const int state)
2699{
2700 return EXIT_ACTIONS[state];
2701}
2702
2703void vtrecv_init(vtrecv_t *parser, vtrecv_callback_t cb)
2704{
2705 parser->utf8_state = 0;
2706 parser->ch = 0;
2707 parser->state = VTRECV_STATE_GROUND;
2708 parser->num_intermediate_chars = 0;
2709 parser->num_params = 0;
2710 parser->ignore_flagged = 0;
2711 parser->cb = cb;
2712}
2713
2714static void do_action(vtrecv_t *parser, vtrecv_action_t action, unsigned int ch)
2715{
2716 /* Some actions we handle internally (like parsing parameters), others
2717 * we hand to our client for processing */
2718
2719 switch (action) {
2720 case VTRECV_ACTION_PRINT:
2721 case VTRECV_ACTION_EXECUTE:
2722 case VTRECV_ACTION_HOOK:
2723 case VTRECV_ACTION_PUT:
2724 case VTRECV_ACTION_OSC_START:
2725 case VTRECV_ACTION_OSC_PUT:
2726 case VTRECV_ACTION_OSC_END:
2727 case VTRECV_ACTION_UNHOOK:
2728 case VTRECV_ACTION_CSI_DISPATCH:
2729 case VTRECV_ACTION_ESC_DISPATCH:
2730 parser->cb(parser, action, ch);
2731 break;
2732
2733 case VTRECV_ACTION_IGNORE:
2734 /* do nothing */
2735 break;
2736
2737 case VTRECV_ACTION_COLLECT:
2738 {
2739 /* Append the character to the intermediate params */
2740 if (parser->num_intermediate_chars + 1 > MAX_INTERMEDIATE_CHARS) {
2741 parser->ignore_flagged = 1;
2742 }
2743 else {
2744 parser->intermediate_chars[parser->num_intermediate_chars++] = ch;
2745 }
2746
2747 break;
2748 }
2749
2750 case VTRECV_ACTION_PARAM:
2751 {
2752 /* process the param character */
2753 if (ch == ';') {
2754 parser->num_params += 1;
2755 parser->params[parser->num_params - 1] = 0;
2756 }
2757 else {
2758 /* the character is a digit */
2759 int current_param;
2760
2761 if (parser->num_params == 0) {
2762 parser->num_params = 1;
2763 parser->params[0] = 0;
2764 }
2765
2766 current_param = parser->num_params - 1;
2767 parser->params[current_param] *= 10;
2768 parser->params[current_param] += (ch - '0');
2769 }
2770
2771 break;
2772 }
2773
2774 case VTRECV_ACTION_CLEAR:
2775 parser->num_intermediate_chars = 0;
2776 parser->num_params = 0;
2777 parser->ignore_flagged = 0;
2778 break;
2779
2780 default:
2781 parser->cb(parser, VTRECV_ACTION_ERROR, 0);
2782 break;
2783 }
2784}
2785
2786static void do_state_change(vtrecv_t *parser, state_change_t change, unsigned int ch)
2787{
2788 /* A state change is an action and/or a new state to transition to. */
2789
2790 vtrecv_state_t new_state = STATE(change);
2791 vtrecv_action_t action = ACTION(change);
2792
2793 if (new_state) {
2794 /*
2795 * Perform up to three actions:
2796 * 1. the exit action of the old state
2797 * 2. the action associated with the transition
2798 * 3. the entry action of the new state
2799 */
2800
2801 vtrecv_action_t exit_action = GET_EXIT_ACTIONS(parser->state - 1);
2802 vtrecv_action_t entry_action = GET_ENTRY_ACTIONS(new_state - 1);
2803
2804 if (exit_action) {
2805 do_action(parser, exit_action, 0);
2806 }
2807
2808 if (action) {
2809 do_action(parser, action, ch);
2810 }
2811
2812 if (entry_action) {
2813 do_action(parser, entry_action, 0);
2814 }
2815
2816 parser->state = new_state;
2817 }
2818 else {
2819 do_action(parser, action, ch);
2820 }
2821}
2822
2823void vtrecv_execute(vtrecv_t *parser, unsigned char *data, int len)
2824{
2825 int i;
2826 for (i = 0; i < len; i++) {
2827 unsigned char c = data[i];
2828 /* UTF-8 => UNICODE */
2829 switch (parser->utf8_state) {
2830 case 0:
2831 if (c <= 0x7F) {
2832 parser->ch = c;
2833 break;
2834 }
2835 else if ((c & 0xE0) == 0xC0) {
2836 parser->ch = (c & 0x1F) << 6;
2837 parser->utf8_state = 1;
2838 continue;
2839 }
2840 else if ((c & 0xF0) == 0xE0) {
2841 parser->ch = (c & 0x0F) << 12;
2842 parser->utf8_state = 2;
2843 continue;
2844 }
2845 else if ((c & 0xF8) == 0xF0) {
2846 parser->ch = (c & 0x07) << 18;
2847 parser->utf8_state = 3;
2848 continue;
2849 }
2850 else if ((c & 0xFC) == 0xF8) {
2851 parser->ch = (c & 0x03) << 24;
2852 parser->utf8_state = 4;
2853 continue;
2854 }
2855 else if ((c & 0xFE) == 0xFC) {
2856 parser->ch = (c & 0x01) << 30;
2857 parser->utf8_state = 5;
2858 continue;
2859 }
2860 else if (c == 0xFF) {
2861 return;
2862 }
2863 default:
2864 if ((c & 0xC0) == 0x80) {
2865 parser->utf8_state--;
2866 parser->ch |= (c & 0x3F) << (6 * parser->utf8_state);
2867 if (parser->utf8_state != 0)
2868 continue;
2869 }
2870 /* UTF-8 Error */
2871 else {
2872 i--;
2873 parser->utf8_state = 0;
2874 }
2875 break;
2876 }
2877 state_change_t change = GET_STATE_TABLE(parser->state, parser->ch);
2878 do_state_change(parser, change, parser->ch);
2879 parser->ch = 0;
2880 }
2881}
Note: See TracBrowser for help on using the repository browser.