source: asp3_tinet_ecnl_arm/trunk/ntshell/fatfs/sdfs.c@ 352

Last change on this file since 352 was 352, checked in by coas-nagasima, 6 years ago

arm向けASP3版ECNLを追加
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1/* mbed Microcontroller Library
2 * Copyright (c) 2006-2012 ARM Limited
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23/* Introduction
24 * ------------
25 * SD and MMC cards support a number of interfaces, but common to them all
26 * is one based on SPI. This is the one I'm implmenting because it means
27 * it is much more portable even though not so performant, and we already
28 * have the mbed SPI Interface!
29 *
30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
32 *
33 * SPI Startup
34 * -----------
35 * The SD card powers up in SD mode. The SPI interface mode is selected by
36 * asserting CS low and sending the reset command (CMD0). The card will
37 * respond with a (R1) response.
38 *
39 * CMD8 is optionally sent to determine the voltage range supported, and
40 * indirectly determine whether it is a version 1.x SD/non-SD card or
41 * version 2.x. I'll just ignore this for now.
42 *
43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
45 *
46 * You should also indicate whether the host supports High Capicity cards,
47 * and check whether the card is high capacity - i'll also ignore this
48 *
49 * SPI Protocol
50 * ------------
51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
52 * the host starting every bus transaction by asserting the CS signal low. The
53 * card always responds to commands, data blocks and errors.
54 *
55 * The protocol supports a CRC, but by default it is off (except for the
56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
57 * I'll leave the CRC off I think!
58 *
59 * Standard capacity cards have variable data block sizes, whereas High
60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
61 * just always use the Standard Capacity cards with a block size of 512 bytes.
62 * This is set with CMD16.
63 *
64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
66 * the card gets a read command, it responds with a response token, and then
67 * a data token or an error.
68 *
69 * SPI Command Format
70 * ------------------
71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
72 *
73 * +---------------+------------+------------+-----------+----------+--------------+
74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
75 * +---------------+------------+------------+-----------+----------+--------------+
76 *
77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
78 *
79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
80 *
81 * SPI Response Format
82 * -------------------
83 * The main response format (R1) is a status byte (normally zero). Key flags:
84 * idle - 1 if the card is in an idle state/initialising
85 * cmd - 1 if an illegal command code was detected
86 *
87 * +-------------------------------------------------+
88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
89 * +-------------------------------------------------+
90 *
91 * R1b is the same, except it is followed by a busy signal (zeros) until
92 * the first non-zero byte when it is ready again.
93 *
94 * Data Response Token
95 * -------------------
96 * Every data block written to the card is acknowledged by a byte
97 * response token
98 *
99 * +----------------------+
100 * | xxx | 0 | status | 1 |
101 * +----------------------+
102 * 010 - OK!
103 * 101 - CRC Error
104 * 110 - Write Error
105 *
106 * Single Block Read and Write
107 * ---------------------------
108 *
109 * Block transfers have a byte header, followed by the data, followed
110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
111 *
112 * +------+---------+---------+- - - -+---------+-----------+----------+
113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
114 * +------+---------+---------+- - - -+---------+-----------+----------+
115 */
116#include "sdfs.h"
117//#include "mbed_debug.h"
118#include "mbed_wait_api.h"
119
120#define debug(str, ...)
121#define debug_if(cond, strt, ...) if(cond){ debug(str, __ARGS__); }
122
123static int sdfs_initialise_card_v1(sdfs_t *obj);
124static int sdfs_initialise_card_v2(sdfs_t *obj);
125static int sdfs__cmd(sdfs_t *obj, int cmd, int arg);
126static int sdfs__cmd8(sdfs_t *obj);
127static int sdfs__cmd58(sdfs_t *obj);
128static uint64_t sdfs__sd_sectors(sdfs_t *obj);
129static int sdfs__write(sdfs_t *obj, const uint8_t*buffer, uint32_t length);
130static int sdfs__read(sdfs_t *obj, uint8_t *buffer, uint32_t length);
131
132#define SD_COMMAND_TIMEOUT 5000
133
134#define SD_DBG 0
135
136sdfs_init(sdfs_t *obj, PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name)
137{
138 obj->name = name;
139 spi_init(&obj->_spi, mosi, miso, sclk, NC);
140 gpio_init_out(&obj->_cs, cs);
141 gpio_write(&obj->_cs, 1);
142
143 // Set default to 100kHz for initialisation and 1MHz for data transfer
144 obj->_init_sck = 100000;
145 obj->_transfer_sck = 1000000;
146}
147
148#define R1_IDLE_STATE (1 << 0)
149#define R1_ERASE_RESET (1 << 1)
150#define R1_ILLEGAL_COMMAND (1 << 2)
151#define R1_COM_CRC_ERROR (1 << 3)
152#define R1_ERASE_SEQUENCE_ERROR (1 << 4)
153#define R1_ADDRESS_ERROR (1 << 5)
154#define R1_PARAMETER_ERROR (1 << 6)
155
156// Types
157#define SDCARD_FAIL 0 //!< v1.x Standard Capacity
158#define SDCARD_V1 1 //!< v2.x Standard Capacity
159#define SDCARD_V2 2 //!< v2.x High Capacity
160#define SDCARD_V2HC 3 //!< Not recognised as an SD Card
161
162int sdfs_initialise_card(sdfs_t *obj)
163{
164 spi_format(&obj->_spi, 8, 0, 0);
165 // Set to 100kHz for initialisation, and clock card with cs = 1
166 spi_frequency(&obj->_spi, obj->_init_sck);
167 gpio_write(&obj->_cs, 1);
168 for (int i = 0; i < 16; i++) {
169 spi_master_write(&obj->_spi, 0xFF);
170 }
171
172 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
173 if (sdfs__cmd(obj, 0, 0) != R1_IDLE_STATE) {
174 debug("No disk, or could not put SD card in to SPI idle state\n");
175 return SDCARD_FAIL;
176 }
177
178 // send CMD8 to determine whther it is ver 2.x
179 int r = sdfs__cmd8(obj);
180 if (r == R1_IDLE_STATE) {
181 return sdfs_initialise_card_v2(obj);
182 }
183 else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
184 return sdfs_initialise_card_v1(obj);
185 }
186 else {
187 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
188 return SDCARD_FAIL;
189 }
190}
191
192static int sdfs_initialise_card_v1(sdfs_t *obj)
193{
194 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
195 sdfs__cmd(obj, 55, 0);
196 if (sdfs__cmd(obj, 41, 0) == 0) {
197 obj->cdv = 512;
198 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
199 return SDCARD_V1;
200 }
201 }
202
203 debug("Timeout waiting for v1.x card\n");
204 return SDCARD_FAIL;
205}
206
207static int sdfs_initialise_card_v2(sdfs_t *obj)
208{
209 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
210 wait_ms(50);
211 sdfs__cmd58(obj);
212 sdfs__cmd(obj, 55, 0);
213 if (sdfs__cmd(obj, 41, 0x40000000) == 0) {
214 sdfs__cmd58(obj);
215 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
216 obj->cdv = 1;
217 return SDCARD_V2;
218 }
219 }
220
221 debug("Timeout waiting for v2.x card\n");
222 return SDCARD_FAIL;
223}
224
225int sdfs_initialize(sdfs_t *obj)
226{
227 obj->_is_initialized = sdfs_initialise_card(obj);
228 if (obj->_is_initialized == 0) {
229 debug("Fail to initialize card\n");
230 return 1;
231 }
232 debug_if(SD_DBG, "init card = %d\n", obj->_is_initialized);
233 obj->_sectors = sdfs__sd_sectors(obj);
234
235 // Set block length to 512 (CMD16)
236 if (sdfs__cmd(obj, 16, 512) != 0) {
237 debug("Set 512-byte block timed out\n");
238 return 1;
239 }
240
241 // Set SCK for data transfer
242 spi_frequency(&obj->_spi, obj->_transfer_sck);
243 return 0;
244}
245
246int sdfs_write(sdfs_t *obj, const uint8_t *buffer, uint32_t block_number, uint32_t count)
247{
248 if (!obj->_is_initialized) {
249 return -1;
250 }
251
252 for (uint32_t b = block_number; b < block_number + count; b++) {
253 // set write address for single block (CMD24)
254 if (sdfs__cmd(obj, 24, b * obj->cdv) != 0) {
255 return 1;
256 }
257
258 // send the data block
259 sdfs__write(obj, buffer, 512);
260 buffer += 512;
261 }
262
263 return 0;
264}
265
266int sdfs_read(sdfs_t *obj, uint8_t *buffer, uint32_t block_number, uint32_t count)
267{
268 if (!obj->_is_initialized) {
269 return -1;
270 }
271
272 for (uint32_t b = block_number; b < block_number + count; b++) {
273 // set read address for single block (CMD17)
274 if (sdfs__cmd(obj, 17, b * obj->cdv) != 0) {
275 return 1;
276 }
277
278 // receive the data
279 sdfs__read(obj, buffer, 512);
280 buffer += 512;
281 }
282
283 return 0;
284}
285
286int sdfs_status(sdfs_t *obj)
287{
288 // FATFileSystem::disk_status() returns 0 when initialized
289 if (obj->_is_initialized) {
290 return 0;
291 }
292 else {
293 return 1;
294 }
295}
296int sdfs_sync(sdfs_t *obj) { return 0; }
297uint64_t sdfs_sectors(sdfs_t *obj) { return obj->_sectors; }
298
299
300// PRIVATE FUNCTIONS
301static int sdfs__cmd(sdfs_t *obj, int cmd, int arg)
302{
303 gpio_write(&obj->_cs, 0);
304
305 // send a command
306 spi_master_write(&obj->_spi, 0x40 | cmd);
307 spi_master_write(&obj->_spi, arg >> 24);
308 spi_master_write(&obj->_spi, arg >> 16);
309 spi_master_write(&obj->_spi, arg >> 8);
310 spi_master_write(&obj->_spi, arg >> 0);
311 spi_master_write(&obj->_spi, 0x95);
312
313 // wait for the repsonse (response[7] == 0)
314 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
315 int response = spi_master_write(&obj->_spi, 0xFF);
316 if (!(response & 0x80)) {
317 gpio_write(&obj->_cs, 1);
318 spi_master_write(&obj->_spi, 0xFF);
319 return response;
320 }
321 }
322 gpio_write(&obj->_cs, 1);
323 spi_master_write(&obj->_spi, 0xFF);
324 return -1; // timeout
325}
326
327int sdfs__cmdx(sdfs_t *obj, int cmd, int arg)
328{
329 gpio_write(&obj->_cs, 0);
330
331 // send a command
332 spi_master_write(&obj->_spi, 0x40 | cmd);
333 spi_master_write(&obj->_spi, arg >> 24);
334 spi_master_write(&obj->_spi, arg >> 16);
335 spi_master_write(&obj->_spi, arg >> 8);
336 spi_master_write(&obj->_spi, arg >> 0);
337 spi_master_write(&obj->_spi, 0x95);
338
339 // wait for the repsonse (response[7] == 0)
340 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
341 int response = spi_master_write(&obj->_spi, 0xFF);
342 if (!(response & 0x80)) {
343 return response;
344 }
345 }
346 gpio_write(&obj->_cs, 1);
347 spi_master_write(&obj->_spi, 0xFF);
348 return -1; // timeout
349}
350
351static int sdfs__cmd58(sdfs_t *obj)
352{
353 gpio_write(&obj->_cs, 0);
354 int arg = 0;
355
356 // send a command
357 spi_master_write(&obj->_spi, 0x40 | 58);
358 spi_master_write(&obj->_spi, arg >> 24);
359 spi_master_write(&obj->_spi, arg >> 16);
360 spi_master_write(&obj->_spi, arg >> 8);
361 spi_master_write(&obj->_spi, arg >> 0);
362 spi_master_write(&obj->_spi, 0x95);
363
364 // wait for the repsonse (response[7] == 0)
365 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
366 int response = spi_master_write(&obj->_spi, 0xFF);
367 if (!(response & 0x80)) {
368 int ocr = spi_master_write(&obj->_spi, 0xFF) << 24;
369 ocr |= spi_master_write(&obj->_spi, 0xFF) << 16;
370 ocr |= spi_master_write(&obj->_spi, 0xFF) << 8;
371 ocr |= spi_master_write(&obj->_spi, 0xFF) << 0;
372 gpio_write(&obj->_cs, 1);
373 spi_master_write(&obj->_spi, 0xFF);
374 return response;
375 }
376 }
377 gpio_write(&obj->_cs, 1);
378 spi_master_write(&obj->_spi, 0xFF);
379 return -1; // timeout
380}
381
382static int sdfs__cmd8(sdfs_t *obj)
383{
384 gpio_write(&obj->_cs, 0);
385
386 // send a command
387 spi_master_write(&obj->_spi, 0x40 | 8); // CMD8
388 spi_master_write(&obj->_spi, 0x00); // reserved
389 spi_master_write(&obj->_spi, 0x00); // reserved
390 spi_master_write(&obj->_spi, 0x01); // 3.3v
391 spi_master_write(&obj->_spi, 0xAA); // check pattern
392 spi_master_write(&obj->_spi, 0x87); // crc
393
394 // wait for the repsonse (response[7] == 0)
395 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
396 char response[5];
397 response[0] = spi_master_write(&obj->_spi, 0xFF);
398 if (!(response[0] & 0x80)) {
399 for (int j = 1; j < 5; j++) {
400 response[i] = spi_master_write(&obj->_spi, 0xFF);
401 }
402 gpio_write(&obj->_cs, 1);
403 spi_master_write(&obj->_spi, 0xFF);
404 return response[0];
405 }
406 }
407 gpio_write(&obj->_cs, 1);
408 spi_master_write(&obj->_spi, 0xFF);
409 return -1; // timeout
410}
411
412static int sdfs__read(sdfs_t *obj, uint8_t *buffer, uint32_t length)
413{
414 gpio_write(&obj->_cs, 0);
415
416 // read until start byte (0xFF)
417 while (spi_master_write(&obj->_spi, 0xFF) != 0xFE);
418
419 // read data
420 for (int i = 0; i < length; i++) {
421 buffer[i] = spi_master_write(&obj->_spi, 0xFF);
422 }
423 spi_master_write(&obj->_spi, 0xFF); // checksum
424 spi_master_write(&obj->_spi, 0xFF);
425
426 gpio_write(&obj->_cs, 1);
427 spi_master_write(&obj->_spi, 0xFF);
428 return 0;
429}
430
431static int sdfs__write(sdfs_t *obj, const uint8_t*buffer, uint32_t length)
432{
433 gpio_write(&obj->_cs, 0);
434
435 // indicate start of block
436 spi_master_write(&obj->_spi, 0xFE);
437
438 // write the data
439 for (int i = 0; i < length; i++) {
440 spi_master_write(&obj->_spi, buffer[i]);
441 }
442
443 // write the checksum
444 spi_master_write(&obj->_spi, 0xFF);
445 spi_master_write(&obj->_spi, 0xFF);
446
447 // check the response token
448 if ((spi_master_write(&obj->_spi, 0xFF) & 0x1F) != 0x05) {
449 gpio_write(&obj->_cs, 1);
450 spi_master_write(&obj->_spi, 0xFF);
451 return 1;
452 }
453
454 // wait for write to finish
455 while (spi_master_write(&obj->_spi, 0xFF) == 0);
456
457 gpio_write(&obj->_cs, 1);
458 spi_master_write(&obj->_spi, 0xFF);
459 return 0;
460}
461
462static uint32_t sdfs_ext_bits(sdfs_t *obj, unsigned char *data, int msb, int lsb)
463{
464 uint32_t bits = 0;
465 uint32_t size = 1 + msb - lsb;
466 for (uint32_t i = 0; i < size; i++) {
467 uint32_t position = lsb + i;
468 uint32_t byte = 15 - (position >> 3);
469 uint32_t bit = position & 0x7;
470 uint32_t value = (data[byte] >> bit) & 1;
471 bits |= value << i;
472 }
473 return bits;
474}
475
476static uint64_t sdfs__sd_sectors(sdfs_t *obj)
477{
478 uint32_t c_size, c_size_mult, read_bl_len;
479 uint32_t block_len, mult, blocknr, capacity;
480 uint32_t hc_c_size;
481 uint64_t blocks;
482
483 // CMD9, Response R2 (R1 byte + 16-byte block read)
484 if (sdfs__cmdx(obj, 9, 0) != 0) {
485 debug("Didn't get a response from the disk\n");
486 return 0;
487 }
488
489 uint8_t csd[16];
490 if (sdfs__read(obj, csd, 16) != 0) {
491 debug("Couldn't read csd response from disk\n");
492 return 0;
493 }
494
495 // csd_structure : csd[127:126]
496 // c_size : csd[73:62]
497 // c_size_mult : csd[49:47]
498 // read_bl_len : csd[83:80] - the *maximum* read block length
499
500 int csd_structure = sdfs_ext_bits(obj, csd, 127, 126);
501
502 switch (csd_structure) {
503 case 0:
504 obj->cdv = 512;
505 c_size = sdfs_ext_bits(obj, csd, 73, 62);
506 c_size_mult = sdfs_ext_bits(obj, csd, 49, 47);
507 read_bl_len = sdfs_ext_bits(obj, csd, 83, 80);
508
509 block_len = 1 << read_bl_len;
510 mult = 1 << (c_size_mult + 2);
511 blocknr = (c_size + 1) * mult;
512 capacity = blocknr * block_len;
513 blocks = capacity / 512;
514 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
515 break;
516
517 case 1:
518 obj->cdv = 1;
519 hc_c_size = sdfs_ext_bits(obj, csd, 63, 48);
520 blocks = (hc_c_size + 1) * 1024;
521 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks * 512, blocks);
522 break;
523
524 default:
525 debug("CSD struct unsupported\r\n");
526 return 0;
527 };
528 return blocks;
529}
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