1 | #if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4
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2 | #define BLX "mov lr,pc\n\tbx"
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3 | #else
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4 | #define BLX "blx"
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5 | #endif
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6 |
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7 | extern uintptr_t __attribute__((__visibility__("hidden")))
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8 | __a_cas_ptr, __a_barrier_ptr;
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9 |
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10 | #if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6ZK__) && !__thumb__) \
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11 | || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
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12 |
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13 | #define a_ll a_ll
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14 | static inline int a_ll(volatile int *p)
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15 | {
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16 | int v;
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17 | __asm__ __volatile__ ("ldrex %0, %1" : "=r"(v) : "Q"(*p));
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18 | return v;
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19 | }
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20 |
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21 | #define a_sc a_sc
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22 | static inline int a_sc(volatile int *p, int v)
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23 | {
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24 | int r;
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25 | __asm__ __volatile__ ("strex %0,%2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
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26 | return !r;
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27 | }
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28 |
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29 | #if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
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30 |
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31 | #define a_barrier a_barrier
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32 | static inline void a_barrier()
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33 | {
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34 | __asm__ __volatile__ ("dmb ish" : : : "memory");
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35 | }
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36 |
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37 | #endif
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38 |
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39 | #define a_pre_llsc a_barrier
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40 | #define a_post_llsc a_barrier
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41 |
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42 | #else
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43 |
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44 | #define a_cas a_cas
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45 | static inline int a_cas(volatile int *p, int t, int s)
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46 | {
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47 | for (;;) {
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48 | register int r0 __asm__("r0") = t;
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49 | register int r1 __asm__("r1") = s;
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50 | register volatile int *r2 __asm__("r2") = p;
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51 | register uintptr_t r3 __asm__("r3") = __a_cas_ptr;
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52 | int old;
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53 | __asm__ __volatile__ (
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54 | BLX " r3"
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55 | : "+r"(r0), "+r"(r3) : "r"(r1), "r"(r2)
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56 | : "memory", "lr", "ip", "cc" );
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57 | if (!r0) return t;
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58 | if ((old=*p)!=t) return old;
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59 | }
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60 | }
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61 |
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62 | #endif
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63 |
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64 | #ifndef a_barrier
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65 | #define a_barrier a_barrier
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66 | static inline void a_barrier()
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67 | {
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68 | register uintptr_t ip __asm__("ip") = __a_barrier_ptr;
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69 | __asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" );
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70 | }
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71 | #endif
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72 |
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73 | #define a_crash a_crash
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74 | static inline void a_crash()
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75 | {
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76 | __asm__ __volatile__(
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77 | #ifndef __thumb__
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78 | ".word 0xe7f000f0"
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79 | #else
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80 | ".short 0xdeff"
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81 | #endif
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82 | : : : "memory");
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83 | }
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84 |
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85 | #if __ARM_ARCH >= 5
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86 |
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87 | #define a_clz_32 a_clz_32
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88 | static inline int a_clz_32(uint32_t x)
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89 | {
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90 | __asm__ ("clz %0, %1" : "=r"(x) : "r"(x));
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91 | return x;
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92 | }
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93 |
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94 | #endif
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