[352] | 1 | /*******************************************************************************
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| 2 | * DISCLAIMER
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| 3 | * This software is supplied by Renesas Electronics Corporation and is only
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| 4 | * intended for use with Renesas products. No other uses are authorized. This
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| 5 | * software is owned by Renesas Electronics Corporation and is protected under
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| 6 | * all applicable laws, including copyright laws.
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| 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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| 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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| 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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| 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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| 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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| 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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| 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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| 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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| 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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| 16 | * Renesas reserves the right, without notice, to make changes to this software
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| 17 | * and to discontinue the availability of this software. By using this software,
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| 18 | * you agree to the additional terms and conditions found by accessing the
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| 19 | * following link:
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| 20 | * http://www.renesas.com/disclaimer*
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| 21 | * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
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| 22 | *******************************************************************************/
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| 23 | /*******************************************************************************
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| 24 | * File Name : mtu2_iodefine.h
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| 25 | * $Rev: $
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| 26 | * $Date:: $
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| 27 | * Description : Definition of I/O Register (V1.00a)
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| 28 | ******************************************************************************/
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| 29 | #ifndef MTU2_IODEFINE_H
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| 30 | #define MTU2_IODEFINE_H
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| 31 | /* ->SEC M1.10.1 : Not magic number */
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| 32 |
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| 33 | struct st_mtu2
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| 34 | { /* MTU2 */
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| 35 | volatile uint8_t TCR_2; /* TCR_2 */
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| 36 | volatile uint8_t TMDR_2; /* TMDR_2 */
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| 37 | volatile uint8_t TIOR_2; /* TIOR_2 */
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| 38 | volatile uint8_t dummy520[1]; /* */
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| 39 | volatile uint8_t TIER_2; /* TIER_2 */
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| 40 | volatile uint8_t TSR_2; /* TSR_2 */
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| 41 | volatile uint16_t TCNT_2; /* TCNT_2 */
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| 42 | volatile uint16_t TGRA_2; /* TGRA_2 */
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| 43 | volatile uint16_t TGRB_2; /* TGRB_2 */
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| 44 | volatile uint8_t dummy521[500]; /* */
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| 45 | volatile uint8_t TCR_3; /* TCR_3 */
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| 46 | volatile uint8_t TCR_4; /* TCR_4 */
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| 47 | volatile uint8_t TMDR_3; /* TMDR_3 */
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| 48 | volatile uint8_t TMDR_4; /* TMDR_4 */
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| 49 | volatile uint8_t TIORH_3; /* TIORH_3 */
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| 50 | volatile uint8_t TIORL_3; /* TIORL_3 */
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| 51 | volatile uint8_t TIORH_4; /* TIORH_4 */
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| 52 | volatile uint8_t TIORL_4; /* TIORL_4 */
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| 53 | volatile uint8_t TIER_3; /* TIER_3 */
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| 54 | volatile uint8_t TIER_4; /* TIER_4 */
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| 55 | volatile uint8_t TOER; /* TOER */
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| 56 | volatile uint8_t dummy522[2]; /* */
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| 57 | volatile uint8_t TGCR; /* TGCR */
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| 58 | volatile uint8_t TOCR1; /* TOCR1 */
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| 59 | volatile uint8_t TOCR2; /* TOCR2 */
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| 60 | volatile uint16_t TCNT_3; /* TCNT_3 */
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| 61 | volatile uint16_t TCNT_4; /* TCNT_4 */
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| 62 | volatile uint16_t TCDR; /* TCDR */
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| 63 | volatile uint16_t TDDR; /* TDDR */
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| 64 | volatile uint16_t TGRA_3; /* TGRA_3 */
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| 65 | volatile uint16_t TGRB_3; /* TGRB_3 */
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| 66 | volatile uint16_t TGRA_4; /* TGRA_4 */
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| 67 | volatile uint16_t TGRB_4; /* TGRB_4 */
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| 68 | volatile uint16_t TCNTS; /* TCNTS */
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| 69 | volatile uint16_t TCBR; /* TCBR */
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| 70 | volatile uint16_t TGRC_3; /* TGRC_3 */
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| 71 | volatile uint16_t TGRD_3; /* TGRD_3 */
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| 72 | volatile uint16_t TGRC_4; /* TGRC_4 */
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| 73 | volatile uint16_t TGRD_4; /* TGRD_4 */
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| 74 | volatile uint8_t TSR_3; /* TSR_3 */
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| 75 | volatile uint8_t TSR_4; /* TSR_4 */
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| 76 | volatile uint8_t dummy523[2]; /* */
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| 77 | volatile uint8_t TITCR; /* TITCR */
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| 78 | volatile uint8_t TITCNT; /* TITCNT */
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| 79 | volatile uint8_t TBTER; /* TBTER */
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| 80 | volatile uint8_t dummy524[1]; /* */
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| 81 | volatile uint8_t TDER; /* TDER */
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| 82 | volatile uint8_t dummy525[1]; /* */
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| 83 | volatile uint8_t TOLBR; /* TOLBR */
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| 84 | volatile uint8_t dummy526[1]; /* */
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| 85 | volatile uint8_t TBTM_3; /* TBTM_3 */
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| 86 | volatile uint8_t TBTM_4; /* TBTM_4 */
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| 87 | volatile uint8_t dummy527[6]; /* */
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| 88 | volatile uint16_t TADCR; /* TADCR */
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| 89 | volatile uint8_t dummy528[2]; /* */
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| 90 | volatile uint16_t TADCORA_4; /* TADCORA_4 */
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| 91 | volatile uint16_t TADCORB_4; /* TADCORB_4 */
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| 92 | volatile uint16_t TADCOBRA_4; /* TADCOBRA_4 */
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| 93 | volatile uint16_t TADCOBRB_4; /* TADCOBRB_4 */
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| 94 | volatile uint8_t dummy529[20]; /* */
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| 95 | volatile uint8_t TWCR; /* TWCR */
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| 96 | volatile uint8_t dummy530[31]; /* */
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| 97 | volatile uint8_t TSTR; /* TSTR */
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| 98 | volatile uint8_t TSYR; /* TSYR */
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| 99 | volatile uint8_t dummy531[2]; /* */
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| 100 | volatile uint8_t TRWER; /* TRWER */
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| 101 | volatile uint8_t dummy532[123]; /* */
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| 102 | volatile uint8_t TCR_0; /* TCR_0 */
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| 103 | volatile uint8_t TMDR_0; /* TMDR_0 */
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| 104 | volatile uint8_t TIORH_0; /* TIORH_0 */
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| 105 | volatile uint8_t TIORL_0; /* TIORL_0 */
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| 106 | volatile uint8_t TIER_0; /* TIER_0 */
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| 107 | volatile uint8_t TSR_0; /* TSR_0 */
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| 108 | volatile uint16_t TCNT_0; /* TCNT_0 */
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| 109 | volatile uint16_t TGRA_0; /* TGRA_0 */
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| 110 | volatile uint16_t TGRB_0; /* TGRB_0 */
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| 111 | volatile uint16_t TGRC_0; /* TGRC_0 */
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| 112 | volatile uint16_t TGRD_0; /* TGRD_0 */
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| 113 | volatile uint8_t dummy533[16]; /* */
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| 114 | volatile uint16_t TGRE_0; /* TGRE_0 */
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| 115 | volatile uint16_t TGRF_0; /* TGRF_0 */
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| 116 | volatile uint8_t TIER2_0; /* TIER2_0 */
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| 117 | volatile uint8_t TSR2_0; /* TSR2_0 */
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| 118 | volatile uint8_t TBTM_0; /* TBTM_0 */
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| 119 | volatile uint8_t dummy534[89]; /* */
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| 120 | volatile uint8_t TCR_1; /* TCR_1 */
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| 121 | volatile uint8_t TMDR_1; /* TMDR_1 */
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| 122 | volatile uint8_t TIOR_1; /* TIOR_1 */
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| 123 | volatile uint8_t dummy535[1]; /* */
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| 124 | volatile uint8_t TIER_1; /* TIER_1 */
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| 125 | volatile uint8_t TSR_1; /* TSR_1 */
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| 126 | volatile uint16_t TCNT_1; /* TCNT_1 */
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| 127 | volatile uint16_t TGRA_1; /* TGRA_1 */
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| 128 | volatile uint16_t TGRB_1; /* TGRB_1 */
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| 129 | volatile uint8_t dummy536[4]; /* */
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| 130 | volatile uint8_t TICCR; /* TICCR */
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| 131 | };
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| 132 |
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| 133 |
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| 134 | #define MTU2 (*(struct st_mtu2 *)0xFCFF0000uL) /* MTU2 */
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| 135 |
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| 136 |
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| 137 | #define MTU2TCR_2 MTU2.TCR_2
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| 138 | #define MTU2TMDR_2 MTU2.TMDR_2
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| 139 | #define MTU2TIOR_2 MTU2.TIOR_2
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| 140 | #define MTU2TIER_2 MTU2.TIER_2
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| 141 | #define MTU2TSR_2 MTU2.TSR_2
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| 142 | #define MTU2TCNT_2 MTU2.TCNT_2
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| 143 | #define MTU2TGRA_2 MTU2.TGRA_2
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| 144 | #define MTU2TGRB_2 MTU2.TGRB_2
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| 145 | #define MTU2TCR_3 MTU2.TCR_3
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| 146 | #define MTU2TCR_4 MTU2.TCR_4
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| 147 | #define MTU2TMDR_3 MTU2.TMDR_3
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| 148 | #define MTU2TMDR_4 MTU2.TMDR_4
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| 149 | #define MTU2TIORH_3 MTU2.TIORH_3
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| 150 | #define MTU2TIORL_3 MTU2.TIORL_3
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| 151 | #define MTU2TIORH_4 MTU2.TIORH_4
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| 152 | #define MTU2TIORL_4 MTU2.TIORL_4
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| 153 | #define MTU2TIER_3 MTU2.TIER_3
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| 154 | #define MTU2TIER_4 MTU2.TIER_4
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| 155 | #define MTU2TOER MTU2.TOER
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| 156 | #define MTU2TGCR MTU2.TGCR
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| 157 | #define MTU2TOCR1 MTU2.TOCR1
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| 158 | #define MTU2TOCR2 MTU2.TOCR2
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| 159 | #define MTU2TCNT_3 MTU2.TCNT_3
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| 160 | #define MTU2TCNT_4 MTU2.TCNT_4
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| 161 | #define MTU2TCDR MTU2.TCDR
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| 162 | #define MTU2TDDR MTU2.TDDR
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| 163 | #define MTU2TGRA_3 MTU2.TGRA_3
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| 164 | #define MTU2TGRB_3 MTU2.TGRB_3
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| 165 | #define MTU2TGRA_4 MTU2.TGRA_4
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| 166 | #define MTU2TGRB_4 MTU2.TGRB_4
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| 167 | #define MTU2TCNTS MTU2.TCNTS
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| 168 | #define MTU2TCBR MTU2.TCBR
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| 169 | #define MTU2TGRC_3 MTU2.TGRC_3
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| 170 | #define MTU2TGRD_3 MTU2.TGRD_3
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| 171 | #define MTU2TGRC_4 MTU2.TGRC_4
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| 172 | #define MTU2TGRD_4 MTU2.TGRD_4
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| 173 | #define MTU2TSR_3 MTU2.TSR_3
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| 174 | #define MTU2TSR_4 MTU2.TSR_4
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| 175 | #define MTU2TITCR MTU2.TITCR
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| 176 | #define MTU2TITCNT MTU2.TITCNT
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| 177 | #define MTU2TBTER MTU2.TBTER
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| 178 | #define MTU2TDER MTU2.TDER
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| 179 | #define MTU2TOLBR MTU2.TOLBR
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| 180 | #define MTU2TBTM_3 MTU2.TBTM_3
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| 181 | #define MTU2TBTM_4 MTU2.TBTM_4
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| 182 | #define MTU2TADCR MTU2.TADCR
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| 183 | #define MTU2TADCORA_4 MTU2.TADCORA_4
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| 184 | #define MTU2TADCORB_4 MTU2.TADCORB_4
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| 185 | #define MTU2TADCOBRA_4 MTU2.TADCOBRA_4
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| 186 | #define MTU2TADCOBRB_4 MTU2.TADCOBRB_4
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| 187 | #define MTU2TWCR MTU2.TWCR
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| 188 | #define MTU2TSTR MTU2.TSTR
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| 189 | #define MTU2TSYR MTU2.TSYR
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| 190 | #define MTU2TRWER MTU2.TRWER
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| 191 | #define MTU2TCR_0 MTU2.TCR_0
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| 192 | #define MTU2TMDR_0 MTU2.TMDR_0
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| 193 | #define MTU2TIORH_0 MTU2.TIORH_0
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| 194 | #define MTU2TIORL_0 MTU2.TIORL_0
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| 195 | #define MTU2TIER_0 MTU2.TIER_0
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| 196 | #define MTU2TSR_0 MTU2.TSR_0
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| 197 | #define MTU2TCNT_0 MTU2.TCNT_0
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| 198 | #define MTU2TGRA_0 MTU2.TGRA_0
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| 199 | #define MTU2TGRB_0 MTU2.TGRB_0
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| 200 | #define MTU2TGRC_0 MTU2.TGRC_0
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| 201 | #define MTU2TGRD_0 MTU2.TGRD_0
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| 202 | #define MTU2TGRE_0 MTU2.TGRE_0
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| 203 | #define MTU2TGRF_0 MTU2.TGRF_0
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| 204 | #define MTU2TIER2_0 MTU2.TIER2_0
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| 205 | #define MTU2TSR2_0 MTU2.TSR2_0
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| 206 | #define MTU2TBTM_0 MTU2.TBTM_0
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| 207 | #define MTU2TCR_1 MTU2.TCR_1
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| 208 | #define MTU2TMDR_1 MTU2.TMDR_1
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| 209 | #define MTU2TIOR_1 MTU2.TIOR_1
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| 210 | #define MTU2TIER_1 MTU2.TIER_1
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| 211 | #define MTU2TSR_1 MTU2.TSR_1
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| 212 | #define MTU2TCNT_1 MTU2.TCNT_1
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| 213 | #define MTU2TGRA_1 MTU2.TGRA_1
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| 214 | #define MTU2TGRB_1 MTU2.TGRB_1
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| 215 | #define MTU2TICCR MTU2.TICCR
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| 216 | /* <-SEC M1.10.1 */
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| 217 | #endif
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