source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZ_A1H/device/inc/iodefines/disc_iodefine.h@ 352

Last change on this file since 352 was 352, checked in by coas-nagasima, 6 years ago

arm向けASP3版ECNLを追加
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File size: 4.4 KB
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1/*******************************************************************************
2* DISCLAIMER
3* This software is supplied by Renesas Electronics Corporation and is only
4* intended for use with Renesas products. No other uses are authorized. This
5* software is owned by Renesas Electronics Corporation and is protected under
6* all applicable laws, including copyright laws.
7* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16* Renesas reserves the right, without notice, to make changes to this software
17* and to discontinue the availability of this software. By using this software,
18* you agree to the additional terms and conditions found by accessing the
19* following link:
20* http://www.renesas.com/disclaimer*
21* Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22*******************************************************************************/
23/*******************************************************************************
24* File Name : disc_iodefine.h
25* $Rev: $
26* $Date:: $
27* Description : Definition of I/O Register (V1.00a)
28******************************************************************************/
29#ifndef DISC_IODEFINE_H
30#define DISC_IODEFINE_H
31/* ->SEC M1.10.1 : Not magic number */
32
33struct st_disc
34{ /* DISC */
35 volatile uint32_t DOCMCR; /* DOCMCR */
36 volatile uint32_t DOCMSTR; /* DOCMSTR */
37 volatile uint32_t DOCMCLSTR; /* DOCMCLSTR */
38 volatile uint32_t DOCMIENR; /* DOCMIENR */
39 volatile uint8_t dummy1[4]; /* */
40 volatile uint32_t DOCMPMR; /* DOCMPMR */
41 volatile uint32_t DOCMECRCR; /* DOCMECRCR */
42 volatile uint32_t DOCMCCRCR; /* DOCMCCRCR */
43 volatile uint32_t DOCMSPXR; /* DOCMSPXR */
44 volatile uint32_t DOCMSPYR; /* DOCMSPYR */
45 volatile uint32_t DOCMSZXR; /* DOCMSZXR */
46 volatile uint32_t DOCMSZYR; /* DOCMSZYR */
47 volatile uint32_t DOCMCRCIR; /* DOCMCRCIR */
48};
49
50
51#define DISC0 (*(struct st_disc *)0xFCFFA800uL) /* DISC0 */
52#define DISC1 (*(struct st_disc *)0xFCFFB000uL) /* DISC1 */
53
54
55/* Start of channnel array defines of DISC */
56
57/* Channnel array defines of DISC */
58/*(Sample) value = DISC[ channel ]->DOCMCR; */
59#define DISC_COUNT 2
60#define DISC_ADDRESS_LIST \
61{ /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
62 &DISC0, &DISC1 \
63} /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
64
65/* End of channnel array defines of DISC */
66
67
68#define DISC0DOCMCR DISC0.DOCMCR
69#define DISC0DOCMSTR DISC0.DOCMSTR
70#define DISC0DOCMCLSTR DISC0.DOCMCLSTR
71#define DISC0DOCMIENR DISC0.DOCMIENR
72#define DISC0DOCMPMR DISC0.DOCMPMR
73#define DISC0DOCMECRCR DISC0.DOCMECRCR
74#define DISC0DOCMCCRCR DISC0.DOCMCCRCR
75#define DISC0DOCMSPXR DISC0.DOCMSPXR
76#define DISC0DOCMSPYR DISC0.DOCMSPYR
77#define DISC0DOCMSZXR DISC0.DOCMSZXR
78#define DISC0DOCMSZYR DISC0.DOCMSZYR
79#define DISC0DOCMCRCIR DISC0.DOCMCRCIR
80#define DISC1DOCMCR DISC1.DOCMCR
81#define DISC1DOCMSTR DISC1.DOCMSTR
82#define DISC1DOCMCLSTR DISC1.DOCMCLSTR
83#define DISC1DOCMIENR DISC1.DOCMIENR
84#define DISC1DOCMPMR DISC1.DOCMPMR
85#define DISC1DOCMECRCR DISC1.DOCMECRCR
86#define DISC1DOCMCCRCR DISC1.DOCMCCRCR
87#define DISC1DOCMSPXR DISC1.DOCMSPXR
88#define DISC1DOCMSPYR DISC1.DOCMSPYR
89#define DISC1DOCMSZXR DISC1.DOCMSZXR
90#define DISC1DOCMSZYR DISC1.DOCMSZYR
91#define DISC1DOCMCRCIR DISC1.DOCMCRCIR
92/* <-SEC M1.10.1 */
93#endif
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