source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZ_A1H/device/inc/iodefine.h@ 352

Last change on this file since 352 was 352, checked in by coas-nagasima, 6 years ago

arm向けASP3版ECNLを追加
  • Property svn:eol-style set to native
  • Property svn:mime-type set to text/x-chdr;charset=UTF-8
File size: 6.9 KB
Line 
1/*******************************************************************************
2* DISCLAIMER
3* This software is supplied by Renesas Electronics Corporation and is only
4* intended for use with Renesas products. No other uses are authorized. This
5* software is owned by Renesas Electronics Corporation and is protected under
6* all applicable laws, including copyright laws.
7* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16* Renesas reserves the right, without notice, to make changes to this software
17* and to discontinue the availability of this software. By using this software,
18* you agree to the additional terms and conditions found by accessing the
19* following link:
20* http://www.renesas.com/disclaimer*
21* Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22*******************************************************************************/
23/*******************************************************************************
24* File Name : iodefine.h
25* $Rev: $
26* $Date:: $
27* Description : Definition of I/O Register (V1.00a)
28******************************************************************************/
29#ifndef R7S72100_IODEFINE_H
30#define R7S72100_IODEFINE_H
31#define IODEFINE_H_VERSION 100
32
33#define H H_BYTE
34
35enum iodefine_byte_select_t
36{
37 L = 0, H = 1,
38 LL= 0, LH = 1, HL = 2, HH = 3
39};
40
41/***********************************************************************
42 <<< [iodefine_reg32_t] >>>
43- Padding : sizeof(iodefine_reg32_t) == 4
44- Alignment(Offset) : &UINT32==0, &UINT16[0]==0, &UINT16[1]==2
45- &UINT8[0]==0, &UINT8[1]==1, &UINT8[2]==2, &UINT8[3]==3
46- Endian : Independent (Same as CPU endian as register endian)
47- Bit-Order : Independent
48************************************************************************/
49/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
50/* ->SEC M1.10.1 : Not magic number */
51union iodefine_reg32_t
52{
53 volatile uint32_t UINT32; /* 32-bit Access */
54 volatile uint16_t UINT16[2]; /* 16-bit Access */
55 volatile uint8_t UINT8[4]; /* 8-bit Access */
56};
57/* <-SEC M1.10.1 */
58/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
59
60/***********************************************************************
61 <<< [iodefine_reg32_16_t] >>>
62- Padding : sizeof(iodefine_reg32_16_t) == 4
63- Alignment(Offset) : &UINT32==0, &UINT16[0]==0, &UINT16[1]==2
64- Endian : Independent (Same as CPU endian as register endian)
65- Bit-Order : Independent
66************************************************************************/
67/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
68/* ->SEC M1.10.1 : Not magic number */
69union iodefine_reg32_16_t
70{
71 volatile uint32_t UINT32; /* 32-bit Access */
72 volatile uint16_t UINT16[2]; /* 16-bit Access */
73};
74/* <-SEC M1.10.1 */
75/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
76
77/***********************************************************************
78 <<< [iodefine_reg16_8_t] >>>
79- Padding : sizeof(iodefine_reg16_8_t) == 2
80- Alignment(Offset) : &UINT16==0, &UINT8[0]==0, &UINT8[1]==1
81- Endian : Independent (Same as CPU endian as register endian)
82- Bit-Order : Independent
83************************************************************************/
84/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
85/* ->SEC M1.10.1 : Not magic number */
86union iodefine_reg16_8_t
87{
88 volatile uint16_t UINT16; /* 16-bit Access */
89 volatile uint8_t UINT8[2]; /* 8-bit Access */
90};
91/* <-SEC M1.10.1 */
92/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
93
94
95
96
97
98
99#include "adc_iodefine.h" /* (V1.00a) */
100#include "bsc_iodefine.h" /* (V1.00a) */
101#include "ceu_iodefine.h" /* (V1.00a) */
102#include "cpg_iodefine.h" /* (V1.00a) */
103#include "disc_iodefine.h" /* (V1.00a) */
104#include "dmac_iodefine.h" /* (V1.00a) */
105#include "dvdec_iodefine.h" /* (V1.00a) */
106#include "ether_iodefine.h" /* (V1.00a) */
107#include "flctl_iodefine.h" /* (V1.00a) */
108#include "gpio_iodefine.h" /* (V1.00a) */
109#include "ieb_iodefine.h" /* (V1.00a) */
110#include "inb_iodefine.h" /* (V1.00a) */
111#include "intc_iodefine.h" /* (V1.00a) */
112#include "irda_iodefine.h" /* (V1.00a) */
113#include "jcu_iodefine.h" /* (V1.00a) */
114#include "l2c_iodefine.h" /* (V1.00a) */
115#include "lin_iodefine.h" /* (V1.00a) */
116#include "lvds_iodefine.h" /* (V1.00a) */
117#include "mlb_iodefine.h" /* (V1.00a) */
118#include "mmc_iodefine.h" /* (V1.00a) */
119#include "mtu2_iodefine.h" /* (V1.00a) */
120#include "ostm_iodefine.h" /* (V1.00a) */
121#include "pfv_iodefine.h" /* (V1.00a) */
122#include "pwm_iodefine.h" /* (V1.00a) */
123#include "riic_iodefine.h" /* (V1.00a) */
124#include "romdec_iodefine.h" /* (V1.00a) */
125#include "rscan0_iodefine.h" /* (V1.00a) */
126#include "rspi_iodefine.h" /* (V1.00a) */
127#include "rtc_iodefine.h" /* (V1.00a) */
128#include "scif_iodefine.h" /* (V1.00a) */
129#include "scim_iodefine.h" /* (V1.00a) */
130#include "scux_iodefine.h" /* (V1.00a) */
131#include "sdg_iodefine.h" /* (V1.00a) */
132#include "spdif_iodefine.h" /* (V1.00a) */
133#include "spibsc_iodefine.h" /* (V1.00a) */
134#include "ssif_iodefine.h" /* (V1.00a) */
135#include "usb20_iodefine.h" /* (V1.00a) */
136#include "vdc5_iodefine.h" /* (V1.00a) */
137#include "wdt_iodefine.h" /* (V1.00a) */
138
139#undef H
140
141#endif
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