source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZ_A1H/device/inc/iobitmasks/ostm_iobitmask.h@ 352

Last change on this file since 352 was 352, checked in by coas-nagasima, 6 years ago

arm向けASP3版ECNLを追加
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File size: 4.4 KB
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1/*******************************************************************************
2* DISCLAIMER
3* This software is supplied by Renesas Electronics Corporation and is only
4* intended for use with Renesas products. No other uses are authorized. This
5* software is owned by Renesas Electronics Corporation and is protected under
6* all applicable laws, including copyright laws.
7* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16* Renesas reserves the right, without notice, to make changes to this software
17* and to discontinue the availability of this software. By using this software,
18* you agree to the additional terms and conditions found by accessing the
19* following link:
20* http://www.renesas.com/disclaimer
21* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
22*******************************************************************************/
23/*******************************************************************************
24* File Name : ostm_iobitmask.h
25* $Rev: 1115 $
26* $Date:: 2014-07-09 15:35:02 +0900#$
27* Description : OSTM register define header
28*******************************************************************************/
29#ifndef OSTM_IOBITMASK_H
30#define OSTM_IOBITMASK_H
31
32
33/* ==== Mask values for IO registers ==== */
34/* ---- OSTM0 ---- */
35#define OSTM0_OSTMnCMP_OSTMnCMP (0xFFFFFFFFuL)
36
37#define OSTM0_OSTMnCNT_OSTMnCNT (0xFFFFFFFFuL)
38
39#define OSTM0_OSTMnTE_OSTMnTE (0x01u)
40
41#define OSTM0_OSTMnTS_OSTMnTS (0x01u)
42
43#define OSTM0_OSTMnTT_OSTMnTT (0x01u)
44
45#define OSTM0_OSTMnCTL_MD0 (0x00000001uL)
46#define OSTM0_OSTMnCTL_MD1 (0x00000002uL)
47
48/* ---- OSTM1 ---- */
49#define OSTM1_OSTMnCMP_OSTMnCMP (0xFFFFFFFFuL)
50
51#define OSTM1_OSTMnCNT_OSTMnCNT (0xFFFFFFFFuL)
52
53#define OSTM1_OSTMnTE_OSTMnTE (0x01u)
54
55#define OSTM1_OSTMnTS_OSTMnTS (0x01u)
56
57#define OSTM1_OSTMnTT_OSTMnTT (0x01u)
58
59#define OSTM1_OSTMnCTL_MD0 (0x00000001uL)
60#define OSTM1_OSTMnCTL_MD1 (0x00000002uL)
61
62/* ---- OSTMn ---- */
63#define OSTMn_OSTMnCMP_OSTMnCMP (0xFFFFFFFFuL)
64
65#define OSTMn_OSTMnCNT_OSTMnCNT (0xFFFFFFFFuL)
66
67#define OSTMn_OSTMnTE_OSTMnTE (0x01u)
68
69#define OSTMn_OSTMnTS_OSTMnTS (0x01u)
70
71#define OSTMn_OSTMnTT_OSTMnTT (0x01u)
72
73#define OSTMn_OSTMnCTL_MD0 (0x00000001uL)
74#define OSTMn_OSTMnCTL_MD1 (0x00000002uL)
75
76
77/* ==== Shift values for IO registers ==== */
78/* ---- OSTM0 ---- */
79#define OSTM0_OSTMnCMP_OSTMnCMP_SHIFT (0u)
80
81#define OSTM0_OSTMnCNT_OSTMnCNT_SHIFT (0u)
82
83#define OSTM0_OSTMnTE_OSTMnTE_SHIFT (0u)
84
85#define OSTM0_OSTMnTS_OSTMnTS_SHIFT (0u)
86
87#define OSTM0_OSTMnTT_OSTMnTT_SHIFT (0u)
88
89#define OSTM0_OSTMnCTL_MD0_SHIFT (0u)
90#define OSTM0_OSTMnCTL_MD1_SHIFT (1u)
91
92/* ---- OSTM1 ---- */
93#define OSTM1_OSTMnCMP_OSTMnCMP_SHIFT (0u)
94
95#define OSTM1_OSTMnCNT_OSTMnCNT_SHIFT (0u)
96
97#define OSTM1_OSTMnTE_OSTMnTE_SHIFT (0u)
98
99#define OSTM1_OSTMnTS_OSTMnTS_SHIFT (0u)
100
101#define OSTM1_OSTMnTT_OSTMnTT_SHIFT (0u)
102
103#define OSTM1_OSTMnCTL_MD0_SHIFT (0u)
104#define OSTM1_OSTMnCTL_MD1_SHIFT (1u)
105
106/* ---- OSTMn ---- */
107#define OSTMn_OSTMnCMP_OSTMnCMP_SHIFT (0u)
108
109#define OSTMn_OSTMnCNT_OSTMnCNT_SHIFT (0u)
110
111#define OSTMn_OSTMnTE_OSTMnTE_SHIFT (0u)
112
113#define OSTMn_OSTMnTS_OSTMnTS_SHIFT (0u)
114
115#define OSTMn_OSTMnTT_OSTMnTT_SHIFT (0u)
116
117#define OSTMn_OSTMnCTL_MD0_SHIFT (0u)
118#define OSTMn_OSTMnCTL_MD1_SHIFT (1u)
119
120
121#endif /* OSTM_IOBITMASK_H */
122
123/* End of File */
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