source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/spdif_iodefine.h@ 374

Last change on this file since 374 was 374, checked in by coas-nagasima, 5 years ago

mbed関連を更新
シリアルドライバをmbedのHALを使うよう変更
ファイルディスクリプタの処理を更新
  • Property svn:eol-style set to native
  • Property svn:mime-type set to text/x-chdr;charset=UTF-8
File size: 3.9 KB
Line 
1/*******************************************************************************
2* DISCLAIMER
3* This software is supplied by Renesas Electronics Corporation and is only
4* intended for use with Renesas products. No other uses are authorized. This
5* software is owned by Renesas Electronics Corporation and is protected under
6* all applicable laws, including copyright laws.
7* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16* Renesas reserves the right, without notice, to make changes to this software
17* and to discontinue the availability of this software. By using this software,
18* you agree to the additional terms and conditions found by accessing the
19* following link:
20* http://www.renesas.com/disclaimer*
21* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved.
22*******************************************************************************/
23/*******************************************************************************
24* File Name : spdif_iodefine.h
25* $Rev: $
26* $Date:: $
27* Description : Definition of I/O Register for RZ/A1H,M (V2.00h)
28******************************************************************************/
29#ifndef SPDIF_IODEFINE_H
30#define SPDIF_IODEFINE_H
31/* ->QAC 0639 : Over 127 members (C90) */
32/* ->QAC 0857 : Over 1024 #define (C90) */
33/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
34/* ->SEC M1.10.1 : Not magic number */
35
36#define SPDIF (*(struct st_spdif *)0xE8012000uL) /* SPDIF */
37
38
39#define SPDIFTLCA (SPDIF.TLCA)
40#define SPDIFTRCA (SPDIF.TRCA)
41#define SPDIFTLCS (SPDIF.TLCS)
42#define SPDIFTRCS (SPDIF.TRCS)
43#define SPDIFTUI (SPDIF.TUI)
44#define SPDIFRLCA (SPDIF.RLCA)
45#define SPDIFRRCA (SPDIF.RRCA)
46#define SPDIFRLCS (SPDIF.RLCS)
47#define SPDIFRRCS (SPDIF.RRCS)
48#define SPDIFRUI (SPDIF.RUI)
49#define SPDIFCTRL (SPDIF.CTRL)
50#define SPDIFSTAT (SPDIF.STAT)
51#define SPDIFTDAD (SPDIF.TDAD)
52#define SPDIFRDAD (SPDIF.RDAD)
53
54
55typedef struct st_spdif
56{
57 /* SPDIF */
58 volatile uint32_t TLCA; /* TLCA */
59 volatile uint32_t TRCA; /* TRCA */
60 volatile uint32_t TLCS; /* TLCS */
61 volatile uint32_t TRCS; /* TRCS */
62 volatile uint32_t TUI; /* TUI */
63 volatile uint32_t RLCA; /* RLCA */
64 volatile uint32_t RRCA; /* RRCA */
65 volatile uint32_t RLCS; /* RLCS */
66 volatile uint32_t RRCS; /* RRCS */
67 volatile uint32_t RUI; /* RUI */
68 volatile uint32_t CTRL; /* CTRL */
69 volatile uint32_t STAT; /* STAT */
70 volatile uint32_t TDAD; /* TDAD */
71 volatile uint32_t RDAD; /* RDAD */
72} r_io_spdif_t;
73
74
75/* <-SEC M1.10.1 */
76/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
77/* <-QAC 0857 */
78/* <-QAC 0639 */
79#endif
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