source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/ostm_iodefine.h@ 374

Last change on this file since 374 was 374, checked in by coas-nagasima, 5 years ago

mbed関連を更新
シリアルドライバをmbedのHALを使うよう変更
ファイルディスクリプタの処理を更新
  • Property svn:eol-style set to native
  • Property svn:mime-type set to text/x-chdr;charset=UTF-8
File size: 4.2 KB
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1/*******************************************************************************
2* DISCLAIMER
3* This software is supplied by Renesas Electronics Corporation and is only
4* intended for use with Renesas products. No other uses are authorized. This
5* software is owned by Renesas Electronics Corporation and is protected under
6* all applicable laws, including copyright laws.
7* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16* Renesas reserves the right, without notice, to make changes to this software
17* and to discontinue the availability of this software. By using this software,
18* you agree to the additional terms and conditions found by accessing the
19* following link:
20* http://www.renesas.com/disclaimer*
21* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved.
22*******************************************************************************/
23/*******************************************************************************
24* File Name : ostm_iodefine.h
25* $Rev: $
26* $Date:: $
27* Description : Definition of I/O Register for RZ/A1H,M (V2.00h)
28******************************************************************************/
29#ifndef OSTM_IODEFINE_H
30#define OSTM_IODEFINE_H
31/* ->QAC 0639 : Over 127 members (C90) */
32/* ->QAC 0857 : Over 1024 #define (C90) */
33/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
34/* ->SEC M1.10.1 : Not magic number */
35
36#define OSTM0 (*(struct st_ostm *)0xFCFEC000uL) /* OSTM0 */
37#define OSTM1 (*(struct st_ostm *)0xFCFEC400uL) /* OSTM1 */
38
39
40/* Start of channel array defines of OSTM */
41
42/* Channel array defines of OSTM */
43/*(Sample) value = OSTM[ channel ]->OSTMnCMP; */
44#define OSTM_COUNT (2)
45#define OSTM_ADDRESS_LIST \
46{ /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
47 &OSTM0, &OSTM1 \
48} /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
49
50/* End of channel array defines of OSTM */
51
52
53#define OSTM0CMP (OSTM0.OSTMnCMP)
54#define OSTM0CNT (OSTM0.OSTMnCNT)
55#define OSTM0TE (OSTM0.OSTMnTE)
56#define OSTM0TS (OSTM0.OSTMnTS)
57#define OSTM0TT (OSTM0.OSTMnTT)
58#define OSTM0CTL (OSTM0.OSTMnCTL)
59#define OSTM1CMP (OSTM1.OSTMnCMP)
60#define OSTM1CNT (OSTM1.OSTMnCNT)
61#define OSTM1TE (OSTM1.OSTMnTE)
62#define OSTM1TS (OSTM1.OSTMnTS)
63#define OSTM1TT (OSTM1.OSTMnTT)
64#define OSTM1CTL (OSTM1.OSTMnCTL)
65
66
67typedef struct st_ostm
68{
69 /* OSTM */
70 volatile uint32_t OSTMnCMP; /* OSTMnCMP */
71 volatile uint32_t OSTMnCNT; /* OSTMnCNT */
72 volatile uint8_t dummy1[8]; /* */
73 volatile uint8_t OSTMnTE; /* OSTMnTE */
74 volatile uint8_t dummy2[3]; /* */
75 volatile uint8_t OSTMnTS; /* OSTMnTS */
76 volatile uint8_t dummy3[3]; /* */
77 volatile uint8_t OSTMnTT; /* OSTMnTT */
78 volatile uint8_t dummy4[7]; /* */
79 volatile uint8_t OSTMnCTL; /* OSTMnCTL */
80} r_io_ostm_t;
81
82
83/* Channel array defines of OSTM (2)*/
84#ifdef DECLARE_OSTM_CHANNELS
85volatile struct st_ostm* OSTM[ OSTM_COUNT ] =
86 /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */
87 OSTM_ADDRESS_LIST;
88 /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */
89#endif /* DECLARE_OSTM_CHANNELS */
90/* End of channel array defines of OSTM (2)*/
91
92
93/* <-SEC M1.10.1 */
94/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
95/* <-QAC 0857 */
96/* <-QAC 0639 */
97#endif
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