source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/ether_iodefine.h@ 374

Last change on this file since 374 was 374, checked in by coas-nagasima, 5 years ago

mbed関連を更新
シリアルドライバをmbedのHALを使うよう変更
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1/*******************************************************************************
2* DISCLAIMER
3* This software is supplied by Renesas Electronics Corporation and is only
4* intended for use with Renesas products. No other uses are authorized. This
5* software is owned by Renesas Electronics Corporation and is protected under
6* all applicable laws, including copyright laws.
7* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16* Renesas reserves the right, without notice, to make changes to this software
17* and to discontinue the availability of this software. By using this software,
18* you agree to the additional terms and conditions found by accessing the
19* following link:
20* http://www.renesas.com/disclaimer*
21* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved.
22*******************************************************************************/
23/*******************************************************************************
24* File Name : ether_iodefine.h
25* $Rev: $
26* $Date:: $
27* Description : Definition of I/O Register for RZ/A1H,M (V2.00h)
28******************************************************************************/
29#ifndef ETHER_IODEFINE_H
30#define ETHER_IODEFINE_H
31/* ->QAC 0639 : Over 127 members (C90) */
32/* ->QAC 0857 : Over 1024 #define (C90) */
33/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
34/* ->SEC M1.10.1 : Not magic number */
35
36#define ETHER (*(struct st_ether *)0xE8203000uL) /* ETHER */
37
38
39/* Start of channel array defines of ETHER */
40
41/* Channel array defines of ETHER_FROM_TSU_ADRH0_ARRAY */
42/*(Sample) value = ETHER_FROM_TSU_ADRH0_ARRAY[ channel ]->TSU_ADRH0; */
43#define ETHER_FROM_TSU_ADRH0_ARRAY_COUNT (32)
44#define ETHER_FROM_TSU_ADRH0_ARRAY_ADDRESS_LIST \
45{ /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
46 &ETHER_FROM_TSU_ADRH0, &ETHER_FROM_TSU_ADRH1, &ETHER_FROM_TSU_ADRH2, &ETHER_FROM_TSU_ADRH3, &ETHER_FROM_TSU_ADRH4, &ETHER_FROM_TSU_ADRH5, &ETHER_FROM_TSU_ADRH6, &ETHER_FROM_TSU_ADRH7, \
47 &ETHER_FROM_TSU_ADRH8, &ETHER_FROM_TSU_ADRH9, &ETHER_FROM_TSU_ADRH10, &ETHER_FROM_TSU_ADRH11, &ETHER_FROM_TSU_ADRH12, &ETHER_FROM_TSU_ADRH13, &ETHER_FROM_TSU_ADRH14, &ETHER_FROM_TSU_ADRH15, \
48 &ETHER_FROM_TSU_ADRH16, &ETHER_FROM_TSU_ADRH17, &ETHER_FROM_TSU_ADRH18, &ETHER_FROM_TSU_ADRH19, &ETHER_FROM_TSU_ADRH20, &ETHER_FROM_TSU_ADRH21, &ETHER_FROM_TSU_ADRH22, &ETHER_FROM_TSU_ADRH23, \
49 &ETHER_FROM_TSU_ADRH24, &ETHER_FROM_TSU_ADRH25, &ETHER_FROM_TSU_ADRH26, &ETHER_FROM_TSU_ADRH27, &ETHER_FROM_TSU_ADRH28, &ETHER_FROM_TSU_ADRH29, &ETHER_FROM_TSU_ADRH30, &ETHER_FROM_TSU_ADRH31 \
50} /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
51#define ETHER_FROM_TSU_ADRH0 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH0) /* ETHER_FROM_TSU_ADRH0 */
52#define ETHER_FROM_TSU_ADRH1 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH1) /* ETHER_FROM_TSU_ADRH1 */
53#define ETHER_FROM_TSU_ADRH2 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH2) /* ETHER_FROM_TSU_ADRH2 */
54#define ETHER_FROM_TSU_ADRH3 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH3) /* ETHER_FROM_TSU_ADRH3 */
55#define ETHER_FROM_TSU_ADRH4 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH4) /* ETHER_FROM_TSU_ADRH4 */
56#define ETHER_FROM_TSU_ADRH5 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH5) /* ETHER_FROM_TSU_ADRH5 */
57#define ETHER_FROM_TSU_ADRH6 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH6) /* ETHER_FROM_TSU_ADRH6 */
58#define ETHER_FROM_TSU_ADRH7 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH7) /* ETHER_FROM_TSU_ADRH7 */
59#define ETHER_FROM_TSU_ADRH8 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH8) /* ETHER_FROM_TSU_ADRH8 */
60#define ETHER_FROM_TSU_ADRH9 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH9) /* ETHER_FROM_TSU_ADRH9 */
61#define ETHER_FROM_TSU_ADRH10 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH10) /* ETHER_FROM_TSU_ADRH10 */
62#define ETHER_FROM_TSU_ADRH11 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH11) /* ETHER_FROM_TSU_ADRH11 */
63#define ETHER_FROM_TSU_ADRH12 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH12) /* ETHER_FROM_TSU_ADRH12 */
64#define ETHER_FROM_TSU_ADRH13 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH13) /* ETHER_FROM_TSU_ADRH13 */
65#define ETHER_FROM_TSU_ADRH14 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH14) /* ETHER_FROM_TSU_ADRH14 */
66#define ETHER_FROM_TSU_ADRH15 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH15) /* ETHER_FROM_TSU_ADRH15 */
67#define ETHER_FROM_TSU_ADRH16 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH16) /* ETHER_FROM_TSU_ADRH16 */
68#define ETHER_FROM_TSU_ADRH17 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH17) /* ETHER_FROM_TSU_ADRH17 */
69#define ETHER_FROM_TSU_ADRH18 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH18) /* ETHER_FROM_TSU_ADRH18 */
70#define ETHER_FROM_TSU_ADRH19 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH19) /* ETHER_FROM_TSU_ADRH19 */
71#define ETHER_FROM_TSU_ADRH20 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH20) /* ETHER_FROM_TSU_ADRH20 */
72#define ETHER_FROM_TSU_ADRH21 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH21) /* ETHER_FROM_TSU_ADRH21 */
73#define ETHER_FROM_TSU_ADRH22 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH22) /* ETHER_FROM_TSU_ADRH22 */
74#define ETHER_FROM_TSU_ADRH23 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH23) /* ETHER_FROM_TSU_ADRH23 */
75#define ETHER_FROM_TSU_ADRH24 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH24) /* ETHER_FROM_TSU_ADRH24 */
76#define ETHER_FROM_TSU_ADRH25 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH25) /* ETHER_FROM_TSU_ADRH25 */
77#define ETHER_FROM_TSU_ADRH26 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH26) /* ETHER_FROM_TSU_ADRH26 */
78#define ETHER_FROM_TSU_ADRH27 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH27) /* ETHER_FROM_TSU_ADRH27 */
79#define ETHER_FROM_TSU_ADRH28 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH28) /* ETHER_FROM_TSU_ADRH28 */
80#define ETHER_FROM_TSU_ADRH29 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH29) /* ETHER_FROM_TSU_ADRH29 */
81#define ETHER_FROM_TSU_ADRH30 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH30) /* ETHER_FROM_TSU_ADRH30 */
82#define ETHER_FROM_TSU_ADRH31 (*(struct st_ether_from_tsu_adrh0 *)&ETHER.TSU_ADRH31) /* ETHER_FROM_TSU_ADRH31 */
83
84/* End of channel array defines of ETHER */
85
86
87#define ETHEREDSR0 (ETHER.EDSR0)
88#define ETHERTDLAR0 (ETHER.TDLAR0)
89#define ETHERTDFAR0 (ETHER.TDFAR0)
90#define ETHERTDFXR0 (ETHER.TDFXR0)
91#define ETHERTDFFR0 (ETHER.TDFFR0)
92#define ETHERRDLAR0 (ETHER.RDLAR0)
93#define ETHERRDFAR0 (ETHER.RDFAR0)
94#define ETHERRDFXR0 (ETHER.RDFXR0)
95#define ETHERRDFFR0 (ETHER.RDFFR0)
96#define ETHEREDMR0 (ETHER.EDMR0)
97#define ETHEREDTRR0 (ETHER.EDTRR0)
98#define ETHEREDRRR0 (ETHER.EDRRR0)
99#define ETHEREESR0 (ETHER.EESR0)
100#define ETHEREESIPR0 (ETHER.EESIPR0)
101#define ETHERTRSCER0 (ETHER.TRSCER0)
102#define ETHERRMFCR0 (ETHER.RMFCR0)
103#define ETHERTFTR0 (ETHER.TFTR0)
104#define ETHERFDR0 (ETHER.FDR0)
105#define ETHERRMCR0 (ETHER.RMCR0)
106#define ETHERRPADIR0 (ETHER.RPADIR0)
107#define ETHERFCFTR0 (ETHER.FCFTR0)
108#define ETHERCSMR (ETHER.CSMR)
109#define ETHERCSSBM (ETHER.CSSBM)
110#define ETHERCSSMR (ETHER.CSSMR)
111#define ETHERECMR0 (ETHER.ECMR0)
112#define ETHERRFLR0 (ETHER.RFLR0)
113#define ETHERECSR0 (ETHER.ECSR0)
114#define ETHERECSIPR0 (ETHER.ECSIPR0)
115#define ETHERPIR0 (ETHER.PIR0)
116#define ETHERAPR0 (ETHER.APR0)
117#define ETHERMPR0 (ETHER.MPR0)
118#define ETHERPFTCR0 (ETHER.PFTCR0)
119#define ETHERPFRCR0 (ETHER.PFRCR0)
120#define ETHERTPAUSER0 (ETHER.TPAUSER0)
121#define ETHERMAHR0 (ETHER.MAHR0)
122#define ETHERMALR0 (ETHER.MALR0)
123#define ETHERCEFCR0 (ETHER.CEFCR0)
124#define ETHERFRECR0 (ETHER.FRECR0)
125#define ETHERTSFRCR0 (ETHER.TSFRCR0)
126#define ETHERTLFRCR0 (ETHER.TLFRCR0)
127#define ETHERRFCR0 (ETHER.RFCR0)
128#define ETHERMAFCR0 (ETHER.MAFCR0)
129#define ETHERARSTR (ETHER.ARSTR)
130#define ETHERTSU_CTRST (ETHER.TSU_CTRST)
131#define ETHERTSU_VTAG0 (ETHER.TSU_VTAG0)
132#define ETHERTSU_ADSBSY (ETHER.TSU_ADSBSY)
133#define ETHERTSU_TEN (ETHER.TSU_TEN)
134#define ETHERTXNLCR0 (ETHER.TXNLCR0)
135#define ETHERTXALCR0 (ETHER.TXALCR0)
136#define ETHERRXNLCR0 (ETHER.RXNLCR0)
137#define ETHERRXALCR0 (ETHER.RXALCR0)
138#define ETHERTSU_ADRH0 (ETHER.TSU_ADRH0)
139#define ETHERTSU_ADRL0 (ETHER.TSU_ADRL0)
140#define ETHERTSU_ADRH1 (ETHER.TSU_ADRH1)
141#define ETHERTSU_ADRL1 (ETHER.TSU_ADRL1)
142#define ETHERTSU_ADRH2 (ETHER.TSU_ADRH2)
143#define ETHERTSU_ADRL2 (ETHER.TSU_ADRL2)
144#define ETHERTSU_ADRH3 (ETHER.TSU_ADRH3)
145#define ETHERTSU_ADRL3 (ETHER.TSU_ADRL3)
146#define ETHERTSU_ADRH4 (ETHER.TSU_ADRH4)
147#define ETHERTSU_ADRL4 (ETHER.TSU_ADRL4)
148#define ETHERTSU_ADRH5 (ETHER.TSU_ADRH5)
149#define ETHERTSU_ADRL5 (ETHER.TSU_ADRL5)
150#define ETHERTSU_ADRH6 (ETHER.TSU_ADRH6)
151#define ETHERTSU_ADRL6 (ETHER.TSU_ADRL6)
152#define ETHERTSU_ADRH7 (ETHER.TSU_ADRH7)
153#define ETHERTSU_ADRL7 (ETHER.TSU_ADRL7)
154#define ETHERTSU_ADRH8 (ETHER.TSU_ADRH8)
155#define ETHERTSU_ADRL8 (ETHER.TSU_ADRL8)
156#define ETHERTSU_ADRH9 (ETHER.TSU_ADRH9)
157#define ETHERTSU_ADRL9 (ETHER.TSU_ADRL9)
158#define ETHERTSU_ADRH10 (ETHER.TSU_ADRH10)
159#define ETHERTSU_ADRL10 (ETHER.TSU_ADRL10)
160#define ETHERTSU_ADRH11 (ETHER.TSU_ADRH11)
161#define ETHERTSU_ADRL11 (ETHER.TSU_ADRL11)
162#define ETHERTSU_ADRH12 (ETHER.TSU_ADRH12)
163#define ETHERTSU_ADRL12 (ETHER.TSU_ADRL12)
164#define ETHERTSU_ADRH13 (ETHER.TSU_ADRH13)
165#define ETHERTSU_ADRL13 (ETHER.TSU_ADRL13)
166#define ETHERTSU_ADRH14 (ETHER.TSU_ADRH14)
167#define ETHERTSU_ADRL14 (ETHER.TSU_ADRL14)
168#define ETHERTSU_ADRH15 (ETHER.TSU_ADRH15)
169#define ETHERTSU_ADRL15 (ETHER.TSU_ADRL15)
170#define ETHERTSU_ADRH16 (ETHER.TSU_ADRH16)
171#define ETHERTSU_ADRL16 (ETHER.TSU_ADRL16)
172#define ETHERTSU_ADRH17 (ETHER.TSU_ADRH17)
173#define ETHERTSU_ADRL17 (ETHER.TSU_ADRL17)
174#define ETHERTSU_ADRH18 (ETHER.TSU_ADRH18)
175#define ETHERTSU_ADRL18 (ETHER.TSU_ADRL18)
176#define ETHERTSU_ADRH19 (ETHER.TSU_ADRH19)
177#define ETHERTSU_ADRL19 (ETHER.TSU_ADRL19)
178#define ETHERTSU_ADRH20 (ETHER.TSU_ADRH20)
179#define ETHERTSU_ADRL20 (ETHER.TSU_ADRL20)
180#define ETHERTSU_ADRH21 (ETHER.TSU_ADRH21)
181#define ETHERTSU_ADRL21 (ETHER.TSU_ADRL21)
182#define ETHERTSU_ADRH22 (ETHER.TSU_ADRH22)
183#define ETHERTSU_ADRL22 (ETHER.TSU_ADRL22)
184#define ETHERTSU_ADRH23 (ETHER.TSU_ADRH23)
185#define ETHERTSU_ADRL23 (ETHER.TSU_ADRL23)
186#define ETHERTSU_ADRH24 (ETHER.TSU_ADRH24)
187#define ETHERTSU_ADRL24 (ETHER.TSU_ADRL24)
188#define ETHERTSU_ADRH25 (ETHER.TSU_ADRH25)
189#define ETHERTSU_ADRL25 (ETHER.TSU_ADRL25)
190#define ETHERTSU_ADRH26 (ETHER.TSU_ADRH26)
191#define ETHERTSU_ADRL26 (ETHER.TSU_ADRL26)
192#define ETHERTSU_ADRH27 (ETHER.TSU_ADRH27)
193#define ETHERTSU_ADRL27 (ETHER.TSU_ADRL27)
194#define ETHERTSU_ADRH28 (ETHER.TSU_ADRH28)
195#define ETHERTSU_ADRL28 (ETHER.TSU_ADRL28)
196#define ETHERTSU_ADRH29 (ETHER.TSU_ADRH29)
197#define ETHERTSU_ADRL29 (ETHER.TSU_ADRL29)
198#define ETHERTSU_ADRH30 (ETHER.TSU_ADRH30)
199#define ETHERTSU_ADRL30 (ETHER.TSU_ADRL30)
200#define ETHERTSU_ADRH31 (ETHER.TSU_ADRH31)
201#define ETHERTSU_ADRL31 (ETHER.TSU_ADRL31)
202
203
204typedef struct st_ether
205{
206 /* ETHER */
207 volatile uint32_t EDSR0; /* EDSR0 */
208 volatile uint8_t dummy207[12]; /* */
209 volatile uint32_t TDLAR0; /* TDLAR0 */
210 volatile uint32_t TDFAR0; /* TDFAR0 */
211 volatile uint32_t TDFXR0; /* TDFXR0 */
212 volatile uint32_t TDFFR0; /* TDFFR0 */
213 volatile uint8_t dummy208[16]; /* */
214 volatile uint32_t RDLAR0; /* RDLAR0 */
215 volatile uint32_t RDFAR0; /* RDFAR0 */
216 volatile uint32_t RDFXR0; /* RDFXR0 */
217 volatile uint32_t RDFFR0; /* RDFFR0 */
218 volatile uint8_t dummy209[960]; /* */
219 volatile uint32_t EDMR0; /* EDMR0 */
220 volatile uint8_t dummy210[4]; /* */
221 volatile uint32_t EDTRR0; /* EDTRR0 */
222 volatile uint8_t dummy211[4]; /* */
223 volatile uint32_t EDRRR0; /* EDRRR0 */
224 volatile uint8_t dummy212[20]; /* */
225 volatile uint32_t EESR0; /* EESR0 */
226 volatile uint8_t dummy213[4]; /* */
227 volatile uint32_t EESIPR0; /* EESIPR0 */
228 volatile uint8_t dummy214[4]; /* */
229 volatile uint32_t TRSCER0; /* TRSCER0 */
230 volatile uint8_t dummy215[4]; /* */
231 volatile uint32_t RMFCR0; /* RMFCR0 */
232 volatile uint8_t dummy216[4]; /* */
233 volatile uint32_t TFTR0; /* TFTR0 */
234 volatile uint8_t dummy217[4]; /* */
235 volatile uint32_t FDR0; /* FDR0 */
236 volatile uint8_t dummy218[4]; /* */
237 volatile uint32_t RMCR0; /* RMCR0 */
238 volatile uint8_t dummy219[4]; /* */
239 volatile uint32_t RPADIR0; /* RPADIR0 */
240 volatile uint8_t dummy220[4]; /* */
241 volatile uint32_t FCFTR0; /* FCFTR0 */
242 volatile uint8_t dummy221[120]; /* */
243 volatile uint32_t CSMR; /* CSMR */
244 volatile uint32_t CSSBM; /* CSSBM */
245 volatile uint32_t CSSMR; /* CSSMR */
246 volatile uint8_t dummy222[16]; /* */
247 volatile uint32_t ECMR0; /* ECMR0 */
248 volatile uint8_t dummy223[4]; /* */
249 volatile uint32_t RFLR0; /* RFLR0 */
250 volatile uint8_t dummy224[4]; /* */
251 volatile uint32_t ECSR0; /* ECSR0 */
252 volatile uint8_t dummy225[4]; /* */
253 volatile uint32_t ECSIPR0; /* ECSIPR0 */
254 volatile uint8_t dummy226[4]; /* */
255 volatile uint32_t PIR0; /* PIR0 */
256 volatile uint8_t dummy227[48]; /* */
257 volatile uint32_t APR0; /* APR0 */
258 volatile uint32_t MPR0; /* MPR0 */
259 volatile uint32_t PFTCR0; /* PFTCR0 */
260 volatile uint32_t PFRCR0; /* PFRCR0 */
261 volatile uint32_t TPAUSER0; /* TPAUSER0 */
262 volatile uint8_t dummy228[88]; /* */
263 volatile uint32_t MAHR0; /* MAHR0 */
264 volatile uint8_t dummy229[4]; /* */
265 volatile uint32_t MALR0; /* MALR0 */
266 volatile uint8_t dummy230[372]; /* */
267 volatile uint32_t CEFCR0; /* CEFCR0 */
268 volatile uint8_t dummy231[4]; /* */
269 volatile uint32_t FRECR0; /* FRECR0 */
270 volatile uint8_t dummy232[4]; /* */
271 volatile uint32_t TSFRCR0; /* TSFRCR0 */
272 volatile uint8_t dummy233[4]; /* */
273 volatile uint32_t TLFRCR0; /* TLFRCR0 */
274 volatile uint8_t dummy234[4]; /* */
275 volatile uint32_t RFCR0; /* RFCR0 */
276 volatile uint8_t dummy235[20]; /* */
277 volatile uint32_t MAFCR0; /* MAFCR0 */
278 volatile uint8_t dummy236[4228]; /* */
279 volatile uint32_t ARSTR; /* ARSTR */
280 volatile uint32_t TSU_CTRST; /* TSU_CTRST */
281 volatile uint8_t dummy237[80]; /* */
282 volatile uint32_t TSU_VTAG0; /* TSU_VTAG0 */
283 volatile uint8_t dummy238[4]; /* */
284 volatile uint32_t TSU_ADSBSY; /* TSU_ADSBSY */
285 volatile uint32_t TSU_TEN; /* TSU_TEN */
286 volatile uint8_t dummy239[24]; /* */
287 volatile uint32_t TXNLCR0; /* TXNLCR0 */
288 volatile uint32_t TXALCR0; /* TXALCR0 */
289 volatile uint32_t RXNLCR0; /* RXNLCR0 */
290 volatile uint32_t RXALCR0; /* RXALCR0 */
291 volatile uint8_t dummy240[112]; /* */
292
293/* start of struct st_ether_from_tsu_adrh0 */
294 volatile uint32_t TSU_ADRH0; /* TSU_ADRH0 */
295 volatile uint32_t TSU_ADRL0; /* TSU_ADRL0 */
296
297/* end of struct st_ether_from_tsu_adrh0 */
298
299/* start of struct st_ether_from_tsu_adrh0 */
300 volatile uint32_t TSU_ADRH1; /* TSU_ADRH1 */
301 volatile uint32_t TSU_ADRL1; /* TSU_ADRL1 */
302
303/* end of struct st_ether_from_tsu_adrh0 */
304
305/* start of struct st_ether_from_tsu_adrh0 */
306 volatile uint32_t TSU_ADRH2; /* TSU_ADRH2 */
307 volatile uint32_t TSU_ADRL2; /* TSU_ADRL2 */
308
309/* end of struct st_ether_from_tsu_adrh0 */
310
311/* start of struct st_ether_from_tsu_adrh0 */
312 volatile uint32_t TSU_ADRH3; /* TSU_ADRH3 */
313 volatile uint32_t TSU_ADRL3; /* TSU_ADRL3 */
314
315/* end of struct st_ether_from_tsu_adrh0 */
316
317/* start of struct st_ether_from_tsu_adrh0 */
318 volatile uint32_t TSU_ADRH4; /* TSU_ADRH4 */
319 volatile uint32_t TSU_ADRL4; /* TSU_ADRL4 */
320
321/* end of struct st_ether_from_tsu_adrh0 */
322
323/* start of struct st_ether_from_tsu_adrh0 */
324 volatile uint32_t TSU_ADRH5; /* TSU_ADRH5 */
325 volatile uint32_t TSU_ADRL5; /* TSU_ADRL5 */
326
327/* end of struct st_ether_from_tsu_adrh0 */
328
329/* start of struct st_ether_from_tsu_adrh0 */
330 volatile uint32_t TSU_ADRH6; /* TSU_ADRH6 */
331 volatile uint32_t TSU_ADRL6; /* TSU_ADRL6 */
332
333/* end of struct st_ether_from_tsu_adrh0 */
334
335/* start of struct st_ether_from_tsu_adrh0 */
336 volatile uint32_t TSU_ADRH7; /* TSU_ADRH7 */
337 volatile uint32_t TSU_ADRL7; /* TSU_ADRL7 */
338
339/* end of struct st_ether_from_tsu_adrh0 */
340
341/* start of struct st_ether_from_tsu_adrh0 */
342 volatile uint32_t TSU_ADRH8; /* TSU_ADRH8 */
343 volatile uint32_t TSU_ADRL8; /* TSU_ADRL8 */
344
345/* end of struct st_ether_from_tsu_adrh0 */
346
347/* start of struct st_ether_from_tsu_adrh0 */
348 volatile uint32_t TSU_ADRH9; /* TSU_ADRH9 */
349 volatile uint32_t TSU_ADRL9; /* TSU_ADRL9 */
350
351/* end of struct st_ether_from_tsu_adrh0 */
352
353/* start of struct st_ether_from_tsu_adrh0 */
354 volatile uint32_t TSU_ADRH10; /* TSU_ADRH10 */
355 volatile uint32_t TSU_ADRL10; /* TSU_ADRL10 */
356
357/* end of struct st_ether_from_tsu_adrh0 */
358
359/* start of struct st_ether_from_tsu_adrh0 */
360 volatile uint32_t TSU_ADRH11; /* TSU_ADRH11 */
361 volatile uint32_t TSU_ADRL11; /* TSU_ADRL11 */
362
363/* end of struct st_ether_from_tsu_adrh0 */
364
365/* start of struct st_ether_from_tsu_adrh0 */
366 volatile uint32_t TSU_ADRH12; /* TSU_ADRH12 */
367 volatile uint32_t TSU_ADRL12; /* TSU_ADRL12 */
368
369/* end of struct st_ether_from_tsu_adrh0 */
370
371/* start of struct st_ether_from_tsu_adrh0 */
372 volatile uint32_t TSU_ADRH13; /* TSU_ADRH13 */
373 volatile uint32_t TSU_ADRL13; /* TSU_ADRL13 */
374
375/* end of struct st_ether_from_tsu_adrh0 */
376
377/* start of struct st_ether_from_tsu_adrh0 */
378 volatile uint32_t TSU_ADRH14; /* TSU_ADRH14 */
379 volatile uint32_t TSU_ADRL14; /* TSU_ADRL14 */
380
381/* end of struct st_ether_from_tsu_adrh0 */
382
383/* start of struct st_ether_from_tsu_adrh0 */
384 volatile uint32_t TSU_ADRH15; /* TSU_ADRH15 */
385 volatile uint32_t TSU_ADRL15; /* TSU_ADRL15 */
386
387/* end of struct st_ether_from_tsu_adrh0 */
388
389/* start of struct st_ether_from_tsu_adrh0 */
390 volatile uint32_t TSU_ADRH16; /* TSU_ADRH16 */
391 volatile uint32_t TSU_ADRL16; /* TSU_ADRL16 */
392
393/* end of struct st_ether_from_tsu_adrh0 */
394
395/* start of struct st_ether_from_tsu_adrh0 */
396 volatile uint32_t TSU_ADRH17; /* TSU_ADRH17 */
397 volatile uint32_t TSU_ADRL17; /* TSU_ADRL17 */
398
399/* end of struct st_ether_from_tsu_adrh0 */
400
401/* start of struct st_ether_from_tsu_adrh0 */
402 volatile uint32_t TSU_ADRH18; /* TSU_ADRH18 */
403 volatile uint32_t TSU_ADRL18; /* TSU_ADRL18 */
404
405/* end of struct st_ether_from_tsu_adrh0 */
406
407/* start of struct st_ether_from_tsu_adrh0 */
408 volatile uint32_t TSU_ADRH19; /* TSU_ADRH19 */
409 volatile uint32_t TSU_ADRL19; /* TSU_ADRL19 */
410
411/* end of struct st_ether_from_tsu_adrh0 */
412
413/* start of struct st_ether_from_tsu_adrh0 */
414 volatile uint32_t TSU_ADRH20; /* TSU_ADRH20 */
415 volatile uint32_t TSU_ADRL20; /* TSU_ADRL20 */
416
417/* end of struct st_ether_from_tsu_adrh0 */
418
419/* start of struct st_ether_from_tsu_adrh0 */
420 volatile uint32_t TSU_ADRH21; /* TSU_ADRH21 */
421 volatile uint32_t TSU_ADRL21; /* TSU_ADRL21 */
422
423/* end of struct st_ether_from_tsu_adrh0 */
424
425/* start of struct st_ether_from_tsu_adrh0 */
426 volatile uint32_t TSU_ADRH22; /* TSU_ADRH22 */
427 volatile uint32_t TSU_ADRL22; /* TSU_ADRL22 */
428
429/* end of struct st_ether_from_tsu_adrh0 */
430
431/* start of struct st_ether_from_tsu_adrh0 */
432 volatile uint32_t TSU_ADRH23; /* TSU_ADRH23 */
433 volatile uint32_t TSU_ADRL23; /* TSU_ADRL23 */
434
435/* end of struct st_ether_from_tsu_adrh0 */
436
437/* start of struct st_ether_from_tsu_adrh0 */
438 volatile uint32_t TSU_ADRH24; /* TSU_ADRH24 */
439 volatile uint32_t TSU_ADRL24; /* TSU_ADRL24 */
440
441/* end of struct st_ether_from_tsu_adrh0 */
442
443/* start of struct st_ether_from_tsu_adrh0 */
444 volatile uint32_t TSU_ADRH25; /* TSU_ADRH25 */
445 volatile uint32_t TSU_ADRL25; /* TSU_ADRL25 */
446
447/* end of struct st_ether_from_tsu_adrh0 */
448
449/* start of struct st_ether_from_tsu_adrh0 */
450 volatile uint32_t TSU_ADRH26; /* TSU_ADRH26 */
451 volatile uint32_t TSU_ADRL26; /* TSU_ADRL26 */
452
453/* end of struct st_ether_from_tsu_adrh0 */
454
455/* start of struct st_ether_from_tsu_adrh0 */
456 volatile uint32_t TSU_ADRH27; /* TSU_ADRH27 */
457 volatile uint32_t TSU_ADRL27; /* TSU_ADRL27 */
458
459/* end of struct st_ether_from_tsu_adrh0 */
460
461/* start of struct st_ether_from_tsu_adrh0 */
462 volatile uint32_t TSU_ADRH28; /* TSU_ADRH28 */
463 volatile uint32_t TSU_ADRL28; /* TSU_ADRL28 */
464
465/* end of struct st_ether_from_tsu_adrh0 */
466
467/* start of struct st_ether_from_tsu_adrh0 */
468 volatile uint32_t TSU_ADRH29; /* TSU_ADRH29 */
469 volatile uint32_t TSU_ADRL29; /* TSU_ADRL29 */
470
471/* end of struct st_ether_from_tsu_adrh0 */
472
473/* start of struct st_ether_from_tsu_adrh0 */
474 volatile uint32_t TSU_ADRH30; /* TSU_ADRH30 */
475 volatile uint32_t TSU_ADRL30; /* TSU_ADRL30 */
476
477/* end of struct st_ether_from_tsu_adrh0 */
478
479/* start of struct st_ether_from_tsu_adrh0 */
480 volatile uint32_t TSU_ADRH31; /* TSU_ADRH31 */
481 volatile uint32_t TSU_ADRL31; /* TSU_ADRL31 */
482
483/* end of struct st_ether_from_tsu_adrh0 */
484} r_io_ether_t;
485
486
487typedef struct st_ether_from_tsu_adrh0
488{
489
490 volatile uint32_t TSU_ADRH0; /* TSU_ADRH0 */
491 volatile uint32_t TSU_ADRL0; /* TSU_ADRL0 */
492} r_io_ether_from_tsu_adrh0_t;
493
494
495/* Channel array defines of ETHER (2)*/
496#ifdef DECLARE_ETHER_FROM_TSU_ADRH0_ARRAY_CHANNELS
497volatile struct st_ether_from_tsu_adrh0* ETHER_FROM_TSU_ADRH0_ARRAY[ ETHER_FROM_TSU_ADRH0_ARRAY_COUNT ] =
498 /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */
499 ETHER_FROM_TSU_ADRH0_ARRAY_ADDRESS_LIST;
500 /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */
501#endif /* DECLARE_ETHER_FROM_TSU_ADRH0_ARRAY_CHANNELS */
502/* End of channel array defines of ETHER (2)*/
503
504
505/* <-SEC M1.10.1 */
506/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
507/* <-QAC 0857 */
508/* <-QAC 0639 */
509#endif
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