source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/dvdec_iodefine.h@ 374

Last change on this file since 374 was 374, checked in by coas-nagasima, 5 years ago

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1/*******************************************************************************
2* DISCLAIMER
3* This software is supplied by Renesas Electronics Corporation and is only
4* intended for use with Renesas products. No other uses are authorized. This
5* software is owned by Renesas Electronics Corporation and is protected under
6* all applicable laws, including copyright laws.
7* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16* Renesas reserves the right, without notice, to make changes to this software
17* and to discontinue the availability of this software. By using this software,
18* you agree to the additional terms and conditions found by accessing the
19* following link:
20* http://www.renesas.com/disclaimer*
21* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved.
22*******************************************************************************/
23/*******************************************************************************
24* File Name : dvdec_iodefine.h
25* $Rev: $
26* $Date:: $
27* Description : Definition of I/O Register for RZ/A1H,M (V2.00h)
28******************************************************************************/
29#ifndef DVDEC_IODEFINE_H
30#define DVDEC_IODEFINE_H
31/* ->QAC 0639 : Over 127 members (C90) */
32/* ->QAC 0857 : Over 1024 #define (C90) */
33/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
34/* ->SEC M1.10.1 : Not magic number */
35
36#define DVDEC1 (*(struct st_dvdec *)0xFCFFA008uL) /* DVDEC1 */
37#define DVDEC0 (*(struct st_dvdec *)0xFCFFB808uL) /* DVDEC0 */
38
39
40/* Start of channel array defines of DVDEC */
41
42/* Channel array defines of DVDEC */
43/*(Sample) value = DVDEC[ channel ]->ADCCR1; */
44#define DVDEC_COUNT (2)
45#define DVDEC_ADDRESS_LIST \
46{ /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
47 &DVDEC0, &DVDEC1 \
48} /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
49
50/* End of channel array defines of DVDEC */
51
52
53#define ADCCR1_1 (DVDEC1.ADCCR1)
54#define TGCR1_1 (DVDEC1.TGCR1)
55#define TGCR2_1 (DVDEC1.TGCR2)
56#define TGCR3_1 (DVDEC1.TGCR3)
57#define SYNSCR1_1 (DVDEC1.SYNSCR1)
58#define SYNSCR2_1 (DVDEC1.SYNSCR2)
59#define SYNSCR3_1 (DVDEC1.SYNSCR3)
60#define SYNSCR4_1 (DVDEC1.SYNSCR4)
61#define SYNSCR5_1 (DVDEC1.SYNSCR5)
62#define HAFCCR1_1 (DVDEC1.HAFCCR1)
63#define HAFCCR2_1 (DVDEC1.HAFCCR2)
64#define HAFCCR3_1 (DVDEC1.HAFCCR3)
65#define VCDWCR1_1 (DVDEC1.VCDWCR1)
66#define DCPCR1_1 (DVDEC1.DCPCR1)
67#define DCPCR2_1 (DVDEC1.DCPCR2)
68#define DCPCR3_1 (DVDEC1.DCPCR3)
69#define DCPCR4_1 (DVDEC1.DCPCR4)
70#define DCPCR5_1 (DVDEC1.DCPCR5)
71#define DCPCR6_1 (DVDEC1.DCPCR6)
72#define DCPCR7_1 (DVDEC1.DCPCR7)
73#define DCPCR8_1 (DVDEC1.DCPCR8)
74#define NSDCR_1 (DVDEC1.NSDCR)
75#define BTLCR_1 (DVDEC1.BTLCR)
76#define BTGPCR_1 (DVDEC1.BTGPCR)
77#define ACCCR1_1 (DVDEC1.ACCCR1)
78#define ACCCR2_1 (DVDEC1.ACCCR2)
79#define ACCCR3_1 (DVDEC1.ACCCR3)
80#define TINTCR_1 (DVDEC1.TINTCR)
81#define YCDCR_1 (DVDEC1.YCDCR)
82#define AGCCR1_1 (DVDEC1.AGCCR1)
83#define AGCCR2_1 (DVDEC1.AGCCR2)
84#define PKLIMITCR_1 (DVDEC1.PKLIMITCR)
85#define RGORCR1_1 (DVDEC1.RGORCR1)
86#define RGORCR2_1 (DVDEC1.RGORCR2)
87#define RGORCR3_1 (DVDEC1.RGORCR3)
88#define RGORCR4_1 (DVDEC1.RGORCR4)
89#define RGORCR5_1 (DVDEC1.RGORCR5)
90#define RGORCR6_1 (DVDEC1.RGORCR6)
91#define RGORCR7_1 (DVDEC1.RGORCR7)
92#define AFCPFCR_1 (DVDEC1.AFCPFCR)
93#define RUPDCR_1 (DVDEC1.RUPDCR)
94#define VSYNCSR_1 (DVDEC1.VSYNCSR)
95#define HSYNCSR_1 (DVDEC1.HSYNCSR)
96#define DCPSR1_1 (DVDEC1.DCPSR1)
97#define DCPSR2_1 (DVDEC1.DCPSR2)
98#define NSDSR_1 (DVDEC1.NSDSR)
99#define CROMASR1_1 (DVDEC1.CROMASR1)
100#define CROMASR2_1 (DVDEC1.CROMASR2)
101#define SYNCSSR_1 (DVDEC1.SYNCSSR)
102#define AGCCSR1_1 (DVDEC1.AGCCSR1)
103#define AGCCSR2_1 (DVDEC1.AGCCSR2)
104#define YCSCR3_1 (DVDEC1.YCSCR3)
105#define YCSCR4_1 (DVDEC1.YCSCR4)
106#define YCSCR5_1 (DVDEC1.YCSCR5)
107#define YCSCR6_1 (DVDEC1.YCSCR6)
108#define YCSCR7_1 (DVDEC1.YCSCR7)
109#define YCSCR8_1 (DVDEC1.YCSCR8)
110#define YCSCR9_1 (DVDEC1.YCSCR9)
111#define YCSCR11_1 (DVDEC1.YCSCR11)
112#define YCSCR12_1 (DVDEC1.YCSCR12)
113#define DCPCR9_1 (DVDEC1.DCPCR9)
114#define YCTWA_F0_1 (DVDEC1.YCTWA_F0)
115#define YCTWA_F1_1 (DVDEC1.YCTWA_F1)
116#define YCTWA_F2_1 (DVDEC1.YCTWA_F2)
117#define YCTWA_F3_1 (DVDEC1.YCTWA_F3)
118#define YCTWA_F4_1 (DVDEC1.YCTWA_F4)
119#define YCTWA_F5_1 (DVDEC1.YCTWA_F5)
120#define YCTWA_F6_1 (DVDEC1.YCTWA_F6)
121#define YCTWA_F7_1 (DVDEC1.YCTWA_F7)
122#define YCTWA_F8_1 (DVDEC1.YCTWA_F8)
123#define YCTWB_F0_1 (DVDEC1.YCTWB_F0)
124#define YCTWB_F1_1 (DVDEC1.YCTWB_F1)
125#define YCTWB_F2_1 (DVDEC1.YCTWB_F2)
126#define YCTWB_F3_1 (DVDEC1.YCTWB_F3)
127#define YCTWB_F4_1 (DVDEC1.YCTWB_F4)
128#define YCTWB_F5_1 (DVDEC1.YCTWB_F5)
129#define YCTWB_F6_1 (DVDEC1.YCTWB_F6)
130#define YCTWB_F7_1 (DVDEC1.YCTWB_F7)
131#define YCTWB_F8_1 (DVDEC1.YCTWB_F8)
132#define YCTNA_F0_1 (DVDEC1.YCTNA_F0)
133#define YCTNA_F1_1 (DVDEC1.YCTNA_F1)
134#define YCTNA_F2_1 (DVDEC1.YCTNA_F2)
135#define YCTNA_F3_1 (DVDEC1.YCTNA_F3)
136#define YCTNA_F4_1 (DVDEC1.YCTNA_F4)
137#define YCTNA_F5_1 (DVDEC1.YCTNA_F5)
138#define YCTNA_F6_1 (DVDEC1.YCTNA_F6)
139#define YCTNA_F7_1 (DVDEC1.YCTNA_F7)
140#define YCTNA_F8_1 (DVDEC1.YCTNA_F8)
141#define YCTNB_F0_1 (DVDEC1.YCTNB_F0)
142#define YCTNB_F1_1 (DVDEC1.YCTNB_F1)
143#define YCTNB_F2_1 (DVDEC1.YCTNB_F2)
144#define YCTNB_F3_1 (DVDEC1.YCTNB_F3)
145#define YCTNB_F4_1 (DVDEC1.YCTNB_F4)
146#define YCTNB_F5_1 (DVDEC1.YCTNB_F5)
147#define YCTNB_F6_1 (DVDEC1.YCTNB_F6)
148#define YCTNB_F7_1 (DVDEC1.YCTNB_F7)
149#define YCTNB_F8_1 (DVDEC1.YCTNB_F8)
150#define YGAINCR_1 (DVDEC1.YGAINCR)
151#define CBGAINCR_1 (DVDEC1.CBGAINCR)
152#define CRGAINCR_1 (DVDEC1.CRGAINCR)
153#define PGA_UPDATE_1 (DVDEC1.PGA_UPDATE)
154#define PGACR_1 (DVDEC1.PGACR)
155#define ADCCR2_1 (DVDEC1.ADCCR2)
156#define ADCCR1_0 (DVDEC0.ADCCR1)
157#define TGCR1_0 (DVDEC0.TGCR1)
158#define TGCR2_0 (DVDEC0.TGCR2)
159#define TGCR3_0 (DVDEC0.TGCR3)
160#define SYNSCR1_0 (DVDEC0.SYNSCR1)
161#define SYNSCR2_0 (DVDEC0.SYNSCR2)
162#define SYNSCR3_0 (DVDEC0.SYNSCR3)
163#define SYNSCR4_0 (DVDEC0.SYNSCR4)
164#define SYNSCR5_0 (DVDEC0.SYNSCR5)
165#define HAFCCR1_0 (DVDEC0.HAFCCR1)
166#define HAFCCR2_0 (DVDEC0.HAFCCR2)
167#define HAFCCR3_0 (DVDEC0.HAFCCR3)
168#define VCDWCR1_0 (DVDEC0.VCDWCR1)
169#define DCPCR1_0 (DVDEC0.DCPCR1)
170#define DCPCR2_0 (DVDEC0.DCPCR2)
171#define DCPCR3_0 (DVDEC0.DCPCR3)
172#define DCPCR4_0 (DVDEC0.DCPCR4)
173#define DCPCR5_0 (DVDEC0.DCPCR5)
174#define DCPCR6_0 (DVDEC0.DCPCR6)
175#define DCPCR7_0 (DVDEC0.DCPCR7)
176#define DCPCR8_0 (DVDEC0.DCPCR8)
177#define NSDCR_0 (DVDEC0.NSDCR)
178#define BTLCR_0 (DVDEC0.BTLCR)
179#define BTGPCR_0 (DVDEC0.BTGPCR)
180#define ACCCR1_0 (DVDEC0.ACCCR1)
181#define ACCCR2_0 (DVDEC0.ACCCR2)
182#define ACCCR3_0 (DVDEC0.ACCCR3)
183#define TINTCR_0 (DVDEC0.TINTCR)
184#define YCDCR_0 (DVDEC0.YCDCR)
185#define AGCCR1_0 (DVDEC0.AGCCR1)
186#define AGCCR2_0 (DVDEC0.AGCCR2)
187#define PKLIMITCR_0 (DVDEC0.PKLIMITCR)
188#define RGORCR1_0 (DVDEC0.RGORCR1)
189#define RGORCR2_0 (DVDEC0.RGORCR2)
190#define RGORCR3_0 (DVDEC0.RGORCR3)
191#define RGORCR4_0 (DVDEC0.RGORCR4)
192#define RGORCR5_0 (DVDEC0.RGORCR5)
193#define RGORCR6_0 (DVDEC0.RGORCR6)
194#define RGORCR7_0 (DVDEC0.RGORCR7)
195#define AFCPFCR_0 (DVDEC0.AFCPFCR)
196#define RUPDCR_0 (DVDEC0.RUPDCR)
197#define VSYNCSR_0 (DVDEC0.VSYNCSR)
198#define HSYNCSR_0 (DVDEC0.HSYNCSR)
199#define DCPSR1_0 (DVDEC0.DCPSR1)
200#define DCPSR2_0 (DVDEC0.DCPSR2)
201#define NSDSR_0 (DVDEC0.NSDSR)
202#define CROMASR1_0 (DVDEC0.CROMASR1)
203#define CROMASR2_0 (DVDEC0.CROMASR2)
204#define SYNCSSR_0 (DVDEC0.SYNCSSR)
205#define AGCCSR1_0 (DVDEC0.AGCCSR1)
206#define AGCCSR2_0 (DVDEC0.AGCCSR2)
207#define YCSCR3_0 (DVDEC0.YCSCR3)
208#define YCSCR4_0 (DVDEC0.YCSCR4)
209#define YCSCR5_0 (DVDEC0.YCSCR5)
210#define YCSCR6_0 (DVDEC0.YCSCR6)
211#define YCSCR7_0 (DVDEC0.YCSCR7)
212#define YCSCR8_0 (DVDEC0.YCSCR8)
213#define YCSCR9_0 (DVDEC0.YCSCR9)
214#define YCSCR11_0 (DVDEC0.YCSCR11)
215#define YCSCR12_0 (DVDEC0.YCSCR12)
216#define DCPCR9_0 (DVDEC0.DCPCR9)
217#define YCTWA_F0_0 (DVDEC0.YCTWA_F0)
218#define YCTWA_F1_0 (DVDEC0.YCTWA_F1)
219#define YCTWA_F2_0 (DVDEC0.YCTWA_F2)
220#define YCTWA_F3_0 (DVDEC0.YCTWA_F3)
221#define YCTWA_F4_0 (DVDEC0.YCTWA_F4)
222#define YCTWA_F5_0 (DVDEC0.YCTWA_F5)
223#define YCTWA_F6_0 (DVDEC0.YCTWA_F6)
224#define YCTWA_F7_0 (DVDEC0.YCTWA_F7)
225#define YCTWA_F8_0 (DVDEC0.YCTWA_F8)
226#define YCTWB_F0_0 (DVDEC0.YCTWB_F0)
227#define YCTWB_F1_0 (DVDEC0.YCTWB_F1)
228#define YCTWB_F2_0 (DVDEC0.YCTWB_F2)
229#define YCTWB_F3_0 (DVDEC0.YCTWB_F3)
230#define YCTWB_F4_0 (DVDEC0.YCTWB_F4)
231#define YCTWB_F5_0 (DVDEC0.YCTWB_F5)
232#define YCTWB_F6_0 (DVDEC0.YCTWB_F6)
233#define YCTWB_F7_0 (DVDEC0.YCTWB_F7)
234#define YCTWB_F8_0 (DVDEC0.YCTWB_F8)
235#define YCTNA_F0_0 (DVDEC0.YCTNA_F0)
236#define YCTNA_F1_0 (DVDEC0.YCTNA_F1)
237#define YCTNA_F2_0 (DVDEC0.YCTNA_F2)
238#define YCTNA_F3_0 (DVDEC0.YCTNA_F3)
239#define YCTNA_F4_0 (DVDEC0.YCTNA_F4)
240#define YCTNA_F5_0 (DVDEC0.YCTNA_F5)
241#define YCTNA_F6_0 (DVDEC0.YCTNA_F6)
242#define YCTNA_F7_0 (DVDEC0.YCTNA_F7)
243#define YCTNA_F8_0 (DVDEC0.YCTNA_F8)
244#define YCTNB_F0_0 (DVDEC0.YCTNB_F0)
245#define YCTNB_F1_0 (DVDEC0.YCTNB_F1)
246#define YCTNB_F2_0 (DVDEC0.YCTNB_F2)
247#define YCTNB_F3_0 (DVDEC0.YCTNB_F3)
248#define YCTNB_F4_0 (DVDEC0.YCTNB_F4)
249#define YCTNB_F5_0 (DVDEC0.YCTNB_F5)
250#define YCTNB_F6_0 (DVDEC0.YCTNB_F6)
251#define YCTNB_F7_0 (DVDEC0.YCTNB_F7)
252#define YCTNB_F8_0 (DVDEC0.YCTNB_F8)
253#define YGAINCR_0 (DVDEC0.YGAINCR)
254#define CBGAINCR_0 (DVDEC0.CBGAINCR)
255#define CRGAINCR_0 (DVDEC0.CRGAINCR)
256#define PGA_UPDATE_0 (DVDEC0.PGA_UPDATE)
257#define PGACR_0 (DVDEC0.PGACR)
258#define ADCCR2_0 (DVDEC0.ADCCR2)
259
260#define DVDEC_TGCRn_COUNT (3)
261#define DVDEC_SYNSCRn_COUNT (5)
262#define DVDEC_HAFCCRn_COUNT (3)
263#define DVDEC_DCPCRn_COUNT (8)
264#define DVDEC_ACCCRn_COUNT (3)
265#define DVDEC_AGCCRn_COUNT (2)
266#define DVDEC_RGORCRn_COUNT (7)
267#define DVDEC_DCPSRn_COUNT (2)
268#define DVDEC_CROMASRn_COUNT (2)
269#define DVDEC_AGCCSRn_COUNT (2)
270#define DVDEC_YCSCRn_COUNT (7)
271#define DVDEC_YCTWA_Fn_COUNT (9)
272#define DVDEC_YCTWB_Fn_COUNT (9)
273#define DVDEC_YCTNA_Fn_COUNT (9)
274#define DVDEC_YCTNB_Fn_COUNT (9)
275
276
277typedef struct st_dvdec
278{
279 /* DVDEC */
280 volatile uint16_t ADCCR1; /* ADCCR1 */
281 volatile uint8_t dummy1[4]; /* */
282
283/* #define DVDEC_TGCRn_COUNT (3) */
284 volatile uint16_t TGCR1; /* TGCR1 */
285 volatile uint16_t TGCR2; /* TGCR2 */
286 volatile uint16_t TGCR3; /* TGCR3 */
287 volatile uint8_t dummy2[6]; /* */
288
289/* #define DVDEC_SYNSCRn_COUNT (5) */
290 volatile uint16_t SYNSCR1; /* SYNSCR1 */
291 volatile uint16_t SYNSCR2; /* SYNSCR2 */
292 volatile uint16_t SYNSCR3; /* SYNSCR3 */
293 volatile uint16_t SYNSCR4; /* SYNSCR4 */
294 volatile uint16_t SYNSCR5; /* SYNSCR5 */
295
296/* #define DVDEC_HAFCCRn_COUNT (3) */
297 volatile uint16_t HAFCCR1; /* HAFCCR1 */
298 volatile uint16_t HAFCCR2; /* HAFCCR2 */
299 volatile uint16_t HAFCCR3; /* HAFCCR3 */
300 volatile uint16_t VCDWCR1; /* VCDWCR1 */
301 volatile uint8_t dummy3[4]; /* */
302
303/* #define DVDEC_DCPCRn_COUNT (8) */
304 volatile uint16_t DCPCR1; /* DCPCR1 */
305 volatile uint16_t DCPCR2; /* DCPCR2 */
306 volatile uint16_t DCPCR3; /* DCPCR3 */
307 volatile uint16_t DCPCR4; /* DCPCR4 */
308 volatile uint16_t DCPCR5; /* DCPCR5 */
309 volatile uint16_t DCPCR6; /* DCPCR6 */
310 volatile uint16_t DCPCR7; /* DCPCR7 */
311 volatile uint16_t DCPCR8; /* DCPCR8 */
312 volatile uint16_t NSDCR; /* NSDCR */
313 volatile uint16_t BTLCR; /* BTLCR */
314 volatile uint16_t BTGPCR; /* BTGPCR */
315
316/* #define DVDEC_ACCCRn_COUNT (3) */
317 volatile uint16_t ACCCR1; /* ACCCR1 */
318 volatile uint16_t ACCCR2; /* ACCCR2 */
319 volatile uint16_t ACCCR3; /* ACCCR3 */
320 volatile uint16_t TINTCR; /* TINTCR */
321 volatile uint16_t YCDCR; /* YCDCR */
322
323/* #define DVDEC_AGCCRn_COUNT (2) */
324 volatile uint16_t AGCCR1; /* AGCCR1 */
325 volatile uint16_t AGCCR2; /* AGCCR2 */
326 volatile uint16_t PKLIMITCR; /* PKLIMITCR */
327
328/* #define DVDEC_RGORCRn_COUNT (7) */
329 volatile uint16_t RGORCR1; /* RGORCR1 */
330 volatile uint16_t RGORCR2; /* RGORCR2 */
331 volatile uint16_t RGORCR3; /* RGORCR3 */
332 volatile uint16_t RGORCR4; /* RGORCR4 */
333 volatile uint16_t RGORCR5; /* RGORCR5 */
334 volatile uint16_t RGORCR6; /* RGORCR6 */
335 volatile uint16_t RGORCR7; /* RGORCR7 */
336 volatile uint8_t dummy4[24]; /* */
337 volatile uint16_t AFCPFCR; /* AFCPFCR */
338 volatile uint16_t RUPDCR; /* RUPDCR */
339 volatile uint16_t VSYNCSR; /* VSYNCSR */
340 volatile uint16_t HSYNCSR; /* HSYNCSR */
341
342/* #define DVDEC_DCPSRn_COUNT (2) */
343 volatile uint16_t DCPSR1; /* DCPSR1 */
344 volatile uint16_t DCPSR2; /* DCPSR2 */
345 volatile uint8_t dummy5[4]; /* */
346 volatile uint16_t NSDSR; /* NSDSR */
347
348/* #define DVDEC_CROMASRn_COUNT (2) */
349 volatile uint16_t CROMASR1; /* CROMASR1 */
350 volatile uint16_t CROMASR2; /* CROMASR2 */
351 volatile uint16_t SYNCSSR; /* SYNCSSR */
352
353/* #define DVDEC_AGCCSRn_COUNT (2) */
354 volatile uint16_t AGCCSR1; /* AGCCSR1 */
355 volatile uint16_t AGCCSR2; /* AGCCSR2 */
356 volatile uint8_t dummy6[108]; /* */
357
358/* #define DVDEC_YCSCRn_COUNT (7) */
359 volatile uint16_t YCSCR3; /* YCSCR3 */
360 volatile uint16_t YCSCR4; /* YCSCR4 */
361 volatile uint16_t YCSCR5; /* YCSCR5 */
362 volatile uint16_t YCSCR6; /* YCSCR6 */
363 volatile uint16_t YCSCR7; /* YCSCR7 */
364 volatile uint16_t YCSCR8; /* YCSCR8 */
365 volatile uint16_t YCSCR9; /* YCSCR9 */
366 volatile uint8_t dummy7[2]; /* */
367 volatile uint16_t YCSCR11; /* YCSCR11 */
368 volatile uint16_t YCSCR12; /* YCSCR12 */
369 volatile uint8_t dummy8[104]; /* */
370 volatile uint16_t DCPCR9; /* DCPCR9 */
371 volatile uint8_t dummy9[16]; /* */
372
373/* #define DVDEC_YCTWA_Fn_COUNT (9) */
374 volatile uint16_t YCTWA_F0; /* YCTWA_F0 */
375 volatile uint16_t YCTWA_F1; /* YCTWA_F1 */
376 volatile uint16_t YCTWA_F2; /* YCTWA_F2 */
377 volatile uint16_t YCTWA_F3; /* YCTWA_F3 */
378 volatile uint16_t YCTWA_F4; /* YCTWA_F4 */
379 volatile uint16_t YCTWA_F5; /* YCTWA_F5 */
380 volatile uint16_t YCTWA_F6; /* YCTWA_F6 */
381 volatile uint16_t YCTWA_F7; /* YCTWA_F7 */
382 volatile uint16_t YCTWA_F8; /* YCTWA_F8 */
383
384/* #define DVDEC_YCTWB_Fn_COUNT (9) */
385 volatile uint16_t YCTWB_F0; /* YCTWB_F0 */
386 volatile uint16_t YCTWB_F1; /* YCTWB_F1 */
387 volatile uint16_t YCTWB_F2; /* YCTWB_F2 */
388 volatile uint16_t YCTWB_F3; /* YCTWB_F3 */
389 volatile uint16_t YCTWB_F4; /* YCTWB_F4 */
390 volatile uint16_t YCTWB_F5; /* YCTWB_F5 */
391 volatile uint16_t YCTWB_F6; /* YCTWB_F6 */
392 volatile uint16_t YCTWB_F7; /* YCTWB_F7 */
393 volatile uint16_t YCTWB_F8; /* YCTWB_F8 */
394
395/* #define DVDEC_YCTNA_Fn_COUNT (9) */
396 volatile uint16_t YCTNA_F0; /* YCTNA_F0 */
397 volatile uint16_t YCTNA_F1; /* YCTNA_F1 */
398 volatile uint16_t YCTNA_F2; /* YCTNA_F2 */
399 volatile uint16_t YCTNA_F3; /* YCTNA_F3 */
400 volatile uint16_t YCTNA_F4; /* YCTNA_F4 */
401 volatile uint16_t YCTNA_F5; /* YCTNA_F5 */
402 volatile uint16_t YCTNA_F6; /* YCTNA_F6 */
403 volatile uint16_t YCTNA_F7; /* YCTNA_F7 */
404 volatile uint16_t YCTNA_F8; /* YCTNA_F8 */
405
406/* #define DVDEC_YCTNB_Fn_COUNT (9) */
407 volatile uint16_t YCTNB_F0; /* YCTNB_F0 */
408 volatile uint16_t YCTNB_F1; /* YCTNB_F1 */
409 volatile uint16_t YCTNB_F2; /* YCTNB_F2 */
410 volatile uint16_t YCTNB_F3; /* YCTNB_F3 */
411 volatile uint16_t YCTNB_F4; /* YCTNB_F4 */
412 volatile uint16_t YCTNB_F5; /* YCTNB_F5 */
413 volatile uint16_t YCTNB_F6; /* YCTNB_F6 */
414 volatile uint16_t YCTNB_F7; /* YCTNB_F7 */
415 volatile uint16_t YCTNB_F8; /* YCTNB_F8 */
416 volatile uint8_t dummy10[38]; /* */
417 volatile uint16_t YGAINCR; /* YGAINCR */
418 volatile uint16_t CBGAINCR; /* CBGAINCR */
419 volatile uint16_t CRGAINCR; /* CRGAINCR */
420 volatile uint8_t dummy11[122]; /* */
421 volatile uint16_t PGA_UPDATE; /* PGA_UPDATE */
422 volatile uint16_t PGACR; /* PGACR */
423 volatile uint16_t ADCCR2; /* ADCCR2 */
424} r_io_dvdec_t;
425
426
427/* Channel array defines of DVDEC (2)*/
428#ifdef DECLARE_DVDEC_CHANNELS
429volatile struct st_dvdec* DVDEC[ DVDEC_COUNT ] =
430 /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */
431 DVDEC_ADDRESS_LIST;
432 /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */
433#endif /* DECLARE_DVDEC_CHANNELS */
434/* End of channel array defines of DVDEC (2)*/
435
436
437/* <-SEC M1.10.1 */
438/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
439/* <-QAC 0857 */
440/* <-QAC 0639 */
441#endif
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