source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/hal/spi_api.h@ 374

Last change on this file since 374 was 374, checked in by coas-nagasima, 5 years ago

mbed関連を更新
シリアルドライバをmbedのHALを使うよう変更
ファイルディスクリプタの処理を更新

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1
2/** \addtogroup hal */
3/** @{*/
4/* mbed Microcontroller Library
5 * Copyright (c) 2006-2013 ARM Limited
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 */
19#ifndef MBED_SPI_API_H
20#define MBED_SPI_API_H
21
22#include "device.h"
23#include "hal/dma_api.h"
24#include "hal/buffer.h"
25
26#if DEVICE_SPI
27
28#define SPI_EVENT_ERROR (1 << 1)
29#define SPI_EVENT_COMPLETE (1 << 2)
30#define SPI_EVENT_RX_OVERFLOW (1 << 3)
31#define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
32
33#define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
34
35#define SPI_FILL_WORD (0xFFFF)
36#define SPI_FILL_CHAR (0xFF)
37
38#if DEVICE_SPI_ASYNCH
39/** Asynch SPI HAL structure
40 */
41typedef struct {
42 struct spi_s spi; /**< Target specific SPI structure */
43 struct buffer_s tx_buff; /**< Tx buffer */
44 struct buffer_s rx_buff; /**< Rx buffer */
45} spi_t;
46
47#else
48/** Non-asynch SPI HAL structure
49 */
50typedef struct spi_s spi_t;
51
52#endif
53
54#ifdef __cplusplus
55extern "C" {
56#endif
57
58/**
59 * \defgroup hal_GeneralSPI SPI Configuration Functions
60 * @{
61 */
62
63/** Initialize the SPI peripheral
64 *
65 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
66 * @param[out] obj The SPI object to initialize
67 * @param[in] mosi The pin to use for MOSI
68 * @param[in] miso The pin to use for MISO
69 * @param[in] sclk The pin to use for SCLK
70 * @param[in] ssel The pin to use for SSEL
71 */
72void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
73
74/** Release a SPI object
75 *
76 * TODO: spi_free is currently unimplemented
77 * This will require reference counting at the C++ level to be safe
78 *
79 * Return the pins owned by the SPI object to their reset state
80 * Disable the SPI peripheral
81 * Disable the SPI clock
82 * @param[in] obj The SPI object to deinitialize
83 */
84void spi_free(spi_t *obj);
85
86/** Configure the SPI format
87 *
88 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
89 * The default bit order is MSB.
90 * @param[in,out] obj The SPI object to configure
91 * @param[in] bits The number of bits per frame
92 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
93 * @param[in] slave Zero for master mode or non-zero for slave mode
94 */
95void spi_format(spi_t *obj, int bits, int mode, int slave);
96
97/** Set the SPI baud rate
98 *
99 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
100 * Configures the SPI peripheral's baud rate
101 * @param[in,out] obj The SPI object to configure
102 * @param[in] hz The baud rate in Hz
103 */
104void spi_frequency(spi_t *obj, int hz);
105
106/**@}*/
107/**
108 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
109 * @{
110 */
111
112/** Write a byte out in master mode and receive a value
113 *
114 * @param[in] obj The SPI peripheral to use for sending
115 * @param[in] value The value to send
116 * @return Returns the value received during send
117 */
118int spi_master_write(spi_t *obj, int value);
119
120/** Write a block out in master mode and receive a value
121 *
122 * The total number of bytes sent and received will be the maximum of
123 * tx_length and rx_length. The bytes written will be padded with the
124 * value 0xff.
125 *
126 * @param[in] obj The SPI peripheral to use for sending
127 * @param[in] tx_buffer Pointer to the byte-array of data to write to the device
128 * @param[in] tx_length Number of bytes to write, may be zero
129 * @param[in] rx_buffer Pointer to the byte-array of data to read from the device
130 * @param[in] rx_length Number of bytes to read, may be zero
131 * @param[in] write_fill Default data transmitted while performing a read
132 * @returns
133 * The number of bytes written and read from the device. This is
134 * maximum of tx_length and rx_length.
135 */
136int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill);
137
138/** Check if a value is available to read
139 *
140 * @param[in] obj The SPI peripheral to check
141 * @return non-zero if a value is available
142 */
143int spi_slave_receive(spi_t *obj);
144
145/** Get a received value out of the SPI receive buffer in slave mode
146 *
147 * Blocks until a value is available
148 * @param[in] obj The SPI peripheral to read
149 * @return The value received
150 */
151int spi_slave_read(spi_t *obj);
152
153/** Write a value to the SPI peripheral in slave mode
154 *
155 * Blocks until the SPI peripheral can be written to
156 * @param[in] obj The SPI peripheral to write
157 * @param[in] value The value to write
158 */
159void spi_slave_write(spi_t *obj, int value);
160
161/** Checks if the specified SPI peripheral is in use
162 *
163 * @param[in] obj The SPI peripheral to check
164 * @return non-zero if the peripheral is currently transmitting
165 */
166int spi_busy(spi_t *obj);
167
168/** Get the module number
169 *
170 * @param[in] obj The SPI peripheral to check
171 * @return The module number
172 */
173uint8_t spi_get_module(spi_t *obj);
174
175/**@}*/
176
177#if DEVICE_SPI_ASYNCH
178/**
179 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
180 * @{
181 */
182
183/** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
184 *
185 * @param[in] obj The SPI object that holds the transfer information
186 * @param[in] tx The transmit buffer
187 * @param[in] tx_length The number of bytes to transmit
188 * @param[in] rx The receive buffer
189 * @param[in] rx_length The number of bytes to receive
190 * @param[in] bit_width The bit width of buffer words
191 * @param[in] event The logical OR of events to be registered
192 * @param[in] handler SPI interrupt handler
193 * @param[in] hint A suggestion for how to use DMA with this transfer
194 */
195void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
196
197/** The asynchronous IRQ handler
198 *
199 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
200 * conditions, such as buffer overflows or transfer complete.
201 * @param[in] obj The SPI object that holds the transfer information
202 * @return Event flags if a transfer termination condition was met; otherwise 0.
203 */
204uint32_t spi_irq_handler_asynch(spi_t *obj);
205
206/** Attempts to determine if the SPI peripheral is already in use
207 *
208 * If a temporary DMA channel has been allocated, peripheral is in use.
209 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
210 * channel were allocated.
211 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
212 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
213 * there are any bytes in the FIFOs.
214 * @param[in] obj The SPI object to check for activity
215 * @return Non-zero if the SPI port is active or zero if it is not.
216 */
217uint8_t spi_active(spi_t *obj);
218
219/** Abort an SPI transfer
220 *
221 * @param obj The SPI peripheral to stop
222 */
223void spi_abort_asynch(spi_t *obj);
224
225
226#endif
227
228/**@}*/
229
230#ifdef __cplusplus
231}
232#endif // __cplusplus
233
234#endif // SPI_DEVICE
235
236#endif // MBED_SPI_API_H
237
238/** @}*/
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