[363] | 1 | /*
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| 2 | * TOPPERS/JSP Kernel
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| 3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
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| 4 | * Just Standard Profile Kernel
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| 5 | *
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| 6 | * Copyright (C) 2000-2004 by Embedded and Real-Time Systems Laboratory
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| 7 | * Toyohashi Univ. of Technology, JAPAN
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| 8 | *
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| 9 | * ä¸è¨èä½æ¨©è
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| 10 | ã¯ï¼ä»¥ä¸ã® (1)ã(4) ã®æ¡ä»¶ãï¼Free Software Foundation
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| 11 | * ã«ãã£ã¦å
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| 12 | ¬è¡¨ããã¦ãã GNU General Public License ã® Version 2 ã«è¨
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| 13 | * è¿°ããã¦ããæ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§ã¢
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| 14 | * ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹å¤ã»åé
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| 15 | å¸ï¼ä»¥ä¸ï¼
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| 16 | * å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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| 17 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
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| 18 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
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| 19 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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| 20 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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| 21 | * ç¨ã§ããå½¢ã§åé
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| 22 | å¸ããå ´åã«ã¯ï¼åé
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| 23 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
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| 24 | * è
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| 25 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
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| 26 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 27 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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| 28 | * ç¨ã§ããªãå½¢ã§åé
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| 29 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
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| 30 | * ã¨ï¼
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| 31 | * (a) åé
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| 32 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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| 33 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
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| 34 | * ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 35 | * (b) åé
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| 36 | å¸ã®å½¢æ
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| 37 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
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| 38 | * å ±åãããã¨ï¼
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| 39 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
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| 40 | * 害ãããï¼ä¸è¨èä½æ¨©è
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| 41 | ããã³TOPPERSããã¸ã§ã¯ããå
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| 42 | 責ãããã¨ï¼
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| 43 | *
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| 44 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
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| 45 | ã
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| 46 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ã
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| 47 | * å«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´
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| 48 | * æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
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| 49 | *
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| 50 | * @(#) $Id: cpu_support.S,v 1.27 2007/01/05 01:02:31 honda Exp $
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| 51 | */
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| 52 |
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| 53 | /*
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| 54 | * ããã»ããµä¾åã¢ã¸ã¥ã¼ã« ã¢ã»ã³ããªè¨èªé¨ï¼ARMv4ç¨ï¼
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| 55 | */
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| 56 | #define _MACRO_ONLY
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| 57 | #include "jsp_kernel.h"
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| 58 | #include "offset.h"
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| 59 | #include <armv4.h>
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| 60 | #include <t_config.h>
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| 61 |
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| 62 | /*
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| 63 | * ã¿ã¹ã¯ãã£ã¹ãããã£
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| 64 | *
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| 65 | * dispatch ã¯ï¼ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ãã»å²è¾¼ã¿ç¦æ¢ç¶æ
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| 66 | ã§å¼ã³åºããªããã°
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| 67 | * ãªããªãï¼
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| 68 | * _exit_and_dispatch ãï¼ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ãã»å²è¾¼ã¿ç¦æ¢ç¶æ
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| 69 | ã§å¼ã³åºã
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| 70 | * ã®ãååã§ãããï¼ã«ã¼ãã«èµ·åæã«å¯¾å¿ããããï¼IRQã¢ã¼ãã§å¼ã³åºãã
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| 71 | * å ´åã«ã対å¿ãã¦ããï¼
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| 72 | */
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| 73 |
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| 74 | .text
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| 75 | .align 4
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| 76 | .globl dispatch
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| 77 | .globl exit_and_dispatch
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| 78 | dispatch:
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| 79 | stmfd sp!, {r4 - r11,lr} /* ã¬ã¸ã¹ã¿ã®ä¿å */
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| 80 | ldr r0, =runtsk /* runtskãèªã¿è¾¼ã */
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| 81 | ldr r1, [r0]
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| 82 | str sp, [r1,#TCB_sp] /* ã¿ã¹ã¯ã¹ã¿ãã¯ãä¿å */
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| 83 | adr r2, dispatch_r
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| 84 | str r2, [r1,#TCB_pc] /* å®è¡åéçªå°ãä¿å */
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| 85 | ldr r6, =interrupt_count /* r6 <-interrupt_count */
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| 86 | mov r5, #(CPSR_SVC|CPSR_IRQ_BIT) /* å²ãè¾¼ã¿ç¦æ¢(ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ã) */
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| 87 | mov r4, #(CPSR_SVC) /* å²ãè¾¼ã¿è¨±å¯(ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ã) */
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| 88 | b dispatcher_1
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| 89 |
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| 90 | dispatch_r:
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| 91 | ldmfd sp!,{r4 - r11,lr}
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| 92 | /*
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| 93 | * ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·å
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| 94 | * dispatch_r 㯠dispatcher_1 ããå¼ã³åºãããããï¼
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| 95 | * tcbã®ã¢ãã¬ã¹ã¯r1ã«å
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| 96 | ¥ã£ã¦ãã
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| 97 | */
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| 98 | ldrb r0,[r1,#TCB_enatex]
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| 99 | tst r0,#TCB_enatex_mask
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| 100 | beq dispatch_r_1 /* enatex ã FALSE ãªããªã¿ã¼ã³ */
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| 101 | ldr r0,[r1,#TCB_texptn] /* texptnããã¼ã */
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| 102 | tst r0,r0 /* texptn ã0ã§ç¡ããã° */
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| 103 | bne call_texrtn /* ã¿ã¹ã¯ä¾å¤ã«ã¼ãã³ã®å¼ã³åºã */
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| 104 | dispatch_r_1:
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| 105 | mov pc,lr
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| 106 |
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| 107 |
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| 108 |
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| 109 | exit_and_dispatch:
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| 110 | ldr r6, =interrupt_count /* interrupt_countã0ã¯ãªã¢ */
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| 111 | mov r3, #0
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| 112 | str r3, [r6]
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| 113 | /*
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| 114 | * FIQã¯å¸¸ã«ç¦æ¢ããï¼
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| 115 | */
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| 116 | mov r5, #(CPSR_SVC|CPSR_IRQ_BIT) /* å²ãè¾¼ã¿ç¦æ¢(ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ã) */
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| 117 | mov r4, #(CPSR_SVC) /* å²ãè¾¼ã¿è¨±å¯(ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ã) */
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| 118 | mrs r0, cpsr /* FIQãç¶æ¿ */
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| 119 | and r0, r0, #CPSR_FIQ_BIT
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| 120 | orr r0, r0, r5
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| 121 | msr cpsr, r0 /* ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ã */
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| 122 | dispatcher_1:
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| 123 | /*
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| 124 | * ããã§ã¯ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ãã»å²è¾¼ã¿ç¦æ¢ç¶æ
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| 125 | ã§ãªããã°ãªããªãï¼
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| 126 | */
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| 127 | ldr r0, =schedtsk /* schedtsk ãèªã¿è¾¼ã */
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| 128 | ldr r1, [r0]
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| 129 | ldr r2, =runtsk /* schedtsk ã runtskã« */
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| 130 | str r1, [r2] /* schedtsk ãããªãå ´åã¯runtskãNULLã« */
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| 131 | cmp r1, #0
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| 132 | beq dispatcher_2
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| 133 | dispatcher_3:
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| 134 | ldr sp, [r1,#TCB_sp] /* ã¿ã¹ã¯ã¹ã¿ãã¯ã復帰 */
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| 135 | ldr pc, [r1,#TCB_pc] /* å®è¡åéçªå°ã復帰 */
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| 136 | dispatcher_2:
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| 137 | mov r3,#1
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| 138 | str r3, [r6] /* interupt_count = 1 */
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| 139 | ldr sp, =STACKTOP
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| 140 | /* sleepã¢ã¼ããæã¤CPUãªãæ¸ãæãã */
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| 141 | mrs r0, cpsr /* FIQãç¶æ¿ */
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| 142 | and r0, r0, #CPSR_FIQ_BIT
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| 143 | orr r0, r0, r4
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| 144 | msr cpsr, r0 /* å²è¾¼ã¿å¾
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| 145 | ã¡ */
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| 146 | WAIT_INTERRUPT
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| 147 | mrs r0, cpsr /* FIQãç¶æ¿ */
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| 148 | and r0, r0, #CPSR_FIQ_BIT
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| 149 | orr r0, r0, r5
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| 150 | msr cpsr, r0 /* å²è¾¼ã¿ç¦æ¢ */
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| 151 | mov r3,#0
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| 152 | str r3, [r6] /* interrupt_count = 0 */
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| 153 | b dispatcher_1
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| 154 |
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| 155 |
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| 156 |
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| 157 | /*
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| 158 | * ã¿ã¹ã¯èµ·åæå¦ç
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| 159 | */
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| 160 | .text
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| 161 | .globl activate_r
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| 162 | activate_r:
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| 163 | mov r1,#(CPSR_SVC|CPSR_FIQ_BIT) /* å²ãè¾¼ã¿è¨±å¯(ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ã) */
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| 164 | mrs r2, cpsr /* FIQãç¶æ¿ */
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| 165 | and r2, r2, #CPSR_FIQ_BIT
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| 166 | orr r1, r1, r2
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| 167 | msr cpsr, r1 /* å²è¾¼ã¿è¨±å¯ */
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| 168 | ldr lr, =ext_tsk /* æ»ãçªå°è¨å® */
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| 169 | ldmfd sp!, {r0,pc} /* å¼æ°,PCè¨å® */
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| 170 |
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| 171 |
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| 172 |
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| 173 | /*
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| 174 | * å²è¾¼ã¿ãã³ãã©ï¼CPUä¾å¤ãã³ãã©åºå£å¦ç
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| 175 | *
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| 176 | * ret_int ã¯ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ãã»IRQå²è¾¼ã¿ç¦æ¢ç¶æ
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| 177 | ã§å¼ã³åºãï¼
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| 178 | */
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| 179 | .text
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| 180 | .globl ret_int
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| 181 | .globl ret_exc
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| 182 | ret_int:
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| 183 | ret_exc:
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| 184 | /*
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| 185 | * ã¹ã¼ãã¼ãã¤ã¶ã¼ã¢ã¼ãã§æ¥ããã¨
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| 186 | */
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| 187 | ldr r2, =runtsk /* runtsk ãèªã¿è¾¼ã */
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| 188 | ldr r1, [r2]
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| 189 | ldr r2, =enadsp
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| 190 | ldr r0, [r2]
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| 191 | cmp r0, #0
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| 192 | beq ret_int_1
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| 193 | ldr r2, =schedtsk
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| 194 | ldr r0, [r2]
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| 195 | cmp r0, r1 /* schedtsk 㨠runtsk ãæ¯è¼ */
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| 196 | beq ret_int_1
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| 197 | stmfd sp!, {r4-r11} /* æ®ãã®ã¬ã¸ã¹ã¿ãä¿å */
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| 198 | str sp, [r1,#TCB_sp] /* ã¿ã¹ã¯ã¹ã¿ãã¯ãä¿å */
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| 199 | adr r0, ret_int_r /* å®è¡åéçªå°ãä¿å */
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| 200 | str r0, [r1,#TCB_pc]
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| 201 | b dispatcher_1
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| 202 | ret_int_r:
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| 203 | ldmfd sp!, {r4-r11} /* ã¬ã¸ã¹ã¿ã®å¾©å¸° */
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| 204 | ret_int_1:
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| 205 | /*
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| 206 | * ã¿ã¹ã¯ä¾å¤å¦çã«ã¼ãã³ã®èµ·å
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| 207 | * dispatch_r 㯠dispatcher_1 ããå¼ã³åºãããããï¼
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| 208 | * tcbã®ã¢ãã¬ã¹ã¯r1ã«å
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| 209 | ¥ã£ã¦ãã
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| 210 | * ret_int_1 㯠ret_exe ããå¼ã³åºããã
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| 211 | */
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| 212 | ldrb r0, [r1,#TCB_enatex]
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| 213 | tst r0, #TCB_enatex_mask
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| 214 | beq ret_int_2 /* enatex ã FALSE ãªããªã¿ã¼ã³ */
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| 215 | ldr r0, [r1,#TCB_texptn] /* texptnããã¼ã */
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| 216 | tst r0, r0 /* texptn ã0ã§ç¡ããã° */
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| 217 | blne call_texrtn /* ã¿ã¹ã¯ä¾å¤ã«ã¼ãã³ã®å¼ã³åºã */
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| 218 | ret_int_2:
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| 219 | ldmfd sp!, {r0} /* spsr ã復帰 */
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| 220 | mrs r2, cpsr /* FIQãç¶æ¿ */
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| 221 | and r2, r2, #CPSR_FIQ_BIT
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| 222 | and r0, r0, #~CPSR_FIQ_BIT
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| 223 | orr r0, r0, r2
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| 224 | msr spsr, r0 /* æ»ãå
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| 225 | ã®cpsrãspsrã«è¨å® */
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| 226 | ldmfd sp!,{r0-r3,ip,lr,pc}^ /* ã¿ã¹ã¯ã«å¾©å¸° ^ä»ããªã®ã§ãcpsr <- spsr */
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| 227 |
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| 228 | /*
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| 229 | * å¾®å°æéå¾
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| 230 | ã¡
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| 231 | */
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| 232 | .globl sil_dly_nse
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| 233 | sil_dly_nse:
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| 234 | sub r0, r0, #SIL_DLY_TIM1
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| 235 | cmp r0, #0
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| 236 | bgt _sil_dly_nse1
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| 237 | movle pc, lr
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| 238 | _sil_dly_nse1:
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| 239 | sub r0, r0, #SIL_DLY_TIM2
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| 240 | cmp r0, #0
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| 241 | bgt _sil_dly_nse1
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| 242 | movle pc, lr
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