1 | /*
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2 | * A64 code generator for TCC
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3 | *
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4 | * Copyright (c) 2014-2015 Edmund Grimley Evans
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5 | *
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6 | * Copying and distribution of this file, with or without modification,
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7 | * are permitted in any medium without royalty provided the copyright
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8 | * notice and this notice are preserved. This file is offered as-is,
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9 | * without any warranty.
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10 | */
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11 |
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12 | #ifdef TARGET_DEFS_ONLY
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13 |
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14 | // Number of registers available to allocator:
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15 | #define NB_REGS 28 // x0-x18, x30, v0-v7
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16 |
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17 | #define TREG_R(x) (x) // x = 0..18
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18 | #define TREG_R30 19
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19 | #define TREG_F(x) (x + 20) // x = 0..7
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20 |
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21 | // Register classes sorted from more general to more precise:
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22 | #define RC_INT (1 << 0)
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23 | #define RC_FLOAT (1 << 1)
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24 | #define RC_R(x) (1 << (2 + (x))) // x = 0..18
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25 | #define RC_R30 (1 << 21)
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26 | #define RC_F(x) (1 << (22 + (x))) // x = 0..7
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27 |
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28 | #define RC_IRET (RC_R(0)) // int return register class
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29 | #define RC_FRET (RC_F(0)) // float return register class
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30 |
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31 | #define REG_IRET (TREG_R(0)) // int return register number
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32 | #define REG_FRET (TREG_F(0)) // float return register number
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33 |
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34 | #define PTR_SIZE 8
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35 |
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36 | #define LDOUBLE_SIZE 16
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37 | #define LDOUBLE_ALIGN 16
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38 |
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39 | #define MAX_ALIGN 16
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40 |
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41 | #define CHAR_IS_UNSIGNED
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42 |
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43 | /******************************************************/
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44 | #else /* ! TARGET_DEFS_ONLY */
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45 | /******************************************************/
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46 | #include "tcc.h"
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47 | #include <assert.h>
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48 |
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49 | ST_DATA const int reg_classes[NB_REGS] = {
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50 | RC_INT | RC_R(0),
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51 | RC_INT | RC_R(1),
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52 | RC_INT | RC_R(2),
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53 | RC_INT | RC_R(3),
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54 | RC_INT | RC_R(4),
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55 | RC_INT | RC_R(5),
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56 | RC_INT | RC_R(6),
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57 | RC_INT | RC_R(7),
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58 | RC_INT | RC_R(8),
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59 | RC_INT | RC_R(9),
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60 | RC_INT | RC_R(10),
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61 | RC_INT | RC_R(11),
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62 | RC_INT | RC_R(12),
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63 | RC_INT | RC_R(13),
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64 | RC_INT | RC_R(14),
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65 | RC_INT | RC_R(15),
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66 | RC_INT | RC_R(16),
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67 | RC_INT | RC_R(17),
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68 | RC_INT | RC_R(18),
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69 | RC_R30, // not in RC_INT as we make special use of x30
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70 | RC_FLOAT | RC_F(0),
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71 | RC_FLOAT | RC_F(1),
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72 | RC_FLOAT | RC_F(2),
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73 | RC_FLOAT | RC_F(3),
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74 | RC_FLOAT | RC_F(4),
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75 | RC_FLOAT | RC_F(5),
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76 | RC_FLOAT | RC_F(6),
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77 | RC_FLOAT | RC_F(7)
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78 | };
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79 |
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80 | #define IS_FREG(x) ((x) >= TREG_F(0))
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81 |
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82 | static uint32_t intr(int r)
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83 | {
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84 | assert(TREG_R(0) <= r && r <= TREG_R30);
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85 | return r < TREG_R30 ? r : 30;
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86 | }
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87 |
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88 | static uint32_t fltr(int r)
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89 | {
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90 | assert(TREG_F(0) <= r && r <= TREG_F(7));
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91 | return r - TREG_F(0);
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92 | }
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93 |
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94 | // Add an instruction to text section:
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95 | ST_FUNC void o(unsigned int c)
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96 | {
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97 | int ind1 = ind + 4;
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98 | if (nocode_wanted)
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99 | return;
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100 | if (ind1 > cur_text_section->data_allocated)
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101 | section_realloc(cur_text_section, ind1);
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102 | write32le(cur_text_section->data + ind, c);
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103 | ind = ind1;
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104 | }
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105 |
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106 | static int arm64_encode_bimm64(uint64_t x)
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107 | {
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108 | int neg = x & 1;
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109 | int rep, pos, len;
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110 |
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111 | if (neg)
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112 | x = ~x;
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113 | if (!x)
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114 | return -1;
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115 |
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116 | if (x >> 2 == (x & (((uint64_t)1 << (64 - 2)) - 1)))
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117 | rep = 2, x &= ((uint64_t)1 << 2) - 1;
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118 | else if (x >> 4 == (x & (((uint64_t)1 << (64 - 4)) - 1)))
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119 | rep = 4, x &= ((uint64_t)1 << 4) - 1;
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120 | else if (x >> 8 == (x & (((uint64_t)1 << (64 - 8)) - 1)))
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121 | rep = 8, x &= ((uint64_t)1 << 8) - 1;
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122 | else if (x >> 16 == (x & (((uint64_t)1 << (64 - 16)) - 1)))
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123 | rep = 16, x &= ((uint64_t)1 << 16) - 1;
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124 | else if (x >> 32 == (x & (((uint64_t)1 << (64 - 32)) - 1)))
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125 | rep = 32, x &= ((uint64_t)1 << 32) - 1;
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126 | else
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127 | rep = 64;
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128 |
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129 | pos = 0;
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130 | if (!(x & (((uint64_t)1 << 32) - 1))) x >>= 32, pos += 32;
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131 | if (!(x & (((uint64_t)1 << 16) - 1))) x >>= 16, pos += 16;
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132 | if (!(x & (((uint64_t)1 << 8) - 1))) x >>= 8, pos += 8;
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133 | if (!(x & (((uint64_t)1 << 4) - 1))) x >>= 4, pos += 4;
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134 | if (!(x & (((uint64_t)1 << 2) - 1))) x >>= 2, pos += 2;
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135 | if (!(x & (((uint64_t)1 << 1) - 1))) x >>= 1, pos += 1;
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136 |
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137 | len = 0;
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138 | if (!(~x & (((uint64_t)1 << 32) - 1))) x >>= 32, len += 32;
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139 | if (!(~x & (((uint64_t)1 << 16) - 1))) x >>= 16, len += 16;
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140 | if (!(~x & (((uint64_t)1 << 8) - 1))) x >>= 8, len += 8;
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141 | if (!(~x & (((uint64_t)1 << 4) - 1))) x >>= 4, len += 4;
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142 | if (!(~x & (((uint64_t)1 << 2) - 1))) x >>= 2, len += 2;
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143 | if (!(~x & (((uint64_t)1 << 1) - 1))) x >>= 1, len += 1;
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144 |
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145 | if (x)
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146 | return -1;
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147 | if (neg) {
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148 | pos = (pos + len) & (rep - 1);
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149 | len = rep - len;
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150 | }
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151 | return ((0x1000 & rep << 6) | (((rep - 1) ^ 31) << 1 & 63) |
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152 | ((rep - pos) & (rep - 1)) << 6 | (len - 1));
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153 | }
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154 |
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155 | static uint32_t arm64_movi(int r, uint64_t x)
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156 | {
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157 | uint64_t m = 0xffff;
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158 | int e;
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159 | if (!(x & ~m))
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160 | return 0x52800000 | r | x << 5; // movz w(r),#(x)
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161 | if (!(x & ~(m << 16)))
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162 | return 0x52a00000 | r | x >> 11; // movz w(r),#(x >> 16),lsl #16
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163 | if (!(x & ~(m << 32)))
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164 | return 0xd2c00000 | r | x >> 27; // movz x(r),#(x >> 32),lsl #32
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165 | if (!(x & ~(m << 48)))
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166 | return 0xd2e00000 | r | x >> 43; // movz x(r),#(x >> 48),lsl #48
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167 | if ((x & ~m) == m << 16)
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168 | return (0x12800000 | r |
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169 | (~x << 5 & 0x1fffe0)); // movn w(r),#(~x)
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170 | if ((x & ~(m << 16)) == m)
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171 | return (0x12a00000 | r |
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172 | (~x >> 11 & 0x1fffe0)); // movn w(r),#(~x >> 16),lsl #16
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173 | if (!~(x | m))
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174 | return (0x92800000 | r |
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175 | (~x << 5 & 0x1fffe0)); // movn x(r),#(~x)
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176 | if (!~(x | m << 16))
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177 | return (0x92a00000 | r |
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178 | (~x >> 11 & 0x1fffe0)); // movn x(r),#(~x >> 16),lsl #16
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179 | if (!~(x | m << 32))
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180 | return (0x92c00000 | r |
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181 | (~x >> 27 & 0x1fffe0)); // movn x(r),#(~x >> 32),lsl #32
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182 | if (!~(x | m << 48))
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183 | return (0x92e00000 | r |
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184 | (~x >> 43 & 0x1fffe0)); // movn x(r),#(~x >> 32),lsl #32
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185 | if (!(x >> 32) && (e = arm64_encode_bimm64(x | x << 32)) >= 0)
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186 | return 0x320003e0 | r | (uint32_t)e << 10; // movi w(r),#(x)
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187 | if ((e = arm64_encode_bimm64(x)) >= 0)
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188 | return 0xb20003e0 | r | (uint32_t)e << 10; // movi x(r),#(x)
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189 | return 0;
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190 | }
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191 |
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192 | static void arm64_movimm(int r, uint64_t x)
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193 | {
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194 | uint32_t i;
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195 | if ((i = arm64_movi(r, x)))
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196 | o(i); // a single MOV
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197 | else {
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198 | // MOVZ/MOVN and 1-3 MOVKs
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199 | int z = 0, m = 0;
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200 | uint32_t mov1 = 0xd2800000; // movz
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201 | uint64_t x1 = x;
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202 | for (i = 0; i < 64; i += 16) {
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203 | z += !(x >> i & 0xffff);
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204 | m += !(~x >> i & 0xffff);
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205 | }
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206 | if (m > z) {
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207 | x1 = ~x;
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208 | mov1 = 0x92800000; // movn
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209 | }
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210 | for (i = 0; i < 64; i += 16)
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211 | if (x1 >> i & 0xffff) {
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212 | o(mov1 | r | (x1 >> i & 0xffff) << 5 | i << 17);
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213 | // movz/movn x(r),#(*),lsl #(i)
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214 | break;
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215 | }
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216 | for (i += 16; i < 64; i += 16)
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217 | if (x1 >> i & 0xffff)
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218 | o(0xf2800000 | r | (x >> i & 0xffff) << 5 | i << 17);
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219 | // movk x(r),#(*),lsl #(i)
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220 | }
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221 | }
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222 |
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223 | // Patch all branches in list pointed to by t to branch to a:
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224 | ST_FUNC void gsym_addr(int t_, int a_)
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225 | {
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226 | uint32_t t = t_;
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227 | uint32_t a = a_;
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228 | while (t) {
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229 | unsigned char *ptr = cur_text_section->data + t;
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230 | uint32_t next = read32le(ptr);
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231 | if (a - t + 0x8000000 >= 0x10000000)
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232 | tcc_error("branch out of range");
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233 | write32le(ptr, (a - t == 4 ? 0xd503201f : // nop
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234 | 0x14000000 | ((a - t) >> 2 & 0x3ffffff))); // b
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235 | t = next;
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236 | }
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237 | }
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238 |
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239 | // Patch all branches in list pointed to by t to branch to current location:
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240 | ST_FUNC void gsym(int t)
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241 | {
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242 | gsym_addr(t, ind);
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243 | }
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244 |
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245 | static int arm64_type_size(int t)
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246 | {
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247 | switch (t & VT_BTYPE) {
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248 | case VT_INT: return 2;
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249 | case VT_BYTE: return 0;
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250 | case VT_SHORT: return 1;
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251 | case VT_PTR: return 3;
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252 | case VT_FUNC: return 3;
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253 | case VT_FLOAT: return 2;
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254 | case VT_DOUBLE: return 3;
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255 | case VT_LDOUBLE: return 4;
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256 | case VT_BOOL: return 0;
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257 | case VT_LLONG: return 3;
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258 | }
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259 | assert(0);
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260 | return 0;
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261 | }
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262 |
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263 | static void arm64_spoff(int reg, uint64_t off)
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264 | {
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265 | uint32_t sub = off >> 63;
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266 | if (sub)
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267 | off = -off;
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268 | if (off < 4096)
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269 | o(0x910003e0 | sub << 30 | reg | off << 10);
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270 | // (add|sub) x(reg),sp,#(off)
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271 | else {
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272 | arm64_movimm(30, off); // use x30 for offset
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273 | o(0x8b3e63e0 | sub << 30 | reg); // (add|sub) x(reg),sp,x30
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274 | }
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275 | }
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276 |
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277 | static void arm64_ldrx(int sg, int sz_, int dst, int bas, uint64_t off)
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278 | {
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279 | uint32_t sz = sz_;
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280 | if (sz >= 2)
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281 | sg = 0;
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282 | if (!(off & ~((uint32_t)0xfff << sz)))
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283 | o(0x39400000 | dst | bas << 5 | off << (10 - sz) |
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284 | (uint32_t)!!sg << 23 | sz << 30); // ldr(*) x(dst),[x(bas),#(off)]
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285 | else if (off < 256 || -off <= 256)
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286 | o(0x38400000 | dst | bas << 5 | (off & 511) << 12 |
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287 | (uint32_t)!!sg << 23 | sz << 30); // ldur(*) x(dst),[x(bas),#(off)]
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288 | else {
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289 | arm64_movimm(30, off); // use x30 for offset
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290 | o(0x38206800 | dst | bas << 5 | (uint32_t)30 << 16 |
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291 | (uint32_t)(!!sg + 1) << 22 | sz << 30); // ldr(*) x(dst),[x(bas),x30]
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292 | }
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293 | }
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294 |
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295 | static void arm64_ldrv(int sz_, int dst, int bas, uint64_t off)
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296 | {
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297 | uint32_t sz = sz_;
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298 | if (!(off & ~((uint32_t)0xfff << sz)))
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299 | o(0x3d400000 | dst | bas << 5 | off << (10 - sz) |
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300 | (sz & 4) << 21 | (sz & 3) << 30); // ldr (s|d|q)(dst),[x(bas),#(off)]
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301 | else if (off < 256 || -off <= 256)
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302 | o(0x3c400000 | dst | bas << 5 | (off & 511) << 12 |
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303 | (sz & 4) << 21 | (sz & 3) << 30); // ldur (s|d|q)(dst),[x(bas),#(off)]
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304 | else {
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305 | arm64_movimm(30, off); // use x30 for offset
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306 | o(0x3c606800 | dst | bas << 5 | (uint32_t)30 << 16 |
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307 | sz << 30 | (sz & 4) << 21); // ldr (s|d|q)(dst),[x(bas),x30]
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308 | }
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309 | }
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310 |
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311 | static void arm64_ldrs(int reg_, int size)
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312 | {
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313 | uint32_t reg = reg_;
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314 | // Use x30 for intermediate value in some cases.
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315 | switch (size) {
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316 | default: assert(0); break;
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317 | case 1:
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318 | arm64_ldrx(0, 0, reg, reg, 0);
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319 | break;
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320 | case 2:
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321 | arm64_ldrx(0, 1, reg, reg, 0);
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322 | break;
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323 | case 3:
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324 | arm64_ldrx(0, 1, 30, reg, 0);
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325 | arm64_ldrx(0, 0, reg, reg, 2);
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326 | o(0x2a0043c0 | reg | reg << 16); // orr x(reg),x30,x(reg),lsl #16
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327 | break;
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328 | case 4:
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329 | arm64_ldrx(0, 2, reg, reg, 0);
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330 | break;
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331 | case 5:
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332 | arm64_ldrx(0, 2, 30, reg, 0);
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333 | arm64_ldrx(0, 0, reg, reg, 4);
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334 | o(0xaa0083c0 | reg | reg << 16); // orr x(reg),x30,x(reg),lsl #32
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335 | break;
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336 | case 6:
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337 | arm64_ldrx(0, 2, 30, reg, 0);
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338 | arm64_ldrx(0, 1, reg, reg, 4);
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339 | o(0xaa0083c0 | reg | reg << 16); // orr x(reg),x30,x(reg),lsl #32
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340 | break;
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341 | case 7:
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342 | arm64_ldrx(0, 2, 30, reg, 0);
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343 | arm64_ldrx(0, 2, reg, reg, 3);
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344 | o(0x53087c00 | reg | reg << 5); // lsr w(reg), w(reg), #8
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345 | o(0xaa0083c0 | reg | reg << 16); // orr x(reg),x30,x(reg),lsl #32
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346 | break;
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347 | case 8:
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348 | arm64_ldrx(0, 3, reg, reg, 0);
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349 | break;
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350 | case 9:
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351 | arm64_ldrx(0, 0, reg + 1, reg, 8);
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352 | arm64_ldrx(0, 3, reg, reg, 0);
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353 | break;
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354 | case 10:
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355 | arm64_ldrx(0, 1, reg + 1, reg, 8);
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356 | arm64_ldrx(0, 3, reg, reg, 0);
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357 | break;
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358 | case 11:
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359 | arm64_ldrx(0, 2, reg + 1, reg, 7);
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360 | o(0x53087c00 | (reg+1) | (reg+1) << 5); // lsr w(reg+1), w(reg+1), #8
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361 | arm64_ldrx(0, 3, reg, reg, 0);
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362 | break;
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363 | case 12:
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364 | arm64_ldrx(0, 2, reg + 1, reg, 8);
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365 | arm64_ldrx(0, 3, reg, reg, 0);
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366 | break;
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367 | case 13:
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368 | arm64_ldrx(0, 3, reg + 1, reg, 5);
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369 | o(0xd358fc00 | (reg+1) | (reg+1) << 5); // lsr x(reg+1), x(reg+1), #24
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370 | arm64_ldrx(0, 3, reg, reg, 0);
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371 | break;
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372 | case 14:
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373 | arm64_ldrx(0, 3, reg + 1, reg, 6);
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374 | o(0xd350fc00 | (reg+1) | (reg+1) << 5); // lsr x(reg+1), x(reg+1), #16
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375 | arm64_ldrx(0, 3, reg, reg, 0);
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376 | break;
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377 | case 15:
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378 | arm64_ldrx(0, 3, reg + 1, reg, 7);
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379 | o(0xd348fc00 | (reg+1) | (reg+1) << 5); // lsr x(reg+1), x(reg+1), #8
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380 | arm64_ldrx(0, 3, reg, reg, 0);
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381 | break;
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382 | case 16:
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383 | o(0xa9400000 | reg | (reg+1) << 10 | reg << 5);
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384 | // ldp x(reg),x(reg+1),[x(reg)]
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385 | break;
|
---|
386 | }
|
---|
387 | }
|
---|
388 |
|
---|
389 | static void arm64_strx(int sz_, int dst, int bas, uint64_t off)
|
---|
390 | {
|
---|
391 | uint32_t sz = sz_;
|
---|
392 | if (!(off & ~((uint32_t)0xfff << sz)))
|
---|
393 | o(0x39000000 | dst | bas << 5 | off << (10 - sz) | sz << 30);
|
---|
394 | // str(*) x(dst),[x(bas],#(off)]
|
---|
395 | else if (off < 256 || -off <= 256)
|
---|
396 | o(0x38000000 | dst | bas << 5 | (off & 511) << 12 | sz << 30);
|
---|
397 | // stur(*) x(dst),[x(bas],#(off)]
|
---|
398 | else {
|
---|
399 | arm64_movimm(30, off); // use x30 for offset
|
---|
400 | o(0x38206800 | dst | bas << 5 | (uint32_t)30 << 16 | sz << 30);
|
---|
401 | // str(*) x(dst),[x(bas),x30]
|
---|
402 | }
|
---|
403 | }
|
---|
404 |
|
---|
405 | static void arm64_strv(int sz_, int dst, int bas, uint64_t off)
|
---|
406 | {
|
---|
407 | uint32_t sz = sz_;
|
---|
408 | if (!(off & ~((uint32_t)0xfff << sz)))
|
---|
409 | o(0x3d000000 | dst | bas << 5 | off << (10 - sz) |
|
---|
410 | (sz & 4) << 21 | (sz & 3) << 30); // str (s|d|q)(dst),[x(bas),#(off)]
|
---|
411 | else if (off < 256 || -off <= 256)
|
---|
412 | o(0x3c000000 | dst | bas << 5 | (off & 511) << 12 |
|
---|
413 | (sz & 4) << 21 | (sz & 3) << 30); // stur (s|d|q)(dst),[x(bas),#(off)]
|
---|
414 | else {
|
---|
415 | arm64_movimm(30, off); // use x30 for offset
|
---|
416 | o(0x3c206800 | dst | bas << 5 | (uint32_t)30 << 16 |
|
---|
417 | sz << 30 | (sz & 4) << 21); // str (s|d|q)(dst),[x(bas),x30]
|
---|
418 | }
|
---|
419 | }
|
---|
420 |
|
---|
421 | static void arm64_sym(int r, Sym *sym, unsigned long addend)
|
---|
422 | {
|
---|
423 | // Currently TCC's linker does not generate COPY relocations for
|
---|
424 | // STT_OBJECTs when tcc is invoked with "-run". This typically
|
---|
425 | // results in "R_AARCH64_ADR_PREL_PG_HI21 relocation failed" when
|
---|
426 | // a program refers to stdin. A workaround is to avoid that
|
---|
427 | // relocation and use only relocations with unlimited range.
|
---|
428 | int avoid_adrp = 1;
|
---|
429 |
|
---|
430 | if (avoid_adrp || sym->a.weak) {
|
---|
431 | // (GCC uses a R_AARCH64_ABS64 in this case.)
|
---|
432 | greloca(cur_text_section, sym, ind, R_AARCH64_MOVW_UABS_G0_NC, addend);
|
---|
433 | o(0xd2800000 | r); // mov x(rt),#0,lsl #0
|
---|
434 | greloca(cur_text_section, sym, ind, R_AARCH64_MOVW_UABS_G1_NC, addend);
|
---|
435 | o(0xf2a00000 | r); // movk x(rt),#0,lsl #16
|
---|
436 | greloca(cur_text_section, sym, ind, R_AARCH64_MOVW_UABS_G2_NC, addend);
|
---|
437 | o(0xf2c00000 | r); // movk x(rt),#0,lsl #32
|
---|
438 | greloca(cur_text_section, sym, ind, R_AARCH64_MOVW_UABS_G3, addend);
|
---|
439 | o(0xf2e00000 | r); // movk x(rt),#0,lsl #48
|
---|
440 | }
|
---|
441 | else {
|
---|
442 | greloca(cur_text_section, sym, ind, R_AARCH64_ADR_PREL_PG_HI21, addend);
|
---|
443 | o(0x90000000 | r);
|
---|
444 | greloca(cur_text_section, sym, ind, R_AARCH64_ADD_ABS_LO12_NC, addend);
|
---|
445 | o(0x91000000 | r | r << 5);
|
---|
446 | }
|
---|
447 | }
|
---|
448 |
|
---|
449 | ST_FUNC void load(int r, SValue *sv)
|
---|
450 | {
|
---|
451 | int svtt = sv->type.t;
|
---|
452 | int svr = sv->r & ~VT_LVAL_TYPE;
|
---|
453 | int svrv = svr & VT_VALMASK;
|
---|
454 | uint64_t svcul = (uint32_t)sv->c.i;
|
---|
455 | svcul = svcul >> 31 & 1 ? svcul - ((uint64_t)1 << 32) : svcul;
|
---|
456 |
|
---|
457 | if (svr == (VT_LOCAL | VT_LVAL)) {
|
---|
458 | if (IS_FREG(r))
|
---|
459 | arm64_ldrv(arm64_type_size(svtt), fltr(r), 29, svcul);
|
---|
460 | else
|
---|
461 | arm64_ldrx(!(svtt & VT_UNSIGNED), arm64_type_size(svtt),
|
---|
462 | intr(r), 29, svcul);
|
---|
463 | return;
|
---|
464 | }
|
---|
465 |
|
---|
466 | if ((svr & ~VT_VALMASK) == VT_LVAL && svrv < VT_CONST) {
|
---|
467 | if (IS_FREG(r))
|
---|
468 | arm64_ldrv(arm64_type_size(svtt), fltr(r), intr(svrv), 0);
|
---|
469 | else
|
---|
470 | arm64_ldrx(!(svtt & VT_UNSIGNED), arm64_type_size(svtt),
|
---|
471 | intr(r), intr(svrv), 0);
|
---|
472 | return;
|
---|
473 | }
|
---|
474 |
|
---|
475 | if (svr == (VT_CONST | VT_LVAL | VT_SYM)) {
|
---|
476 | arm64_sym(30, sv->sym, svcul); // use x30 for address
|
---|
477 | if (IS_FREG(r))
|
---|
478 | arm64_ldrv(arm64_type_size(svtt), fltr(r), 30, 0);
|
---|
479 | else
|
---|
480 | arm64_ldrx(!(svtt & VT_UNSIGNED), arm64_type_size(svtt),
|
---|
481 | intr(r), 30, 0);
|
---|
482 | return;
|
---|
483 | }
|
---|
484 |
|
---|
485 | if (svr == (VT_CONST | VT_SYM)) {
|
---|
486 | arm64_sym(intr(r), sv->sym, svcul);
|
---|
487 | return;
|
---|
488 | }
|
---|
489 |
|
---|
490 | if (svr == VT_CONST) {
|
---|
491 | if ((svtt & VT_BTYPE) != VT_VOID)
|
---|
492 | arm64_movimm(intr(r), arm64_type_size(svtt) == 3 ?
|
---|
493 | sv->c.i : (uint32_t)svcul);
|
---|
494 | return;
|
---|
495 | }
|
---|
496 |
|
---|
497 | if (svr < VT_CONST) {
|
---|
498 | if (IS_FREG(r) && IS_FREG(svr))
|
---|
499 | if (svtt == VT_LDOUBLE)
|
---|
500 | o(0x4ea01c00 | fltr(r) | fltr(svr) << 5);
|
---|
501 | // mov v(r).16b,v(svr).16b
|
---|
502 | else
|
---|
503 | o(0x1e604000 | fltr(r) | fltr(svr) << 5); // fmov d(r),d(svr)
|
---|
504 | else if (!IS_FREG(r) && !IS_FREG(svr))
|
---|
505 | o(0xaa0003e0 | intr(r) | intr(svr) << 16); // mov x(r),x(svr)
|
---|
506 | else
|
---|
507 | assert(0);
|
---|
508 | return;
|
---|
509 | }
|
---|
510 |
|
---|
511 | if (svr == VT_LOCAL) {
|
---|
512 | if (-svcul < 0x1000)
|
---|
513 | o(0xd10003a0 | intr(r) | -svcul << 10); // sub x(r),x29,#...
|
---|
514 | else {
|
---|
515 | arm64_movimm(30, -svcul); // use x30 for offset
|
---|
516 | o(0xcb0003a0 | intr(r) | (uint32_t)30 << 16); // sub x(r),x29,x30
|
---|
517 | }
|
---|
518 | return;
|
---|
519 | }
|
---|
520 |
|
---|
521 | if (svr == VT_JMP || svr == VT_JMPI) {
|
---|
522 | int t = (svr == VT_JMPI);
|
---|
523 | arm64_movimm(intr(r), t);
|
---|
524 | o(0x14000002); // b .+8
|
---|
525 | gsym(svcul);
|
---|
526 | arm64_movimm(intr(r), t ^ 1);
|
---|
527 | return;
|
---|
528 | }
|
---|
529 |
|
---|
530 | if (svr == (VT_LLOCAL | VT_LVAL)) {
|
---|
531 | arm64_ldrx(0, 3, 30, 29, svcul); // use x30 for offset
|
---|
532 | if (IS_FREG(r))
|
---|
533 | arm64_ldrv(arm64_type_size(svtt), fltr(r), 30, 0);
|
---|
534 | else
|
---|
535 | arm64_ldrx(!(svtt & VT_UNSIGNED), arm64_type_size(svtt),
|
---|
536 | intr(r), 30, 0);
|
---|
537 | return;
|
---|
538 | }
|
---|
539 |
|
---|
540 | printf("load(%x, (%x, %x, %llx))\n", r, svtt, sv->r, (long long)svcul);
|
---|
541 | assert(0);
|
---|
542 | }
|
---|
543 |
|
---|
544 | ST_FUNC void store(int r, SValue *sv)
|
---|
545 | {
|
---|
546 | int svtt = sv->type.t;
|
---|
547 | int svr = sv->r & ~VT_LVAL_TYPE;
|
---|
548 | int svrv = svr & VT_VALMASK;
|
---|
549 | uint64_t svcul = (uint32_t)sv->c.i;
|
---|
550 | svcul = svcul >> 31 & 1 ? svcul - ((uint64_t)1 << 32) : svcul;
|
---|
551 |
|
---|
552 | if (svr == (VT_LOCAL | VT_LVAL)) {
|
---|
553 | if (IS_FREG(r))
|
---|
554 | arm64_strv(arm64_type_size(svtt), fltr(r), 29, svcul);
|
---|
555 | else
|
---|
556 | arm64_strx(arm64_type_size(svtt), intr(r), 29, svcul);
|
---|
557 | return;
|
---|
558 | }
|
---|
559 |
|
---|
560 | if ((svr & ~VT_VALMASK) == VT_LVAL && svrv < VT_CONST) {
|
---|
561 | if (IS_FREG(r))
|
---|
562 | arm64_strv(arm64_type_size(svtt), fltr(r), intr(svrv), 0);
|
---|
563 | else
|
---|
564 | arm64_strx(arm64_type_size(svtt), intr(r), intr(svrv), 0);
|
---|
565 | return;
|
---|
566 | }
|
---|
567 |
|
---|
568 | if (svr == (VT_CONST | VT_LVAL | VT_SYM)) {
|
---|
569 | arm64_sym(30, sv->sym, svcul); // use x30 for address
|
---|
570 | if (IS_FREG(r))
|
---|
571 | arm64_strv(arm64_type_size(svtt), fltr(r), 30, 0);
|
---|
572 | else
|
---|
573 | arm64_strx(arm64_type_size(svtt), intr(r), 30, 0);
|
---|
574 | return;
|
---|
575 | }
|
---|
576 |
|
---|
577 | printf("store(%x, (%x, %x, %llx))\n", r, svtt, sv->r, (long long)svcul);
|
---|
578 | assert(0);
|
---|
579 | }
|
---|
580 |
|
---|
581 | static void arm64_gen_bl_or_b(int b)
|
---|
582 | {
|
---|
583 | if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
|
---|
584 | assert(!b && (vtop->r & VT_SYM));
|
---|
585 | greloca(cur_text_section, vtop->sym, ind, R_AARCH64_CALL26, 0);
|
---|
586 | o(0x94000000); // bl .
|
---|
587 | }
|
---|
588 | else
|
---|
589 | o(0xd61f0000 | (uint32_t)!b << 21 | intr(gv(RC_R30)) << 5); // br/blr
|
---|
590 | }
|
---|
591 |
|
---|
592 | static int arm64_hfa_aux(CType *type, int *fsize, int num)
|
---|
593 | {
|
---|
594 | if (is_float(type->t)) {
|
---|
595 | int a, n = type_size(type, &a);
|
---|
596 | if (num >= 4 || (*fsize && *fsize != n))
|
---|
597 | return -1;
|
---|
598 | *fsize = n;
|
---|
599 | return num + 1;
|
---|
600 | }
|
---|
601 | else if ((type->t & VT_BTYPE) == VT_STRUCT) {
|
---|
602 | int is_struct = 0; // rather than union
|
---|
603 | Sym *field;
|
---|
604 | for (field = type->ref->next; field; field = field->next)
|
---|
605 | if (field->c) {
|
---|
606 | is_struct = 1;
|
---|
607 | break;
|
---|
608 | }
|
---|
609 | if (is_struct) {
|
---|
610 | int num0 = num;
|
---|
611 | for (field = type->ref->next; field; field = field->next) {
|
---|
612 | if (field->c != (num - num0) * *fsize)
|
---|
613 | return -1;
|
---|
614 | num = arm64_hfa_aux(&field->type, fsize, num);
|
---|
615 | if (num == -1)
|
---|
616 | return -1;
|
---|
617 | }
|
---|
618 | if (type->ref->c != (num - num0) * *fsize)
|
---|
619 | return -1;
|
---|
620 | return num;
|
---|
621 | }
|
---|
622 | else { // union
|
---|
623 | int num0 = num;
|
---|
624 | for (field = type->ref->next; field; field = field->next) {
|
---|
625 | int num1 = arm64_hfa_aux(&field->type, fsize, num0);
|
---|
626 | if (num1 == -1)
|
---|
627 | return -1;
|
---|
628 | num = num1 < num ? num : num1;
|
---|
629 | }
|
---|
630 | if (type->ref->c != (num - num0) * *fsize)
|
---|
631 | return -1;
|
---|
632 | return num;
|
---|
633 | }
|
---|
634 | }
|
---|
635 | else if (type->t & VT_ARRAY) {
|
---|
636 | int num1;
|
---|
637 | if (!type->ref->c)
|
---|
638 | return num;
|
---|
639 | num1 = arm64_hfa_aux(&type->ref->type, fsize, num);
|
---|
640 | if (num1 == -1 || (num1 != num && type->ref->c > 4))
|
---|
641 | return -1;
|
---|
642 | num1 = num + type->ref->c * (num1 - num);
|
---|
643 | if (num1 > 4)
|
---|
644 | return -1;
|
---|
645 | return num1;
|
---|
646 | }
|
---|
647 | return -1;
|
---|
648 | }
|
---|
649 |
|
---|
650 | static int arm64_hfa(CType *type, int *fsize)
|
---|
651 | {
|
---|
652 | if ((type->t & VT_BTYPE) == VT_STRUCT || (type->t & VT_ARRAY)) {
|
---|
653 | int sz = 0;
|
---|
654 | int n = arm64_hfa_aux(type, &sz, 0);
|
---|
655 | if (0 < n && n <= 4) {
|
---|
656 | if (fsize)
|
---|
657 | *fsize = sz;
|
---|
658 | return n;
|
---|
659 | }
|
---|
660 | }
|
---|
661 | return 0;
|
---|
662 | }
|
---|
663 |
|
---|
664 | static unsigned long arm64_pcs_aux(int n, CType **type, unsigned long *a)
|
---|
665 | {
|
---|
666 | int nx = 0; // next integer register
|
---|
667 | int nv = 0; // next vector register
|
---|
668 | unsigned long ns = 32; // next stack offset
|
---|
669 | int i;
|
---|
670 |
|
---|
671 | for (i = 0; i < n; i++) {
|
---|
672 | int hfa = arm64_hfa(type[i], 0);
|
---|
673 | int size, align;
|
---|
674 |
|
---|
675 | if ((type[i]->t & VT_ARRAY) ||
|
---|
676 | (type[i]->t & VT_BTYPE) == VT_FUNC)
|
---|
677 | size = align = 8;
|
---|
678 | else
|
---|
679 | size = type_size(type[i], &align);
|
---|
680 |
|
---|
681 | if (hfa)
|
---|
682 | // B.2
|
---|
683 | ;
|
---|
684 | else if (size > 16) {
|
---|
685 | // B.3: replace with pointer
|
---|
686 | if (nx < 8)
|
---|
687 | a[i] = nx++ << 1 | 1;
|
---|
688 | else {
|
---|
689 | ns = (ns + 7) & ~7;
|
---|
690 | a[i] = ns | 1;
|
---|
691 | ns += 8;
|
---|
692 | }
|
---|
693 | continue;
|
---|
694 | }
|
---|
695 | else if ((type[i]->t & VT_BTYPE) == VT_STRUCT)
|
---|
696 | // B.4
|
---|
697 | size = (size + 7) & ~7;
|
---|
698 |
|
---|
699 | // C.1
|
---|
700 | if (is_float(type[i]->t) && nv < 8) {
|
---|
701 | a[i] = 16 + (nv++ << 1);
|
---|
702 | continue;
|
---|
703 | }
|
---|
704 |
|
---|
705 | // C.2
|
---|
706 | if (hfa && nv + hfa <= 8) {
|
---|
707 | a[i] = 16 + (nv << 1);
|
---|
708 | nv += hfa;
|
---|
709 | continue;
|
---|
710 | }
|
---|
711 |
|
---|
712 | // C.3
|
---|
713 | if (hfa) {
|
---|
714 | nv = 8;
|
---|
715 | size = (size + 7) & ~7;
|
---|
716 | }
|
---|
717 |
|
---|
718 | // C.4
|
---|
719 | if (hfa || (type[i]->t & VT_BTYPE) == VT_LDOUBLE) {
|
---|
720 | ns = (ns + 7) & ~7;
|
---|
721 | ns = (ns + align - 1) & -align;
|
---|
722 | }
|
---|
723 |
|
---|
724 | // C.5
|
---|
725 | if ((type[i]->t & VT_BTYPE) == VT_FLOAT)
|
---|
726 | size = 8;
|
---|
727 |
|
---|
728 | // C.6
|
---|
729 | if (hfa || is_float(type[i]->t)) {
|
---|
730 | a[i] = ns;
|
---|
731 | ns += size;
|
---|
732 | continue;
|
---|
733 | }
|
---|
734 |
|
---|
735 | // C.7
|
---|
736 | if ((type[i]->t & VT_BTYPE) != VT_STRUCT && size <= 8 && nx < 8) {
|
---|
737 | a[i] = nx++ << 1;
|
---|
738 | continue;
|
---|
739 | }
|
---|
740 |
|
---|
741 | // C.8
|
---|
742 | if (align == 16)
|
---|
743 | nx = (nx + 1) & ~1;
|
---|
744 |
|
---|
745 | // C.9
|
---|
746 | if ((type[i]->t & VT_BTYPE) != VT_STRUCT && size == 16 && nx < 7) {
|
---|
747 | a[i] = nx << 1;
|
---|
748 | nx += 2;
|
---|
749 | continue;
|
---|
750 | }
|
---|
751 |
|
---|
752 | // C.10
|
---|
753 | if ((type[i]->t & VT_BTYPE) == VT_STRUCT && size <= (8 - nx) * 8) {
|
---|
754 | a[i] = nx << 1;
|
---|
755 | nx += (size + 7) >> 3;
|
---|
756 | continue;
|
---|
757 | }
|
---|
758 |
|
---|
759 | // C.11
|
---|
760 | nx = 8;
|
---|
761 |
|
---|
762 | // C.12
|
---|
763 | ns = (ns + 7) & ~7;
|
---|
764 | ns = (ns + align - 1) & -align;
|
---|
765 |
|
---|
766 | // C.13
|
---|
767 | if ((type[i]->t & VT_BTYPE) == VT_STRUCT) {
|
---|
768 | a[i] = ns;
|
---|
769 | ns += size;
|
---|
770 | continue;
|
---|
771 | }
|
---|
772 |
|
---|
773 | // C.14
|
---|
774 | if (size < 8)
|
---|
775 | size = 8;
|
---|
776 |
|
---|
777 | // C.15
|
---|
778 | a[i] = ns;
|
---|
779 | ns += size;
|
---|
780 | }
|
---|
781 |
|
---|
782 | return ns - 32;
|
---|
783 | }
|
---|
784 |
|
---|
785 | static unsigned long arm64_pcs(int n, CType **type, unsigned long *a)
|
---|
786 | {
|
---|
787 | unsigned long stack;
|
---|
788 |
|
---|
789 | // Return type:
|
---|
790 | if ((type[0]->t & VT_BTYPE) == VT_VOID)
|
---|
791 | a[0] = -1;
|
---|
792 | else {
|
---|
793 | arm64_pcs_aux(1, type, a);
|
---|
794 | assert(a[0] == 0 || a[0] == 1 || a[0] == 16);
|
---|
795 | }
|
---|
796 |
|
---|
797 | // Argument types:
|
---|
798 | stack = arm64_pcs_aux(n, type + 1, a + 1);
|
---|
799 |
|
---|
800 | if (0) {
|
---|
801 | int i;
|
---|
802 | for (i = 0; i <= n; i++) {
|
---|
803 | if (!i)
|
---|
804 | printf("arm64_pcs return: ");
|
---|
805 | else
|
---|
806 | printf("arm64_pcs arg %d: ", i);
|
---|
807 | if (a[i] == (unsigned long)-1)
|
---|
808 | printf("void\n");
|
---|
809 | else if (a[i] == 1 && !i)
|
---|
810 | printf("X8 pointer\n");
|
---|
811 | else if (a[i] < 16)
|
---|
812 | printf("X%lu%s\n", a[i] / 2, a[i] & 1 ? " pointer" : "");
|
---|
813 | else if (a[i] < 32)
|
---|
814 | printf("V%lu\n", a[i] / 2 - 8);
|
---|
815 | else
|
---|
816 | printf("stack %lu%s\n",
|
---|
817 | (a[i] - 32) & ~1, a[i] & 1 ? " pointer" : "");
|
---|
818 | }
|
---|
819 | }
|
---|
820 |
|
---|
821 | return stack;
|
---|
822 | }
|
---|
823 |
|
---|
824 | ST_FUNC void gfunc_call(int nb_args)
|
---|
825 | {
|
---|
826 | CType *return_type;
|
---|
827 | CType **t;
|
---|
828 | unsigned long *a, *a1;
|
---|
829 | unsigned long stack;
|
---|
830 | int i;
|
---|
831 |
|
---|
832 | return_type = &vtop[-nb_args].type.ref->type;
|
---|
833 | if ((return_type->t & VT_BTYPE) == VT_STRUCT)
|
---|
834 | --nb_args;
|
---|
835 |
|
---|
836 | t = tcc_malloc((nb_args + 1) * sizeof(*t));
|
---|
837 | a = tcc_malloc((nb_args + 1) * sizeof(*a));
|
---|
838 | a1 = tcc_malloc((nb_args + 1) * sizeof(*a1));
|
---|
839 |
|
---|
840 | t[0] = return_type;
|
---|
841 | for (i = 0; i < nb_args; i++)
|
---|
842 | t[nb_args - i] = &vtop[-i].type;
|
---|
843 |
|
---|
844 | stack = arm64_pcs(nb_args, t, a);
|
---|
845 |
|
---|
846 | // Allocate space for structs replaced by pointer:
|
---|
847 | for (i = nb_args; i; i--)
|
---|
848 | if (a[i] & 1) {
|
---|
849 | SValue *arg = &vtop[i - nb_args];
|
---|
850 | int align, size = type_size(&arg->type, &align);
|
---|
851 | assert((arg->type.t & VT_BTYPE) == VT_STRUCT);
|
---|
852 | stack = (stack + align - 1) & -align;
|
---|
853 | a1[i] = stack;
|
---|
854 | stack += size;
|
---|
855 | }
|
---|
856 |
|
---|
857 | stack = (stack + 15) >> 4 << 4;
|
---|
858 |
|
---|
859 | assert(stack < 0x1000);
|
---|
860 | if (stack)
|
---|
861 | o(0xd10003ff | stack << 10); // sub sp,sp,#(n)
|
---|
862 |
|
---|
863 | // First pass: set all values on stack
|
---|
864 | for (i = nb_args; i; i--) {
|
---|
865 | vpushv(vtop - nb_args + i);
|
---|
866 |
|
---|
867 | if (a[i] & 1) {
|
---|
868 | // struct replaced by pointer
|
---|
869 | int r = get_reg(RC_INT);
|
---|
870 | arm64_spoff(intr(r), a1[i]);
|
---|
871 | vset(&vtop->type, r | VT_LVAL, 0);
|
---|
872 | vswap();
|
---|
873 | vstore();
|
---|
874 | if (a[i] >= 32) {
|
---|
875 | // pointer on stack
|
---|
876 | r = get_reg(RC_INT);
|
---|
877 | arm64_spoff(intr(r), a1[i]);
|
---|
878 | arm64_strx(3, intr(r), 31, (a[i] - 32) >> 1 << 1);
|
---|
879 | }
|
---|
880 | }
|
---|
881 | else if (a[i] >= 32) {
|
---|
882 | // value on stack
|
---|
883 | if ((vtop->type.t & VT_BTYPE) == VT_STRUCT) {
|
---|
884 | int r = get_reg(RC_INT);
|
---|
885 | arm64_spoff(intr(r), a[i] - 32);
|
---|
886 | vset(&vtop->type, r | VT_LVAL, 0);
|
---|
887 | vswap();
|
---|
888 | vstore();
|
---|
889 | }
|
---|
890 | else if (is_float(vtop->type.t)) {
|
---|
891 | gv(RC_FLOAT);
|
---|
892 | arm64_strv(arm64_type_size(vtop[0].type.t),
|
---|
893 | fltr(vtop[0].r), 31, a[i] - 32);
|
---|
894 | }
|
---|
895 | else {
|
---|
896 | gv(RC_INT);
|
---|
897 | arm64_strx(arm64_type_size(vtop[0].type.t),
|
---|
898 | intr(vtop[0].r), 31, a[i] - 32);
|
---|
899 | }
|
---|
900 | }
|
---|
901 |
|
---|
902 | --vtop;
|
---|
903 | }
|
---|
904 |
|
---|
905 | // Second pass: assign values to registers
|
---|
906 | for (i = nb_args; i; i--, vtop--) {
|
---|
907 | if (a[i] < 16 && !(a[i] & 1)) {
|
---|
908 | // value in general-purpose registers
|
---|
909 | if ((vtop->type.t & VT_BTYPE) == VT_STRUCT) {
|
---|
910 | int align, size = type_size(&vtop->type, &align);
|
---|
911 | vtop->type.t = VT_PTR;
|
---|
912 | gaddrof();
|
---|
913 | gv(RC_R(a[i] / 2));
|
---|
914 | arm64_ldrs(a[i] / 2, size);
|
---|
915 | }
|
---|
916 | else
|
---|
917 | gv(RC_R(a[i] / 2));
|
---|
918 | }
|
---|
919 | else if (a[i] < 16)
|
---|
920 | // struct replaced by pointer in register
|
---|
921 | arm64_spoff(a[i] / 2, a1[i]);
|
---|
922 | else if (a[i] < 32) {
|
---|
923 | // value in floating-point registers
|
---|
924 | if ((vtop->type.t & VT_BTYPE) == VT_STRUCT) {
|
---|
925 | uint32_t j, sz, n = arm64_hfa(&vtop->type, &sz);
|
---|
926 | vtop->type.t = VT_PTR;
|
---|
927 | gaddrof();
|
---|
928 | gv(RC_R30);
|
---|
929 | for (j = 0; j < n; j++)
|
---|
930 | o(0x3d4003c0 |
|
---|
931 | (sz & 16) << 19 | -(sz & 8) << 27 | (sz & 4) << 29 |
|
---|
932 | (a[i] / 2 - 8 + j) |
|
---|
933 | j << 10); // ldr ([sdq])(*),[x30,#(j * sz)]
|
---|
934 | }
|
---|
935 | else
|
---|
936 | gv(RC_F(a[i] / 2 - 8));
|
---|
937 | }
|
---|
938 | }
|
---|
939 |
|
---|
940 | if ((return_type->t & VT_BTYPE) == VT_STRUCT) {
|
---|
941 | if (a[0] == 1) {
|
---|
942 | // indirect return: set x8 and discard the stack value
|
---|
943 | gv(RC_R(8));
|
---|
944 | --vtop;
|
---|
945 | }
|
---|
946 | else
|
---|
947 | // return in registers: keep the address for after the call
|
---|
948 | vswap();
|
---|
949 | }
|
---|
950 |
|
---|
951 | save_regs(0);
|
---|
952 | arm64_gen_bl_or_b(0);
|
---|
953 | --vtop;
|
---|
954 | if (stack)
|
---|
955 | o(0x910003ff | stack << 10); // add sp,sp,#(n)
|
---|
956 |
|
---|
957 | {
|
---|
958 | int rt = return_type->t;
|
---|
959 | int bt = rt & VT_BTYPE;
|
---|
960 | if (bt == VT_BYTE || bt == VT_SHORT)
|
---|
961 | // Promote small integers:
|
---|
962 | o(0x13001c00 | (bt == VT_SHORT) << 13 |
|
---|
963 | (uint32_t)!!(rt & VT_UNSIGNED) << 30); // [su]xt[bh] w0,w0
|
---|
964 | else if (bt == VT_STRUCT && !(a[0] & 1)) {
|
---|
965 | // A struct was returned in registers, so write it out:
|
---|
966 | gv(RC_R(8));
|
---|
967 | --vtop;
|
---|
968 | if (a[0] == 0) {
|
---|
969 | int align, size = type_size(return_type, &align);
|
---|
970 | assert(size <= 16);
|
---|
971 | if (size > 8)
|
---|
972 | o(0xa9000500); // stp x0,x1,[x8]
|
---|
973 | else if (size)
|
---|
974 | arm64_strx(size > 4 ? 3 : size > 2 ? 2 : size > 1, 0, 8, 0);
|
---|
975 |
|
---|
976 | }
|
---|
977 | else if (a[0] == 16) {
|
---|
978 | uint32_t j, sz, n = arm64_hfa(return_type, &sz);
|
---|
979 | for (j = 0; j < n; j++)
|
---|
980 | o(0x3d000100 |
|
---|
981 | (sz & 16) << 19 | -(sz & 8) << 27 | (sz & 4) << 29 |
|
---|
982 | (a[i] / 2 - 8 + j) |
|
---|
983 | j << 10); // str ([sdq])(*),[x8,#(j * sz)]
|
---|
984 | }
|
---|
985 | }
|
---|
986 | }
|
---|
987 |
|
---|
988 | tcc_free(a1);
|
---|
989 | tcc_free(a);
|
---|
990 | tcc_free(t);
|
---|
991 | }
|
---|
992 |
|
---|
993 | static unsigned long arm64_func_va_list_stack;
|
---|
994 | static int arm64_func_va_list_gr_offs;
|
---|
995 | static int arm64_func_va_list_vr_offs;
|
---|
996 | static int arm64_func_sub_sp_offset;
|
---|
997 |
|
---|
998 | ST_FUNC void gfunc_prolog(CType *func_type)
|
---|
999 | {
|
---|
1000 | int n = 0;
|
---|
1001 | int i = 0;
|
---|
1002 | Sym *sym;
|
---|
1003 | CType **t;
|
---|
1004 | unsigned long *a;
|
---|
1005 |
|
---|
1006 | // Why doesn't the caller (gen_function) set func_vt?
|
---|
1007 | func_vt = func_type->ref->type;
|
---|
1008 | func_vc = 144; // offset of where x8 is stored
|
---|
1009 |
|
---|
1010 | for (sym = func_type->ref; sym; sym = sym->next)
|
---|
1011 | ++n;
|
---|
1012 | t = tcc_malloc(n * sizeof(*t));
|
---|
1013 | a = tcc_malloc(n * sizeof(*a));
|
---|
1014 |
|
---|
1015 | for (sym = func_type->ref; sym; sym = sym->next)
|
---|
1016 | t[i++] = &sym->type;
|
---|
1017 |
|
---|
1018 | arm64_func_va_list_stack = arm64_pcs(n - 1, t, a);
|
---|
1019 |
|
---|
1020 | o(0xa9b27bfd); // stp x29,x30,[sp,#-224]!
|
---|
1021 | o(0xad0087e0); // stp q0,q1,[sp,#16]
|
---|
1022 | o(0xad018fe2); // stp q2,q3,[sp,#48]
|
---|
1023 | o(0xad0297e4); // stp q4,q5,[sp,#80]
|
---|
1024 | o(0xad039fe6); // stp q6,q7,[sp,#112]
|
---|
1025 | o(0xa90923e8); // stp x8,x8,[sp,#144]
|
---|
1026 | o(0xa90a07e0); // stp x0,x1,[sp,#160]
|
---|
1027 | o(0xa90b0fe2); // stp x2,x3,[sp,#176]
|
---|
1028 | o(0xa90c17e4); // stp x4,x5,[sp,#192]
|
---|
1029 | o(0xa90d1fe6); // stp x6,x7,[sp,#208]
|
---|
1030 |
|
---|
1031 | arm64_func_va_list_gr_offs = -64;
|
---|
1032 | arm64_func_va_list_vr_offs = -128;
|
---|
1033 |
|
---|
1034 | for (i = 1, sym = func_type->ref->next; sym; i++, sym = sym->next) {
|
---|
1035 | int off = (a[i] < 16 ? 160 + a[i] / 2 * 8 :
|
---|
1036 | a[i] < 32 ? 16 + (a[i] - 16) / 2 * 16 :
|
---|
1037 | 224 + ((a[i] - 32) >> 1 << 1));
|
---|
1038 | sym_push(sym->v & ~SYM_FIELD, &sym->type,
|
---|
1039 | (a[i] & 1 ? VT_LLOCAL : VT_LOCAL) | lvalue_type(sym->type.t),
|
---|
1040 | off);
|
---|
1041 |
|
---|
1042 | if (a[i] < 16) {
|
---|
1043 | int align, size = type_size(&sym->type, &align);
|
---|
1044 | arm64_func_va_list_gr_offs = (a[i] / 2 - 7 +
|
---|
1045 | (!(a[i] & 1) && size > 8)) * 8;
|
---|
1046 | }
|
---|
1047 | else if (a[i] < 32) {
|
---|
1048 | uint32_t hfa = arm64_hfa(&sym->type, 0);
|
---|
1049 | arm64_func_va_list_vr_offs = (a[i] / 2 - 16 +
|
---|
1050 | (hfa ? hfa : 1)) * 16;
|
---|
1051 | }
|
---|
1052 |
|
---|
1053 | // HFAs of float and double need to be written differently:
|
---|
1054 | if (16 <= a[i] && a[i] < 32 && (sym->type.t & VT_BTYPE) == VT_STRUCT) {
|
---|
1055 | uint32_t j, sz, k = arm64_hfa(&sym->type, &sz);
|
---|
1056 | if (sz < 16)
|
---|
1057 | for (j = 0; j < k; j++) {
|
---|
1058 | o(0x3d0003e0 | -(sz & 8) << 27 | (sz & 4) << 29 |
|
---|
1059 | ((a[i] - 16) / 2 + j) | (off / sz + j) << 10);
|
---|
1060 | // str ([sdq])(*),[sp,#(j * sz)]
|
---|
1061 | }
|
---|
1062 | }
|
---|
1063 | }
|
---|
1064 |
|
---|
1065 | tcc_free(a);
|
---|
1066 | tcc_free(t);
|
---|
1067 |
|
---|
1068 | o(0x910003fd); // mov x29,sp
|
---|
1069 | arm64_func_sub_sp_offset = ind;
|
---|
1070 | // In gfunc_epilog these will be replaced with code to decrement SP:
|
---|
1071 | o(0xd503201f); // nop
|
---|
1072 | o(0xd503201f); // nop
|
---|
1073 | loc = 0;
|
---|
1074 | }
|
---|
1075 |
|
---|
1076 | ST_FUNC void gen_va_start(void)
|
---|
1077 | {
|
---|
1078 | int r;
|
---|
1079 | --vtop; // we don't need the "arg"
|
---|
1080 | gaddrof();
|
---|
1081 | r = intr(gv(RC_INT));
|
---|
1082 |
|
---|
1083 | if (arm64_func_va_list_stack) {
|
---|
1084 | //xx could use add (immediate) here
|
---|
1085 | arm64_movimm(30, arm64_func_va_list_stack + 224);
|
---|
1086 | o(0x8b1e03be); // add x30,x29,x30
|
---|
1087 | }
|
---|
1088 | else
|
---|
1089 | o(0x910383be); // add x30,x29,#224
|
---|
1090 | o(0xf900001e | r << 5); // str x30,[x(r)]
|
---|
1091 |
|
---|
1092 | if (arm64_func_va_list_gr_offs) {
|
---|
1093 | if (arm64_func_va_list_stack)
|
---|
1094 | o(0x910383be); // add x30,x29,#224
|
---|
1095 | o(0xf900041e | r << 5); // str x30,[x(r),#8]
|
---|
1096 | }
|
---|
1097 |
|
---|
1098 | if (arm64_func_va_list_vr_offs) {
|
---|
1099 | o(0x910243be); // add x30,x29,#144
|
---|
1100 | o(0xf900081e | r << 5); // str x30,[x(r),#16]
|
---|
1101 | }
|
---|
1102 |
|
---|
1103 | arm64_movimm(30, arm64_func_va_list_gr_offs);
|
---|
1104 | o(0xb900181e | r << 5); // str w30,[x(r),#24]
|
---|
1105 |
|
---|
1106 | arm64_movimm(30, arm64_func_va_list_vr_offs);
|
---|
1107 | o(0xb9001c1e | r << 5); // str w30,[x(r),#28]
|
---|
1108 |
|
---|
1109 | --vtop;
|
---|
1110 | }
|
---|
1111 |
|
---|
1112 | ST_FUNC void gen_va_arg(CType *t)
|
---|
1113 | {
|
---|
1114 | int align, size = type_size(t, &align);
|
---|
1115 | int fsize, hfa = arm64_hfa(t, &fsize);
|
---|
1116 | uint32_t r0, r1;
|
---|
1117 |
|
---|
1118 | if (is_float(t->t)) {
|
---|
1119 | hfa = 1;
|
---|
1120 | fsize = size;
|
---|
1121 | }
|
---|
1122 |
|
---|
1123 | gaddrof();
|
---|
1124 | r0 = intr(gv(RC_INT));
|
---|
1125 | r1 = get_reg(RC_INT);
|
---|
1126 | vtop[0].r = r1 | lvalue_type(t->t);
|
---|
1127 | r1 = intr(r1);
|
---|
1128 |
|
---|
1129 | if (!hfa) {
|
---|
1130 | uint32_t n = size > 16 ? 8 : (size + 7) & -8;
|
---|
1131 | o(0xb940181e | r0 << 5); // ldr w30,[x(r0),#24] // __gr_offs
|
---|
1132 | if (align == 16) {
|
---|
1133 | assert(0); // this path untested but needed for __uint128_t
|
---|
1134 | o(0x11003fde); // add w30,w30,#15
|
---|
1135 | o(0x121c6fde); // and w30,w30,#-16
|
---|
1136 | }
|
---|
1137 | o(0x310003c0 | r1 | n << 10); // adds w(r1),w30,#(n)
|
---|
1138 | o(0x540000ad); // b.le .+20
|
---|
1139 | o(0xf9400000 | r1 | r0 << 5); // ldr x(r1),[x(r0)] // __stack
|
---|
1140 | o(0x9100001e | r1 << 5 | n << 10); // add x30,x(r1),#(n)
|
---|
1141 | o(0xf900001e | r0 << 5); // str x30,[x(r0)] // __stack
|
---|
1142 | o(0x14000004); // b .+16
|
---|
1143 | o(0xb9001800 | r1 | r0 << 5); // str w(r1),[x(r0),#24] // __gr_offs
|
---|
1144 | o(0xf9400400 | r1 | r0 << 5); // ldr x(r1),[x(r0),#8] // __gr_top
|
---|
1145 | o(0x8b3ec000 | r1 | r1 << 5); // add x(r1),x(r1),w30,sxtw
|
---|
1146 | if (size > 16)
|
---|
1147 | o(0xf9400000 | r1 | r1 << 5); // ldr x(r1),[x(r1)]
|
---|
1148 | }
|
---|
1149 | else {
|
---|
1150 | uint32_t rsz = hfa << 4;
|
---|
1151 | uint32_t ssz = (size + 7) & -(uint32_t)8;
|
---|
1152 | uint32_t b1, b2;
|
---|
1153 | o(0xb9401c1e | r0 << 5); // ldr w30,[x(r0),#28] // __vr_offs
|
---|
1154 | o(0x310003c0 | r1 | rsz << 10); // adds w(r1),w30,#(rsz)
|
---|
1155 | b1 = ind; o(0x5400000d); // b.le lab1
|
---|
1156 | o(0xf9400000 | r1 | r0 << 5); // ldr x(r1),[x(r0)] // __stack
|
---|
1157 | if (fsize == 16) {
|
---|
1158 | o(0x91003c00 | r1 | r1 << 5); // add x(r1),x(r1),#15
|
---|
1159 | o(0x927cec00 | r1 | r1 << 5); // and x(r1),x(r1),#-16
|
---|
1160 | }
|
---|
1161 | o(0x9100001e | r1 << 5 | ssz << 10); // add x30,x(r1),#(ssz)
|
---|
1162 | o(0xf900001e | r0 << 5); // str x30,[x(r0)] // __stack
|
---|
1163 | b2 = ind; o(0x14000000); // b lab2
|
---|
1164 | // lab1:
|
---|
1165 | write32le(cur_text_section->data + b1, 0x5400000d | (ind - b1) << 3);
|
---|
1166 | o(0xb9001c00 | r1 | r0 << 5); // str w(r1),[x(r0),#28] // __vr_offs
|
---|
1167 | o(0xf9400800 | r1 | r0 << 5); // ldr x(r1),[x(r0),#16] // __vr_top
|
---|
1168 | if (hfa == 1 || fsize == 16)
|
---|
1169 | o(0x8b3ec000 | r1 | r1 << 5); // add x(r1),x(r1),w30,sxtw
|
---|
1170 | else {
|
---|
1171 | // We need to change the layout of this HFA.
|
---|
1172 | // Get some space on the stack using global variable "loc":
|
---|
1173 | loc = (loc - size) & -(uint32_t)align;
|
---|
1174 | o(0x8b3ec000 | 30 | r1 << 5); // add x30,x(r1),w30,sxtw
|
---|
1175 | arm64_movimm(r1, loc);
|
---|
1176 | o(0x8b0003a0 | r1 | r1 << 16); // add x(r1),x29,x(r1)
|
---|
1177 | o(0x4c402bdc | (uint32_t)fsize << 7 |
|
---|
1178 | (uint32_t)(hfa == 2) << 15 |
|
---|
1179 | (uint32_t)(hfa == 3) << 14); // ld1 {v28.(4s|2d),...},[x30]
|
---|
1180 | o(0x0d00801c | r1 << 5 | (fsize == 8) << 10 |
|
---|
1181 | (uint32_t)(hfa != 2) << 13 |
|
---|
1182 | (uint32_t)(hfa != 3) << 21); // st(hfa) {v28.(s|d),...}[0],[x(r1)]
|
---|
1183 | }
|
---|
1184 | // lab2:
|
---|
1185 | write32le(cur_text_section->data + b2, 0x14000000 | (ind - b2) >> 2);
|
---|
1186 | }
|
---|
1187 | }
|
---|
1188 |
|
---|
1189 | ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret,
|
---|
1190 | int *align, int *regsize)
|
---|
1191 | {
|
---|
1192 | return 0;
|
---|
1193 | }
|
---|
1194 |
|
---|
1195 | ST_FUNC void gfunc_return(CType *func_type)
|
---|
1196 | {
|
---|
1197 | CType *t = func_type;
|
---|
1198 | unsigned long a;
|
---|
1199 |
|
---|
1200 | arm64_pcs(0, &t, &a);
|
---|
1201 | switch (a) {
|
---|
1202 | case -1:
|
---|
1203 | break;
|
---|
1204 | case 0:
|
---|
1205 | if ((func_type->t & VT_BTYPE) == VT_STRUCT) {
|
---|
1206 | int align, size = type_size(func_type, &align);
|
---|
1207 | gaddrof();
|
---|
1208 | gv(RC_R(0));
|
---|
1209 | arm64_ldrs(0, size);
|
---|
1210 | }
|
---|
1211 | else
|
---|
1212 | gv(RC_IRET);
|
---|
1213 | break;
|
---|
1214 | case 1: {
|
---|
1215 | CType type = *func_type;
|
---|
1216 | mk_pointer(&type);
|
---|
1217 | vset(&type, VT_LOCAL | VT_LVAL, func_vc);
|
---|
1218 | indir();
|
---|
1219 | vswap();
|
---|
1220 | vstore();
|
---|
1221 | break;
|
---|
1222 | }
|
---|
1223 | case 16:
|
---|
1224 | if ((func_type->t & VT_BTYPE) == VT_STRUCT) {
|
---|
1225 | uint32_t j, sz, n = arm64_hfa(&vtop->type, &sz);
|
---|
1226 | gaddrof();
|
---|
1227 | gv(RC_R(0));
|
---|
1228 | for (j = 0; j < n; j++)
|
---|
1229 | o(0x3d400000 |
|
---|
1230 | (sz & 16) << 19 | -(sz & 8) << 27 | (sz & 4) << 29 |
|
---|
1231 | j | j << 10); // ldr ([sdq])(*),[x0,#(j * sz)]
|
---|
1232 | }
|
---|
1233 | else
|
---|
1234 | gv(RC_FRET);
|
---|
1235 | break;
|
---|
1236 | default:
|
---|
1237 | assert(0);
|
---|
1238 | }
|
---|
1239 | vtop--;
|
---|
1240 | }
|
---|
1241 |
|
---|
1242 | ST_FUNC void gfunc_epilog(void)
|
---|
1243 | {
|
---|
1244 | if (loc) {
|
---|
1245 | // Insert instructions to subtract size of stack frame from SP.
|
---|
1246 | unsigned char *ptr = cur_text_section->data + arm64_func_sub_sp_offset;
|
---|
1247 | uint64_t diff = (-loc + 15) & ~15;
|
---|
1248 | if (!(diff >> 24)) {
|
---|
1249 | if (diff & 0xfff) // sub sp,sp,#(diff & 0xfff)
|
---|
1250 | write32le(ptr, 0xd10003ff | (diff & 0xfff) << 10);
|
---|
1251 | if (diff >> 12) // sub sp,sp,#(diff >> 12),lsl #12
|
---|
1252 | write32le(ptr + 4, 0xd14003ff | (diff >> 12) << 10);
|
---|
1253 | }
|
---|
1254 | else {
|
---|
1255 | // In this case we may subtract more than necessary,
|
---|
1256 | // but always less than 17/16 of what we were aiming for.
|
---|
1257 | int i = 0;
|
---|
1258 | int j = 0;
|
---|
1259 | while (diff >> 20) {
|
---|
1260 | diff = (diff + 0xffff) >> 16;
|
---|
1261 | ++i;
|
---|
1262 | }
|
---|
1263 | while (diff >> 16) {
|
---|
1264 | diff = (diff + 1) >> 1;
|
---|
1265 | ++j;
|
---|
1266 | }
|
---|
1267 | write32le(ptr, 0xd2800010 | diff << 5 | i << 21);
|
---|
1268 | // mov x16,#(diff),lsl #(16 * i)
|
---|
1269 | write32le(ptr + 4, 0xcb3063ff | j << 10);
|
---|
1270 | // sub sp,sp,x16,lsl #(j)
|
---|
1271 | }
|
---|
1272 | }
|
---|
1273 | o(0x910003bf); // mov sp,x29
|
---|
1274 | o(0xa8ce7bfd); // ldp x29,x30,[sp],#224
|
---|
1275 |
|
---|
1276 | o(0xd65f03c0); // ret
|
---|
1277 | }
|
---|
1278 |
|
---|
1279 | // Generate forward branch to label:
|
---|
1280 | ST_FUNC int gjmp(int t)
|
---|
1281 | {
|
---|
1282 | int r = ind;
|
---|
1283 | if (nocode_wanted)
|
---|
1284 | return t;
|
---|
1285 | o(t);
|
---|
1286 | return r;
|
---|
1287 | }
|
---|
1288 |
|
---|
1289 | // Generate branch to known address:
|
---|
1290 | ST_FUNC void gjmp_addr(int a)
|
---|
1291 | {
|
---|
1292 | assert(a - ind + 0x8000000 < 0x10000000);
|
---|
1293 | o(0x14000000 | ((a - ind) >> 2 & 0x3ffffff));
|
---|
1294 | }
|
---|
1295 |
|
---|
1296 | ST_FUNC int gtst(int inv, int t)
|
---|
1297 | {
|
---|
1298 | int bt = vtop->type.t & VT_BTYPE;
|
---|
1299 | if (bt == VT_LDOUBLE) {
|
---|
1300 | uint32_t a, b, f = fltr(gv(RC_FLOAT));
|
---|
1301 | a = get_reg(RC_INT);
|
---|
1302 | vpushi(0);
|
---|
1303 | vtop[0].r = a;
|
---|
1304 | b = get_reg(RC_INT);
|
---|
1305 | a = intr(a);
|
---|
1306 | b = intr(b);
|
---|
1307 | o(0x4e083c00 | a | f << 5); // mov x(a),v(f).d[0]
|
---|
1308 | o(0x4e183c00 | b | f << 5); // mov x(b),v(f).d[1]
|
---|
1309 | o(0xaa000400 | a | a << 5 | b << 16); // orr x(a),x(a),x(b),lsl #1
|
---|
1310 | o(0xb4000040 | a | !!inv << 24); // cbz/cbnz x(a),.+8
|
---|
1311 | --vtop;
|
---|
1312 | }
|
---|
1313 | else if (bt == VT_FLOAT || bt == VT_DOUBLE) {
|
---|
1314 | uint32_t a = fltr(gv(RC_FLOAT));
|
---|
1315 | o(0x1e202008 | a << 5 | (bt != VT_FLOAT) << 22); // fcmp
|
---|
1316 | o(0x54000040 | !!inv); // b.eq/b.ne .+8
|
---|
1317 | }
|
---|
1318 | else {
|
---|
1319 | uint32_t ll = (bt == VT_PTR || bt == VT_LLONG);
|
---|
1320 | uint32_t a = intr(gv(RC_INT));
|
---|
1321 | o(0x34000040 | a | !!inv << 24 | ll << 31); // cbz/cbnz wA,.+8
|
---|
1322 | }
|
---|
1323 | --vtop;
|
---|
1324 | return gjmp(t);
|
---|
1325 | }
|
---|
1326 |
|
---|
1327 | static int arm64_iconst(uint64_t *val, SValue *sv)
|
---|
1328 | {
|
---|
1329 | if ((sv->r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
|
---|
1330 | return 0;
|
---|
1331 | if (val) {
|
---|
1332 | int t = sv->type.t;
|
---|
1333 | int bt = t & VT_BTYPE;
|
---|
1334 | *val = ((bt == VT_LLONG || bt == VT_PTR) ? sv->c.i :
|
---|
1335 | (uint32_t)sv->c.i |
|
---|
1336 | (t & VT_UNSIGNED ? 0 : -(sv->c.i & 0x80000000)));
|
---|
1337 | }
|
---|
1338 | return 1;
|
---|
1339 | }
|
---|
1340 |
|
---|
1341 | static int arm64_gen_opic(int op, uint32_t l, int rev, uint64_t val,
|
---|
1342 | uint32_t x, uint32_t a)
|
---|
1343 | {
|
---|
1344 | if (op == '-' && !rev) {
|
---|
1345 | val = -val;
|
---|
1346 | op = '+';
|
---|
1347 | }
|
---|
1348 | val = l ? val : (uint32_t)val;
|
---|
1349 |
|
---|
1350 | switch (op) {
|
---|
1351 |
|
---|
1352 | case '+': {
|
---|
1353 | uint32_t s = l ? val >> 63 : val >> 31;
|
---|
1354 | val = s ? -val : val;
|
---|
1355 | val = l ? val : (uint32_t)val;
|
---|
1356 | if (!(val & ~(uint64_t)0xfff))
|
---|
1357 | o(0x11000000 | l << 31 | s << 30 | x | a << 5 | val << 10);
|
---|
1358 | else if (!(val & ~(uint64_t)0xfff000))
|
---|
1359 | o(0x11400000 | l << 31 | s << 30 | x | a << 5 | val >> 12 << 10);
|
---|
1360 | else {
|
---|
1361 | arm64_movimm(30, val); // use x30
|
---|
1362 | o(0x0b1e0000 | l << 31 | s << 30 | x | a << 5);
|
---|
1363 | }
|
---|
1364 | return 1;
|
---|
1365 | }
|
---|
1366 |
|
---|
1367 | case '-':
|
---|
1368 | if (!val)
|
---|
1369 | o(0x4b0003e0 | l << 31 | x | a << 16); // neg
|
---|
1370 | else if (val == (l ? (uint64_t)-1 : (uint32_t)-1))
|
---|
1371 | o(0x2a2003e0 | l << 31 | x | a << 16); // mvn
|
---|
1372 | else {
|
---|
1373 | arm64_movimm(30, val); // use x30
|
---|
1374 | o(0x4b0003c0 | l << 31 | x | a << 16); // sub
|
---|
1375 | }
|
---|
1376 | return 1;
|
---|
1377 |
|
---|
1378 | case '^':
|
---|
1379 | if (val == -1 || (val == 0xffffffff && !l)) {
|
---|
1380 | o(0x2a2003e0 | l << 31 | x | a << 16); // mvn
|
---|
1381 | return 1;
|
---|
1382 | }
|
---|
1383 | // fall through
|
---|
1384 | case '&':
|
---|
1385 | case '|': {
|
---|
1386 | int e = arm64_encode_bimm64(l ? val : val | val << 32);
|
---|
1387 | if (e < 0)
|
---|
1388 | return 0;
|
---|
1389 | o((op == '&' ? 0x12000000 :
|
---|
1390 | op == '|' ? 0x32000000 : 0x52000000) |
|
---|
1391 | l << 31 | x | a << 5 | (uint32_t)e << 10);
|
---|
1392 | return 1;
|
---|
1393 | }
|
---|
1394 |
|
---|
1395 | case TOK_SAR:
|
---|
1396 | case TOK_SHL:
|
---|
1397 | case TOK_SHR: {
|
---|
1398 | uint32_t n = 32 << l;
|
---|
1399 | val = val & (n - 1);
|
---|
1400 | if (rev)
|
---|
1401 | return 0;
|
---|
1402 | if (!val)
|
---|
1403 | assert(0);
|
---|
1404 | else if (op == TOK_SHL)
|
---|
1405 | o(0x53000000 | l << 31 | l << 22 | x | a << 5 |
|
---|
1406 | (n - val) << 16 | (n - 1 - val) << 10); // lsl
|
---|
1407 | else
|
---|
1408 | o(0x13000000 | (op == TOK_SHR) << 30 | l << 31 | l << 22 |
|
---|
1409 | x | a << 5 | val << 16 | (n - 1) << 10); // lsr/asr
|
---|
1410 | return 1;
|
---|
1411 | }
|
---|
1412 |
|
---|
1413 | }
|
---|
1414 | return 0;
|
---|
1415 | }
|
---|
1416 |
|
---|
1417 | static void arm64_gen_opil(int op, uint32_t l)
|
---|
1418 | {
|
---|
1419 | uint32_t x, a, b;
|
---|
1420 |
|
---|
1421 | // Special treatment for operations with a constant operand:
|
---|
1422 | {
|
---|
1423 | uint64_t val;
|
---|
1424 | int rev = 1;
|
---|
1425 |
|
---|
1426 | if (arm64_iconst(0, &vtop[0])) {
|
---|
1427 | vswap();
|
---|
1428 | rev = 0;
|
---|
1429 | }
|
---|
1430 | if (arm64_iconst(&val, &vtop[-1])) {
|
---|
1431 | gv(RC_INT);
|
---|
1432 | a = intr(vtop[0].r);
|
---|
1433 | --vtop;
|
---|
1434 | x = get_reg(RC_INT);
|
---|
1435 | ++vtop;
|
---|
1436 | if (arm64_gen_opic(op, l, rev, val, intr(x), a)) {
|
---|
1437 | vtop[0].r = x;
|
---|
1438 | vswap();
|
---|
1439 | --vtop;
|
---|
1440 | return;
|
---|
1441 | }
|
---|
1442 | }
|
---|
1443 | if (!rev)
|
---|
1444 | vswap();
|
---|
1445 | }
|
---|
1446 |
|
---|
1447 | gv2(RC_INT, RC_INT);
|
---|
1448 | assert(vtop[-1].r < VT_CONST && vtop[0].r < VT_CONST);
|
---|
1449 | a = intr(vtop[-1].r);
|
---|
1450 | b = intr(vtop[0].r);
|
---|
1451 | vtop -= 2;
|
---|
1452 | x = get_reg(RC_INT);
|
---|
1453 | ++vtop;
|
---|
1454 | vtop[0].r = x;
|
---|
1455 | x = intr(x);
|
---|
1456 |
|
---|
1457 | switch (op) {
|
---|
1458 | case '%':
|
---|
1459 | // Use x30 for quotient:
|
---|
1460 | o(0x1ac00c00 | l << 31 | 30 | a << 5 | b << 16); // sdiv
|
---|
1461 | o(0x1b008000 | l << 31 | x | (uint32_t)30 << 5 |
|
---|
1462 | b << 16 | a << 10); // msub
|
---|
1463 | break;
|
---|
1464 | case '&':
|
---|
1465 | o(0x0a000000 | l << 31 | x | a << 5 | b << 16); // and
|
---|
1466 | break;
|
---|
1467 | case '*':
|
---|
1468 | o(0x1b007c00 | l << 31 | x | a << 5 | b << 16); // mul
|
---|
1469 | break;
|
---|
1470 | case '+':
|
---|
1471 | o(0x0b000000 | l << 31 | x | a << 5 | b << 16); // add
|
---|
1472 | break;
|
---|
1473 | case '-':
|
---|
1474 | o(0x4b000000 | l << 31 | x | a << 5 | b << 16); // sub
|
---|
1475 | break;
|
---|
1476 | case '/':
|
---|
1477 | o(0x1ac00c00 | l << 31 | x | a << 5 | b << 16); // sdiv
|
---|
1478 | break;
|
---|
1479 | case '^':
|
---|
1480 | o(0x4a000000 | l << 31 | x | a << 5 | b << 16); // eor
|
---|
1481 | break;
|
---|
1482 | case '|':
|
---|
1483 | o(0x2a000000 | l << 31 | x | a << 5 | b << 16); // orr
|
---|
1484 | break;
|
---|
1485 | case TOK_EQ:
|
---|
1486 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1487 | o(0x1a9f17e0 | x); // cset wA,eq
|
---|
1488 | break;
|
---|
1489 | case TOK_GE:
|
---|
1490 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1491 | o(0x1a9fb7e0 | x); // cset wA,ge
|
---|
1492 | break;
|
---|
1493 | case TOK_GT:
|
---|
1494 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1495 | o(0x1a9fd7e0 | x); // cset wA,gt
|
---|
1496 | break;
|
---|
1497 | case TOK_LE:
|
---|
1498 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1499 | o(0x1a9fc7e0 | x); // cset wA,le
|
---|
1500 | break;
|
---|
1501 | case TOK_LT:
|
---|
1502 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1503 | o(0x1a9fa7e0 | x); // cset wA,lt
|
---|
1504 | break;
|
---|
1505 | case TOK_NE:
|
---|
1506 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1507 | o(0x1a9f07e0 | x); // cset wA,ne
|
---|
1508 | break;
|
---|
1509 | case TOK_SAR:
|
---|
1510 | o(0x1ac02800 | l << 31 | x | a << 5 | b << 16); // asr
|
---|
1511 | break;
|
---|
1512 | case TOK_SHL:
|
---|
1513 | o(0x1ac02000 | l << 31 | x | a << 5 | b << 16); // lsl
|
---|
1514 | break;
|
---|
1515 | case TOK_SHR:
|
---|
1516 | o(0x1ac02400 | l << 31 | x | a << 5 | b << 16); // lsr
|
---|
1517 | break;
|
---|
1518 | case TOK_UDIV:
|
---|
1519 | case TOK_PDIV:
|
---|
1520 | o(0x1ac00800 | l << 31 | x | a << 5 | b << 16); // udiv
|
---|
1521 | break;
|
---|
1522 | case TOK_UGE:
|
---|
1523 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1524 | o(0x1a9f37e0 | x); // cset wA,cs
|
---|
1525 | break;
|
---|
1526 | case TOK_UGT:
|
---|
1527 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1528 | o(0x1a9f97e0 | x); // cset wA,hi
|
---|
1529 | break;
|
---|
1530 | case TOK_ULT:
|
---|
1531 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1532 | o(0x1a9f27e0 | x); // cset wA,cc
|
---|
1533 | break;
|
---|
1534 | case TOK_ULE:
|
---|
1535 | o(0x6b00001f | l << 31 | a << 5 | b << 16); // cmp
|
---|
1536 | o(0x1a9f87e0 | x); // cset wA,ls
|
---|
1537 | break;
|
---|
1538 | case TOK_UMOD:
|
---|
1539 | // Use x30 for quotient:
|
---|
1540 | o(0x1ac00800 | l << 31 | 30 | a << 5 | b << 16); // udiv
|
---|
1541 | o(0x1b008000 | l << 31 | x | (uint32_t)30 << 5 |
|
---|
1542 | b << 16 | a << 10); // msub
|
---|
1543 | break;
|
---|
1544 | default:
|
---|
1545 | assert(0);
|
---|
1546 | }
|
---|
1547 | }
|
---|
1548 |
|
---|
1549 | ST_FUNC void gen_opi(int op)
|
---|
1550 | {
|
---|
1551 | arm64_gen_opil(op, 0);
|
---|
1552 | }
|
---|
1553 |
|
---|
1554 | ST_FUNC void gen_opl(int op)
|
---|
1555 | {
|
---|
1556 | arm64_gen_opil(op, 1);
|
---|
1557 | }
|
---|
1558 |
|
---|
1559 | ST_FUNC void gen_opf(int op)
|
---|
1560 | {
|
---|
1561 | uint32_t x, a, b, dbl;
|
---|
1562 |
|
---|
1563 | if (vtop[0].type.t == VT_LDOUBLE) {
|
---|
1564 | CType type = vtop[0].type;
|
---|
1565 | int func = 0;
|
---|
1566 | int cond = -1;
|
---|
1567 | switch (op) {
|
---|
1568 | case '*': func = TOK___multf3; break;
|
---|
1569 | case '+': func = TOK___addtf3; break;
|
---|
1570 | case '-': func = TOK___subtf3; break;
|
---|
1571 | case '/': func = TOK___divtf3; break;
|
---|
1572 | case TOK_EQ: func = TOK___eqtf2; cond = 1; break;
|
---|
1573 | case TOK_NE: func = TOK___netf2; cond = 0; break;
|
---|
1574 | case TOK_LT: func = TOK___lttf2; cond = 10; break;
|
---|
1575 | case TOK_GE: func = TOK___getf2; cond = 11; break;
|
---|
1576 | case TOK_LE: func = TOK___letf2; cond = 12; break;
|
---|
1577 | case TOK_GT: func = TOK___gttf2; cond = 13; break;
|
---|
1578 | default: assert(0); break;
|
---|
1579 | }
|
---|
1580 | vpush_global_sym(&func_old_type, func);
|
---|
1581 | vrott(3);
|
---|
1582 | gfunc_call(2);
|
---|
1583 | vpushi(0);
|
---|
1584 | vtop->r = cond < 0 ? REG_FRET : REG_IRET;
|
---|
1585 | if (cond < 0)
|
---|
1586 | vtop->type = type;
|
---|
1587 | else {
|
---|
1588 | o(0x7100001f); // cmp w0,#0
|
---|
1589 | o(0x1a9f07e0 | (uint32_t)cond << 12); // cset w0,(cond)
|
---|
1590 | }
|
---|
1591 | return;
|
---|
1592 | }
|
---|
1593 |
|
---|
1594 | dbl = vtop[0].type.t != VT_FLOAT;
|
---|
1595 | gv2(RC_FLOAT, RC_FLOAT);
|
---|
1596 | assert(vtop[-1].r < VT_CONST && vtop[0].r < VT_CONST);
|
---|
1597 | a = fltr(vtop[-1].r);
|
---|
1598 | b = fltr(vtop[0].r);
|
---|
1599 | vtop -= 2;
|
---|
1600 | switch (op) {
|
---|
1601 | case TOK_EQ: case TOK_NE:
|
---|
1602 | case TOK_LT: case TOK_GE: case TOK_LE: case TOK_GT:
|
---|
1603 | x = get_reg(RC_INT);
|
---|
1604 | ++vtop;
|
---|
1605 | vtop[0].r = x;
|
---|
1606 | x = intr(x);
|
---|
1607 | break;
|
---|
1608 | default:
|
---|
1609 | x = get_reg(RC_FLOAT);
|
---|
1610 | ++vtop;
|
---|
1611 | vtop[0].r = x;
|
---|
1612 | x = fltr(x);
|
---|
1613 | break;
|
---|
1614 | }
|
---|
1615 |
|
---|
1616 | switch (op) {
|
---|
1617 | case '*':
|
---|
1618 | o(0x1e200800 | dbl << 22 | x | a << 5 | b << 16); // fmul
|
---|
1619 | break;
|
---|
1620 | case '+':
|
---|
1621 | o(0x1e202800 | dbl << 22 | x | a << 5 | b << 16); // fadd
|
---|
1622 | break;
|
---|
1623 | case '-':
|
---|
1624 | o(0x1e203800 | dbl << 22 | x | a << 5 | b << 16); // fsub
|
---|
1625 | break;
|
---|
1626 | case '/':
|
---|
1627 | o(0x1e201800 | dbl << 22 | x | a << 5 | b << 16); // fdiv
|
---|
1628 | break;
|
---|
1629 | case TOK_EQ:
|
---|
1630 | o(0x1e202000 | dbl << 22 | a << 5 | b << 16); // fcmp
|
---|
1631 | o(0x1a9f17e0 | x); // cset w(x),eq
|
---|
1632 | break;
|
---|
1633 | case TOK_GE:
|
---|
1634 | o(0x1e202000 | dbl << 22 | a << 5 | b << 16); // fcmp
|
---|
1635 | o(0x1a9fb7e0 | x); // cset w(x),ge
|
---|
1636 | break;
|
---|
1637 | case TOK_GT:
|
---|
1638 | o(0x1e202000 | dbl << 22 | a << 5 | b << 16); // fcmp
|
---|
1639 | o(0x1a9fd7e0 | x); // cset w(x),gt
|
---|
1640 | break;
|
---|
1641 | case TOK_LE:
|
---|
1642 | o(0x1e202000 | dbl << 22 | a << 5 | b << 16); // fcmp
|
---|
1643 | o(0x1a9f87e0 | x); // cset w(x),ls
|
---|
1644 | break;
|
---|
1645 | case TOK_LT:
|
---|
1646 | o(0x1e202000 | dbl << 22 | a << 5 | b << 16); // fcmp
|
---|
1647 | o(0x1a9f57e0 | x); // cset w(x),mi
|
---|
1648 | break;
|
---|
1649 | case TOK_NE:
|
---|
1650 | o(0x1e202000 | dbl << 22 | a << 5 | b << 16); // fcmp
|
---|
1651 | o(0x1a9f07e0 | x); // cset w(x),ne
|
---|
1652 | break;
|
---|
1653 | default:
|
---|
1654 | assert(0);
|
---|
1655 | }
|
---|
1656 | }
|
---|
1657 |
|
---|
1658 | // Generate sign extension from 32 to 64 bits:
|
---|
1659 | ST_FUNC void gen_cvt_sxtw(void)
|
---|
1660 | {
|
---|
1661 | uint32_t r = intr(gv(RC_INT));
|
---|
1662 | o(0x93407c00 | r | r << 5); // sxtw x(r),w(r)
|
---|
1663 | }
|
---|
1664 |
|
---|
1665 | ST_FUNC void gen_cvt_itof(int t)
|
---|
1666 | {
|
---|
1667 | if (t == VT_LDOUBLE) {
|
---|
1668 | int f = vtop->type.t;
|
---|
1669 | int func = (f & VT_BTYPE) == VT_LLONG ?
|
---|
1670 | (f & VT_UNSIGNED ? TOK___floatunditf : TOK___floatditf) :
|
---|
1671 | (f & VT_UNSIGNED ? TOK___floatunsitf : TOK___floatsitf);
|
---|
1672 | vpush_global_sym(&func_old_type, func);
|
---|
1673 | vrott(2);
|
---|
1674 | gfunc_call(1);
|
---|
1675 | vpushi(0);
|
---|
1676 | vtop->type.t = t;
|
---|
1677 | vtop->r = REG_FRET;
|
---|
1678 | return;
|
---|
1679 | }
|
---|
1680 | else {
|
---|
1681 | int d, n = intr(gv(RC_INT));
|
---|
1682 | int s = !(vtop->type.t & VT_UNSIGNED);
|
---|
1683 | uint32_t l = ((vtop->type.t & VT_BTYPE) == VT_LLONG);
|
---|
1684 | --vtop;
|
---|
1685 | d = get_reg(RC_FLOAT);
|
---|
1686 | ++vtop;
|
---|
1687 | vtop[0].r = d;
|
---|
1688 | o(0x1e220000 | (uint32_t)!s << 16 |
|
---|
1689 | (uint32_t)(t != VT_FLOAT) << 22 | fltr(d) |
|
---|
1690 | l << 31 | n << 5); // [us]cvtf [sd](d),[wx](n)
|
---|
1691 | }
|
---|
1692 | }
|
---|
1693 |
|
---|
1694 | ST_FUNC void gen_cvt_ftoi(int t)
|
---|
1695 | {
|
---|
1696 | if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
|
---|
1697 | int func = (t & VT_BTYPE) == VT_LLONG ?
|
---|
1698 | (t & VT_UNSIGNED ? TOK___fixunstfdi : TOK___fixtfdi) :
|
---|
1699 | (t & VT_UNSIGNED ? TOK___fixunstfsi : TOK___fixtfsi);
|
---|
1700 | vpush_global_sym(&func_old_type, func);
|
---|
1701 | vrott(2);
|
---|
1702 | gfunc_call(1);
|
---|
1703 | vpushi(0);
|
---|
1704 | vtop->type.t = t;
|
---|
1705 | vtop->r = REG_IRET;
|
---|
1706 | return;
|
---|
1707 | }
|
---|
1708 | else {
|
---|
1709 | int d, n = fltr(gv(RC_FLOAT));
|
---|
1710 | uint32_t l = ((vtop->type.t & VT_BTYPE) != VT_FLOAT);
|
---|
1711 | --vtop;
|
---|
1712 | d = get_reg(RC_INT);
|
---|
1713 | ++vtop;
|
---|
1714 | vtop[0].r = d;
|
---|
1715 | o(0x1e380000 |
|
---|
1716 | (uint32_t)!!(t & VT_UNSIGNED) << 16 |
|
---|
1717 | (uint32_t)((t & VT_BTYPE) == VT_LLONG) << 31 | intr(d) |
|
---|
1718 | l << 22 | n << 5); // fcvtz[su] [wx](d),[sd](n)
|
---|
1719 | }
|
---|
1720 | }
|
---|
1721 |
|
---|
1722 | ST_FUNC void gen_cvt_ftof(int t)
|
---|
1723 | {
|
---|
1724 | int f = vtop[0].type.t;
|
---|
1725 | assert(t == VT_FLOAT || t == VT_DOUBLE || t == VT_LDOUBLE);
|
---|
1726 | assert(f == VT_FLOAT || f == VT_DOUBLE || f == VT_LDOUBLE);
|
---|
1727 | if (t == f)
|
---|
1728 | return;
|
---|
1729 |
|
---|
1730 | if (t == VT_LDOUBLE || f == VT_LDOUBLE) {
|
---|
1731 | int func = (t == VT_LDOUBLE) ?
|
---|
1732 | (f == VT_FLOAT ? TOK___extendsftf2 : TOK___extenddftf2) :
|
---|
1733 | (t == VT_FLOAT ? TOK___trunctfsf2 : TOK___trunctfdf2);
|
---|
1734 | vpush_global_sym(&func_old_type, func);
|
---|
1735 | vrott(2);
|
---|
1736 | gfunc_call(1);
|
---|
1737 | vpushi(0);
|
---|
1738 | vtop->type.t = t;
|
---|
1739 | vtop->r = REG_FRET;
|
---|
1740 | }
|
---|
1741 | else {
|
---|
1742 | int x, a;
|
---|
1743 | gv(RC_FLOAT);
|
---|
1744 | assert(vtop[0].r < VT_CONST);
|
---|
1745 | a = fltr(vtop[0].r);
|
---|
1746 | --vtop;
|
---|
1747 | x = get_reg(RC_FLOAT);
|
---|
1748 | ++vtop;
|
---|
1749 | vtop[0].r = x;
|
---|
1750 | x = fltr(x);
|
---|
1751 |
|
---|
1752 | if (f == VT_FLOAT)
|
---|
1753 | o(0x1e22c000 | x | a << 5); // fcvt d(x),s(a)
|
---|
1754 | else
|
---|
1755 | o(0x1e624000 | x | a << 5); // fcvt s(x),d(a)
|
---|
1756 | }
|
---|
1757 | }
|
---|
1758 |
|
---|
1759 | ST_FUNC void ggoto(void)
|
---|
1760 | {
|
---|
1761 | arm64_gen_bl_or_b(1);
|
---|
1762 | --vtop;
|
---|
1763 | }
|
---|
1764 |
|
---|
1765 | ST_FUNC void gen_clear_cache(void)
|
---|
1766 | {
|
---|
1767 | uint32_t beg, end, dsz, isz, p, lab1, b1;
|
---|
1768 | gv2(RC_INT, RC_INT);
|
---|
1769 | vpushi(0);
|
---|
1770 | vtop->r = get_reg(RC_INT);
|
---|
1771 | vpushi(0);
|
---|
1772 | vtop->r = get_reg(RC_INT);
|
---|
1773 | vpushi(0);
|
---|
1774 | vtop->r = get_reg(RC_INT);
|
---|
1775 | beg = intr(vtop[-4].r); // x0
|
---|
1776 | end = intr(vtop[-3].r); // x1
|
---|
1777 | dsz = intr(vtop[-2].r); // x2
|
---|
1778 | isz = intr(vtop[-1].r); // x3
|
---|
1779 | p = intr(vtop[0].r); // x4
|
---|
1780 | vtop -= 5;
|
---|
1781 |
|
---|
1782 | o(0xd53b0020 | isz); // mrs x(isz),ctr_el0
|
---|
1783 | o(0x52800080 | p); // mov w(p),#4
|
---|
1784 | o(0x53104c00 | dsz | isz << 5); // ubfx w(dsz),w(isz),#16,#4
|
---|
1785 | o(0x1ac02000 | dsz | p << 5 | dsz << 16); // lsl w(dsz),w(p),w(dsz)
|
---|
1786 | o(0x12000c00 | isz | isz << 5); // and w(isz),w(isz),#15
|
---|
1787 | o(0x1ac02000 | isz | p << 5 | isz << 16); // lsl w(isz),w(p),w(isz)
|
---|
1788 | o(0x51000400 | p | dsz << 5); // sub w(p),w(dsz),#1
|
---|
1789 | o(0x8a240004 | p | beg << 5 | p << 16); // bic x(p),x(beg),x(p)
|
---|
1790 | b1 = ind; o(0x14000000); // b
|
---|
1791 | lab1 = ind;
|
---|
1792 | o(0xd50b7b20 | p); // dc cvau,x(p)
|
---|
1793 | o(0x8b000000 | p | p << 5 | dsz << 16); // add x(p),x(p),x(dsz)
|
---|
1794 | write32le(cur_text_section->data + b1, 0x14000000 | (ind - b1) >> 2);
|
---|
1795 | o(0xeb00001f | p << 5 | end << 16); // cmp x(p),x(end)
|
---|
1796 | o(0x54ffffa3 | ((lab1 - ind) << 3 & 0xffffe0)); // b.cc lab1
|
---|
1797 | o(0xd5033b9f); // dsb ish
|
---|
1798 | o(0x51000400 | p | isz << 5); // sub w(p),w(isz),#1
|
---|
1799 | o(0x8a240004 | p | beg << 5 | p << 16); // bic x(p),x(beg),x(p)
|
---|
1800 | b1 = ind; o(0x14000000); // b
|
---|
1801 | lab1 = ind;
|
---|
1802 | o(0xd50b7520 | p); // ic ivau,x(p)
|
---|
1803 | o(0x8b000000 | p | p << 5 | isz << 16); // add x(p),x(p),x(isz)
|
---|
1804 | write32le(cur_text_section->data + b1, 0x14000000 | (ind - b1) >> 2);
|
---|
1805 | o(0xeb00001f | p << 5 | end << 16); // cmp x(p),x(end)
|
---|
1806 | o(0x54ffffa3 | ((lab1 - ind) << 3 & 0xffffe0)); // b.cc lab1
|
---|
1807 | o(0xd5033b9f); // dsb ish
|
---|
1808 | o(0xd5033fdf); // isb
|
---|
1809 | }
|
---|
1810 |
|
---|
1811 | ST_FUNC void gen_vla_sp_save(int addr) {
|
---|
1812 | uint32_t r = intr(get_reg(RC_INT));
|
---|
1813 | o(0x910003e0 | r); // mov x(r),sp
|
---|
1814 | arm64_strx(3, r, 29, addr);
|
---|
1815 | }
|
---|
1816 |
|
---|
1817 | ST_FUNC void gen_vla_sp_restore(int addr) {
|
---|
1818 | // Use x30 because this function can be called when there
|
---|
1819 | // is a live return value in x0 but there is nothing on
|
---|
1820 | // the value stack to prevent get_reg from returning x0.
|
---|
1821 | uint32_t r = 30;
|
---|
1822 | arm64_ldrx(0, 3, r, 29, addr);
|
---|
1823 | o(0x9100001f | r << 5); // mov sp,x(r)
|
---|
1824 | }
|
---|
1825 |
|
---|
1826 | ST_FUNC void gen_vla_alloc(CType *type, int align) {
|
---|
1827 | uint32_t r = intr(gv(RC_INT));
|
---|
1828 | o(0x91003c00 | r | r << 5); // add x(r),x(r),#15
|
---|
1829 | o(0x927cec00 | r | r << 5); // bic x(r),x(r),#15
|
---|
1830 | o(0xcb2063ff | r << 16); // sub sp,sp,x(r)
|
---|
1831 | vpop();
|
---|
1832 | }
|
---|
1833 |
|
---|
1834 | /* end of A64 code generator */
|
---|
1835 | /*************************************************************/
|
---|
1836 | #endif
|
---|
1837 | /*************************************************************/
|
---|