Changes between Version 3 and Version 4 of spec/Rte


Ignore:
Timestamp:
Oct 22, 2014, 4:53:36 PM (10 years ago)
Author:
fujisft-shigihara
Comment:

--

Legend:

Unmodified
Added
Removed
Modified

  • spec/Rte

    v3 v4  
    77[[BR]]
    88
    9 {{{#!comment
    10 [執筆開始時削除エリア]ここから
    11 ※コメントごと削除してください
    12 }}}
    13 * '''本項目は、まだ執筆されていません'''
    14 * '''執筆して頂ける方は、本注意書きを削除の上、執筆をお願いします(詳しくは本Wikiのソースコードをご参照ください)'''
    15 * '''質問事項等がございましたら、[http://dev.toppers.jp/trac/ap/wiki/ Wikiトップページ]にあります[http://dev.toppers.jp/trac/ap/wiki/WikiStart#%E5%95%8F%E3%81%84%E5%90%88%E3%82%8F%E3%81%9B%E5%85%88 問い合わせ先]までお願いします'''
     9= 概要 =
     10
     11* API一覧
     12
     13  ||= API =||= ID[[BR]][Dec] =||= ID[[BR]][Hex] =||
     14  || [#Rte_Ports Rte_Ports]                               ||  16|| 0x10||
     15  || [#Rte_NPorts Rte_NPorts]                             ||  17|| 0x11||
     16  || [#Rte_Port Rte_Port]                                 ||  18|| 0x12||
     17  || [#Rte_Send Rte_Send]                                 ||  19|| 0x13||
     18  || [#Rte_Write Rte_Write]                               ||  20|| 0x14||
     19  || [#Rte_Switch Rte_Switch]                             ||  21|| 0x15||
     20  || [#Rte_Invalidate Rte_Invalidate]                     ||  22|| 0x16||
     21  || [#Rte_Feedback Rte_Feedback]                         ||  23|| 0x17||
     22  || [#Rte_SwitchAck Rte_SwitchAck]                       ||  24|| 0x18||
     23  || [#Rte_Read Rte_Read]                                 ||  25|| 0x19||
     24  || [#Rte_DRead Rte_DRead]                               ||  26|| 0x1A||
     25  || [#Rte_Receive Rte_Receive]                           ||  27|| 0x1B||
     26  || [#Rte_Call Rte_Call]                                 ||  28|| 0x1C||
     27  || [#Rte_Result Rte_Result]                             ||  29|| 0x1D||
     28  || [#Rte_Pim Rte_Pim]                                   ||  30|| 0x1E||
     29  || [#Rte_CData Rte_CData]                               ||  31|| 0x1F||
     30  || [#Rte_Prm Rte_Prm]                                   ||  32|| 0x20||
     31  || [#Rte_IRead Rte_IRead]                               ||  33|| 0x21||
     32  || [#Rte_IWrite Rte_IWrite]                             ||  34|| 0x22||
     33  || [#Rte_IWriteRef Rte_IWriteRef]                       ||  35|| 0x23||
     34  || [#Rte_IInvalidate Rte_IInvalidate]                   ||  36|| 0x24||
     35  || [#Rte_IStatus Rte_IStatus]                           ||  37|| 0x25||
     36  || [#Rte_IrvIRead Rte_IrvIRead]                         ||  38|| 0x26||
     37  || [#Rte_IrvIWrite Rte_IrvIWrite]                       ||  39|| 0x27||
     38  || [#Rte_IrvRead Rte_IrvRead]                           ||  40|| 0x28||
     39  || [#Rte_IrvWrite Rte_IrvWrite]                         ||  41|| 0x29||
     40  || [#Rte_Enter Rte_Enter]                               ||  42|| 0x2A||
     41  || [#Rte_Exit Rte_Exit]                                 ||  43|| 0x2B||
     42  || [#Rte_Mode Rte_Mode]                                 ||  44|| 0x2C||
     43  || [#Rte_Trigger Rte_Trigger]                           ||  45|| 0x2D||
     44  || [#Rte_IrTrigger Rte_IrTrigger]                       ||  46|| 0x2E||
     45  || [#Rte_IFeedback Rte_IFeedback]                       ||  47|| 0x2F||
     46  || [#Rte_IsUpdated Rte_IsUpdated]                       ||  48|| 0x30||
     47  || [#Rte_Start Rte_Start]                               || 112|| 0x70||
     48  || [#Rte_Stop Rte_Stop]                                 || 113|| 0x71||
     49  || [#Rte_PartitionTerminated Rte_PartitionTerminated]   || 114|| 0x72||
     50  || [#Rte_PartitionRestarting Rte_PartitionRestarting]   || 115|| 0x73||
     51  || [#Rte_RestartPartition Rte_RestartPartition]         || 116|| 0x74||
     52
     53* コンフィギュレーション一覧
     54  * [#RteGeneration RteGeneration]
     55    * [#RteCalibrationSupport RteCalibrationSupport]
     56    * [#RteCodeVendorId RteCodeVendorId]
     57    * [#RteDevErrorDetect RteDevErrorDetect]
     58    * [#RteDevErrorDetectUninit RteDevErrorDetectUninit]
     59    * [#RteGenerationMode RteGenerationMode]
     60    * [#RteIocInteractionReturnValue RteIocInteractionReturnValue]
     61    * [#RteMeasurementSupport RteMeasurementSupport]
     62    * [#RteOptimizationMode RteOptimizationMode]
     63    * [#RteToolChainSignificantCharacters RteToolChainSignificantCharacters]
     64    * [#RteValueRangeCheckEnabled RteValueRangeCheckEnabled]
     65    * [#RteVfbTraceClientPrefix RteVfbTraceClientPrefix]
     66    * [#RteVfbTraceEnabled RteVfbTraceEnabled]
     67    * [#RteVfbTraceFunction RteVfbTraceFunction]
     68  * [#RteImplicitCommunication RteImplicitCommunication]
     69    * [#RteCoherentAccess RteCoherentAccess]
     70    * [#RteImmediateBufferUpdate RteImmediateBufferUpdate]
     71    * [#RteVariableReadAccessRef RteVariableReadAccessRef]
     72    * [#RteVariableWriteAccessRef RteVariableWriteAccessRef]
     73    * [#RteSoftwareComponentInstanceRef RteSoftwareComponentInstanceRef]
     74  * [#RteInitializationBehavior RteInitializationBehavior]
     75    * [#RteInitializationStrategy RteInitializationStrategy]
     76    * [#RteSectionInitializationPolicy RteSectionInitializationPolicy]
     77  * [#RteOsInteraction RteOsInteraction]
     78    * [#RteModeToScheduleTableMapping RteModeToScheduleTableMapping]
     79      * [#RteModeScheduleTableRef RteModeScheduleTableRef]
     80      * [#RteModeSchtblMapModeDeclarationRef RteModeSchtblMapModeDeclarationRef]
     81      * [#RteModeSchtblMapBsw RteModeSchtblMapBsw]
     82        * [#RteModeSchtblMapBswInstanceRef RteModeSchtblMapBswInstanceRef]
     83        * [#RteModeSchtblMapBswProvidedModeGroupRef RteModeSchtblMapBswProvidedModeGroupRef]
     84      * [#RteModeSchtblMapSwc RteModeSchtblMapSwc]
     85        * [#RteModeSchtblMapSwcInstanceRef RteModeSchtblMapSwcInstanceRef]
     86        * [#RteModeSchtblMapSwcPortRef RteModeSchtblMapSwcPortRef]
     87    * [#RteUsedOsActivation RteUsedOsActivation]
     88      * [#RteExpectedActivationOffset RteExpectedActivationOffset]
     89      * [#RteExpectedTickDuration RteExpectedTickDuration]
     90      * [#RteActivationOsAlarmRef RteActivationOsAlarmRef]
     91      * [#RteActivationOsSchTblRef RteActivationOsSchTblRef]
     92      * [#RteActivationOsTaskRef RteActivationOsTaskRef]
     93  * [#RtePostBuildVariantConfiguration RtePostBuildVariantConfiguration]
     94    * [#RtePostBuildUsedPredefinedVariant RtePostBuildUsedPredefinedVariant]
     95  * [#RteSwComponentInstance RteSwComponentInstance]
     96    * [#RteSoftwareComponentInstanceRef RteSoftwareComponentInstanceRef]
     97    * [#RteEventToTaskMapping RteEventToTaskMapping]
     98      * [#RteActivationOffset RteActivationOffset]
     99      * [#RteImmediateRestart RteImmediateRestart]
     100      * [#RteOsSchedulePoint RteOsSchedulePoint]
     101      * [#RtePositionInTask RtePositionInTask]
     102      * [#RteMappedToTaskRef RteMappedToTaskRef]
     103      * [#RteUsedOsAlarmRef RteUsedOsAlarmRef]
     104      * [#RteUsedOsEventRef RteUsedOsEventRef]
     105      * [#RteUsedOsSchTblExpiryPointRef RteUsedOsSchTblExpiryPointRef]
     106      * [#RteVirtuallyMappedToTaskRef RteVirtuallyMappedToTaskRef]
     107      * [#RteEventRef RteEventRef]
     108    * [#RteExclusiveAreaImplementation RteExclusiveAreaImplementation]
     109      * [#RteExclusiveAreaImplMechanism RteExclusiveAreaImplMechanism]
     110      * [#RteExclusiveAreaOsResourceRef RteExclusiveAreaOsResourceRef]
     111      * [#RteExclusiveAreaRef RteExclusiveAreaRef]
     112    * [#RteExternalTriggerConfig RteExternalTriggerConfig]
     113      * [#RteTriggerSourceQueueLength RteTriggerSourceQueueLength]
     114      * [#RteSwcTriggerSourceRef RteSwcTriggerSourceRef]
     115    * [#RteInternalTriggerConfig RteInternalTriggerConfig]
     116      * [#RteTriggerSourceQueueLength RteTriggerSourceQueueLength]
     117      * [#RteSwcTriggerSourceRef RteSwcTriggerSourceRef]
     118    * [#RteNvRamAllocation RteNvRamAllocation]
     119      * [#RteNvmRamBlockLocationSymbol RteNvmRamBlockLocationSymbol]
     120      * [#RteNvmRomBlockLocationSymbol RteNvmRomBlockLocationSymbol]
     121      * [#RteSwNvRamMappingRef RteSwNvRamMappingRef]
     122      * [#RteNvmBlockRef RteNvmBlockRef]
     123  * [#RteSwComponentType RteSwComponentType]
     124    * [#RteComponentTypeRef RteComponentTypeRef]
     125    * [#RteImplementationRef RteImplementationRef]
     126    * [#RteComponentTypeCalibration RteComponentTypeCalibration]
     127      * [#RteCalibrationSupportEnabled RteCalibrationSupportEnabled]
     128      * [#RteCalibrationSwAddrMethodRef RteCalibrationSwAddrMethodRef]
     129
     130* エラーコード一覧
     131
     132  ||= エラーコード =||= Dec =||= Hex =||
     133  ||RTE_E_OK                ||   0||   0x00||
     134  ||RTE_E_INVALID           ||   1||   0x01||
     135  ||RTE_E_COM_STOPPED       || 128||   0x80||
     136  ||RTE_E_TIMEOUT           || 129||   0x81||
     137  ||RTE_E_LIMIT             || 130||   0x82||
     138  ||RTE_E_NO_DATA           || 131||   0x83||
     139  ||RTE_E_TRANSMIT_ACK      || 132||   0x84||
     140  ||RTE_E_NEVER_RECEIVED    || 133||   0x85||
     141  ||RTE_E_UNCONNECTED       || 134||   0x86||
     142  ||RTE_E_IN_EXCLUSIVE_AREA || 135||   0x87||
     143  ||RTE_E_SEG_FAULT         || 136||   0x88||
     144  ||RTE_E_LOST_DATA         ||  64||   0x40||
     145  ||RTE_E_MAX_AGE_EXCEEDED  ||  64||   0x40||
     146
    16147----
    17 {{{#!comment
    18 [執筆開始時削除エリア]ここまで
    19 ※コメントごと削除してください
    20 }}}
    21 
    22 = 概要 =
     148
     149= API仕様 =
     150
     151== Rte_Ports ==
     152{{{
     153Rte_PortHandle_<i>_<R/P>
     154Rte_Ports_<i>_<R/P>([IN Rte_Instance])
     155}}}
     156
     157== Rte_NPorts ==
     158{{{
     159uint8 Rte_NPorts_<i>_<R/P>([IN Rte_Instance])
     160}}}
     161
     162== Rte_Port ==
     163{{{
     164Rte_PortHandle_<i>_<R/P>
     165Rte_Port_<p>([IN Rte_Instance])
     166}}}
     167
     168== Rte_Send ==
     169{{{
     170Std_ReturnType Rte_Send_<p>_<o>([IN Rte_Instance <instance>], IN <data>, [IN uint16 <length>])
     171}}}
     172
     173== Rte_Write ==
     174{{{
     175Std_ReturnType Rte_Write_<p>_<o>([IN Rte_Instance <instance>], IN <data>)
     176}}}
     177
     178== Rte_Switch ==
     179{{{
     180Std_ReturnType Rte_Switch_<p>_<o>([IN Rte_Instance <instance>], IN <mode>)
     181}}}
     182
     183== Rte_Invalidate ==
     184{{{
     185Std_ReturnType Rte_Invalidate_<p>_<o>([IN Rte_Instance <instance>])
     186}}}
     187
     188== Rte_Feedback ==
     189{{{
     190Std_ReturnType Rte_Feedback_<p>_<o>([IN Rte_Instance <instance>])
     191}}}
     192
     193== Rte_SwitchAck ==
     194{{{
     195Std_ReturnType Rte_SwitchAck_<p>_<o>([IN Rte_Instance <instance>])
     196}}}
     197
     198== Rte_Read ==
     199{{{
     200Std_ReturnType Rte_Read_<p>_<o>([IN Rte_Instance <instance>], OUT <data>)
     201}}}
     202
     203== Rte_DRead ==
     204{{{
     205<return> Rte_DRead_<p>_<o>([IN Rte_Instance <instance>])
     206}}}
     207
     208== Rte_Receive ==
     209{{{
     210Std_ReturnType Rte_Receive_<p>_<o>([IN Rte_Instance <instance>], OUT <data>, [OUT uint16 <length>])
     211}}}
     212
     213== Rte_Call ==
     214{{{
     215Std_ReturnType Rte_Call_<p>_<o>([IN Rte_Instance <instance>], [IN|IN/OUT|OUT] <data_1>... [IN|IN/OUT|OUT] <data_n>)
     216}}}
     217
     218== Rte_Result ==
     219{{{
     220Std_ReturnType Rte_Result_<p>_<o>([IN Rte_Instance <instance>], [IN/OUT|OUT <param 1>]... [IN/OUT|OUT <param n>])
     221}}}
     222
     223== Rte_Pim ==
     224{{{
     225<type>/<return reference> Rte_Pim_<name>([IN Rte_Instance <instance>])
     226}}}
     227
     228== Rte_CData ==
     229{{{
     230<return> Rte_CData_<name>([IN Rte_Instance <instance>])
     231}}}
     232
     233== Rte_Prm ==
     234{{{
     235<return> Rte_Prm_<p>_<o>([IN Rte_Instance <instance>])
     236}}}
     237
     238== Rte_IRead ==
     239{{{
     240<return> Rte_IRead_<re>_<p>_<o>([IN Rte_Instance])
     241}}}
     242
     243== Rte_IWrite ==
     244{{{
     245void Rte_IWrite_<re>_<p>_<o>([IN RTE_Instance], IN <data>)
     246}}}
     247
     248== Rte_IWriteRef ==
     249{{{
     250<return reference> Rte_IWriteRef_<re>_<p>_<o>([IN RTE_Instance])
     251}}}
     252
     253== Rte_IInvalidate ==
     254{{{
     255void Rte_IInvalidate_<re>_<p>_<o>([IN Rte_Instance <instance>])
     256}}}
     257
     258== Rte_IStatus ==
     259{{{
     260Std_ReturnType Rte_IStatus_<re>_<p>_<o>([IN Rte_Instance])
     261}}}
     262
     263== Rte_IrvIRead ==
     264{{{
     265<return> Rte_IrvIRead_<re>_<o>([IN RTE_Instance <instance>])
     266}}}
     267
     268== Rte_IrvIWrite ==
     269{{{
     270void Rte_IrvIWrite_<re>_<o>([IN RTE_Instance <instance>], IN <data>)
     271}}}
     272
     273== Rte_IrvRead ==
     274{{{
     275<return> Rte_IrvRead_<re>_<o>([IN RTE_Instance <instance>])
     276}}}
     277
     278== Rte_IrvWrite ==
     279{{{
     280void Rte_IrvWrite_<re>_<o>([IN RTE_Instance IN <data>)
     281}}}
     282
     283== Rte_Enter ==
     284{{{
     285void Rte_Enter_<name>([IN Rte_Instance <instance>])
     286}}}
     287
     288== Rte_Exit ==
     289{{{
     290void Rte_Exit_<name>([IN Rte_Instance <instance>])
     291}}}
     292
     293== Rte_Mode ==
     294{{{
     295<return> Rte_Mode_<p>_<o>([IN Rte_Instance <instance>])
     296<return> Rte_Mode_<p>_<o>([IN Rte_Instance <instance>,] OUT <previousmode>, OUT <nextmode>)
     297}}}
     298
     299== Rte_Trigger ==
     300{{{
     301void Rte_Trigger_<p>_<o>([IN Rte_Instance <instance>])
     302}}}
     303
     304== Rte_IrTrigger ==
     305{{{
     306void Rte_IrTrigger_<re>_<o>([IN Rte_Instance <instance>])
     307}}}
     308
     309== Rte_IFeedback ==
     310{{{
     311Std_ReturnType Rte_IFeedback_<re>_<p>_<o>([IN RTE_Instance <instance>])
     312}}}
     313
     314== Rte_IsUpdated ==
     315{{{
     316boolean Rte_IsUpdated_<p>_<o>([IN RTE_Instance <instance>])
     317}}}
     318
     319== Rte_Start ==
     320{{{
     321Std_ReturnType Rte_Start(void)
     322}}}
     323
     324== Rte_Stop ==
     325{{{
     326Std_ReturnType Rte_Stop(void)
     327}}}
     328
     329== Rte_PartitionTerminated ==
     330{{{
     331void Rte_PartitionTerminated_<PID>(void)
     332}}}
     333
     334== Rte_PartitionRestarting ==
     335{{{
     336void Rte_PartitionRestarting_<PID>(void)
     337}}}
     338
     339== Rte_RestartPartition ==
     340{{{
     341Std_ReturnType Rte_RestartPartition_<PID>(void)
     342}}}
    23343
    24344----
    25345
    26 = API仕様 =
    27 
    28 ----
    29 
    30346= コンフィギュレーション仕様 =
     347
     348== !RteGeneration ==
     349{{{
     350/AUTOSAR/EcucDefs/Rte/RteGeneration
     351}}}
     352* 型：Container
     353* 多重度：1
     354
     355== !RteCalibrationSupport ==
     356{{{
     357/AUTOSAR/EcucDefs/Rte/RteGeneration/RteCalibrationSupport
     358}}}
     359* 型：!EnumerationParam
     360* 多重度：1
     361
     362== !RteCodeVendorId ==
     363{{{
     364/AUTOSAR/EcucDefs/Rte/RteGeneration/RteCodeVendorId
     365}}}
     366* 型：!IntegerParam
     367* 多重度：1
     368
     369== !RteDevErrorDetect ==
     370{{{
     371/AUTOSAR/EcucDefs/Rte/RteGeneration/RteDevErrorDetect
     372}}}
     373* 型：!BooleanParam
     374* 多重度：1
     375
     376== !RteDevErrorDetectUninit ==
     377{{{
     378/AUTOSAR/EcucDefs/Rte/RteGeneration/RteDevErrorDetectUninit
     379}}}
     380* 型：!BooleanParam
     381* 多重度：1
     382
     383== !RteGenerationMode ==
     384{{{
     385/AUTOSAR/EcucDefs/Rte/RteGeneration/RteGenerationMode
     386}}}
     387* 型：!EnumerationParam
     388* 多重度：1
     389
     390== !RteIocInteractionReturnValue ==
     391{{{
     392/AUTOSAR/EcucDefs/Rte/RteGeneration/RteIocInteractionReturnValue
     393}}}
     394* 型：!EnumerationParam
     395* 多重度：1
     396
     397== !RteMeasurementSupport ==
     398{{{
     399/AUTOSAR/EcucDefs/Rte/RteGeneration/RteMeasurementSupport
     400}}}
     401* 型：!BooleanParam
     402* 多重度：1
     403
     404== !RteOptimizationMode ==
     405{{{
     406/AUTOSAR/EcucDefs/Rte/RteGeneration/RteOptimizationMode
     407}}}
     408* 型：!EnumerationParam
     409* 多重度：1
     410
     411== !RteToolChainSignificantCharacters ==
     412{{{
     413/AUTOSAR/EcucDefs/Rte/RteGeneration/RteToolChainSignificantCharacters
     414}}}
     415* 型：!IntegerParam
     416* 多重度：0..1
     417
     418== !RteValueRangeCheckEnabled ==
     419{{{
     420/AUTOSAR/EcucDefs/Rte/RteGeneration/RteValueRangeCheckEnabled
     421}}}
     422* 型：!BooleanParam
     423* 多重度：1
     424
     425== !RteVfbTraceClientPrefix ==
     426{{{
     427/AUTOSAR/EcucDefs/Rte/RteGeneration/RteVfbTraceClientPrefix
     428}}}
     429* 型：!LinkerSymbol
     430* 多重度：0..*
     431
     432== !RteVfbTraceEnabled ==
     433{{{
     434/AUTOSAR/EcucDefs/Rte/RteGeneration/RteVfbTraceEnabled
     435}}}
     436* 型：!BooleanParam
     437* 多重度：1
     438
     439== !RteVfbTraceFunction ==
     440{{{
     441/AUTOSAR/EcucDefs/Rte/RteGeneration/RteVfbTraceFunction
     442}}}
     443* 型：!FunctionName
     444* 多重度：0..*
     445
     446== !RteImplicitCommunication ==
     447{{{
     448/AUTOSAR/EcucDefs/Rte/RteImplicitCommunication
     449}}}
     450* 型：Container
     451* 多重度：0..*
     452
     453== !RteCoherentAccess ==
     454{{{
     455/AUTOSAR/EcucDefs/Rte/RteImplicitCommunication/RteCoherentAccess
     456}}}
     457* 型：!BooleanParam
     458* 多重度：1
     459
     460== !RteImmediateBufferUpdate ==
     461{{{
     462/AUTOSAR/EcucDefs/Rte/RteImplicitCommunication/RteImmediateBufferUpdate
     463}}}
     464* 型：!BooleanParam
     465* 多重度：1
     466
     467== !RteVariableReadAccessRef ==
     468{{{
     469/AUTOSAR/EcucDefs/Rte/RteImplicitCommunication/RteVariableReadAccessRef
     470}}}
     471* 型：Reference
     472* 多重度：0..*
     473
     474== !RteVariableWriteAccessRef ==
     475{{{
     476/AUTOSAR/EcucDefs/Rte/RteImplicitCommunication/RteVariableWriteAccessRef
     477}}}
     478* 型：Reference
     479* 多重度：0..*
     480
     481== !RteSoftwareComponentInstanceRef ==
     482{{{
     483/AUTOSAR/EcucDefs/Rte/RteImplicitCommunication/RteSoftwareComponentInstanceRef
     484}}}
     485* 型：Reference
     486* 多重度：1..*
     487
     488== !RteInitializationBehavior ==
     489{{{
     490/AUTOSAR/EcucDefs/Rte/RteInitializationBehavior
     491}}}
     492* 型：Container
     493* 多重度：1..*
     494
     495== !RteInitializationStrategy ==
     496{{{
     497/AUTOSAR/EcucDefs/Rte/RteInitializationBehavior/RteInitializationStrategy
     498}}}
     499* 型：!EnumerationParam
     500* 多重度：1
     501
     502== !RteSectionInitializationPolicy ==
     503{{{
     504/AUTOSAR/EcucDefs/Rte/RteInitializationBehavior/RteSectionInitializationPolicy
     505}}}
     506* 型：!StringParam
     507* 多重度：1..*
     508
     509== !RteOsInteraction ==
     510{{{
     511/AUTOSAR/EcucDefs/Rte/RteOsInteraction
     512}}}
     513* 型：Container
     514* 多重度：1..*
     515
     516== !RteModeToScheduleTableMapping ==
     517{{{
     518/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping
     519}}}
     520* 型：Container
     521* 多重度：0..*
     522
     523== !RteModeScheduleTableRef ==
     524{{{
     525/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping/RteModeScheduleTableRef
     526}}}
     527* 型：Reference
     528* 多重度：1
     529
     530== !RteModeSchtblMapModeDeclarationRef ==
     531{{{
     532/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping/RteModeSchtblMapModeDeclarationRef
     533}}}
     534* 型：Reference
     535* 多重度：1..*
     536
     537== !RteModeSchtblMapBsw ==
     538{{{
     539/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping/RteModeSchtblMapBsw
     540}}}
     541* 型：Container
     542* 多重度：0..1
     543
     544== !RteModeSchtblMapBswInstanceRef ==
     545{{{
     546/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping/RteModeSchtblMapBsw/RteModeSchtblMapBswInstanceRef
     547}}}
     548* 型：Reference
     549* 多重度：1
     550
     551== !RteModeSchtblMapBswProvidedModeGroupRef ==
     552{{{
     553/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping/RteModeSchtblMapBsw/RteModeSchtblMapBswProvidedModeGroupRef
     554}}}
     555* 型：Reference
     556* 多重度：1
     557
     558== !RteModeSchtblMapSwc ==
     559{{{
     560/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping/RteModeSchtblMapSwc
     561}}}
     562* 型：Container
     563* 多重度：0..1
     564
     565== !RteModeSchtblMapSwcInstanceRef ==
     566{{{
     567/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping/RteModeSchtblMapSwc/RteModeSchtblMapSwcInstanceRef
     568}}}
     569* 型：Reference
     570* 多重度：1
     571
     572== !RteModeSchtblMapSwcPortRef ==
     573{{{
     574/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteModeToScheduleTableMapping/RteModeSchtblMapSwc/RteModeSchtblMapSwcPortRef
     575}}}
     576* 型：Reference
     577* 多重度：1
     578
     579== !RteUsedOsActivation ==
     580{{{
     581/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteUsedOsActivation
     582}}}
     583* 型：Container
     584* 多重度：0..*
     585
     586== !RteExpectedActivationOffset ==
     587{{{
     588/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteUsedOsActivation/RteExpectedActivationOffset
     589}}}
     590* 型：!FloatParam
     591* 多重度：1
     592
     593== !RteExpectedTickDuration ==
     594{{{
     595/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteUsedOsActivation/RteExpectedTickDuration
     596}}}
     597* 型：!FloatParam
     598* 多重度：1
     599
     600== !RteActivationOsAlarmRef ==
     601{{{
     602/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteUsedOsActivation/RteActivationOsAlarmRef
     603}}}
     604* 型：Reference
     605* 多重度：0..1
     606
     607== !RteActivationOsSchTblRef ==
     608{{{
     609/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteUsedOsActivation/RteActivationOsSchTblRef
     610}}}
     611* 型：Reference
     612* 多重度：0..1
     613
     614== !RteActivationOsTaskRef ==
     615{{{
     616/AUTOSAR/EcucDefs/Rte/RteOsInteraction/RteUsedOsActivation/RteActivationOsTaskRef
     617}}}
     618* 型：Reference
     619* 多重度：0..1
     620
     621== !RtePostBuildVariantConfiguration ==
     622{{{
     623/AUTOSAR/EcucDefs/Rte/RtePostBuildVariantConfiguration
     624}}}
     625* 型：Container
     626* 多重度：1
     627
     628== !RtePostBuildUsedPredefinedVariant ==
     629{{{
     630/AUTOSAR/EcucDefs/Rte/RtePostBuildVariantConfiguration/RtePostBuildUsedPredefinedVariant
     631}}}
     632* 型：Reference
     633* 多重度：1..*
     634
     635== !RteSwComponentInstance ==
     636{{{
     637/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance
     638}}}
     639* 型：Container
     640* 多重度：0..*
     641
     642== !RteSoftwareComponentInstanceRef ==
     643{{{
     644/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteSoftwareComponentInstanceRef
     645}}}
     646* 型：Reference
     647* 多重度：0..1
     648
     649== !RteEventToTaskMapping ==
     650{{{
     651/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping
     652}}}
     653* 型：Container
     654* 多重度：0..*
     655
     656== !RteActivationOffset ==
     657{{{
     658/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteActivationOffset
     659}}}
     660* 型：!FloatParam
     661* 多重度：0..1
     662
     663== !RteImmediateRestart ==
     664{{{
     665/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteImmediateRestart
     666}}}
     667* 型：!BooleanParam
     668* 多重度：1
     669
     670== !RteOsSchedulePoint ==
     671{{{
     672/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteOsSchedulePoint
     673}}}
     674* 型：!EnumerationParam
     675* 多重度：0..1
     676
     677== !RtePositionInTask ==
     678{{{
     679/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RtePositionInTask
     680}}}
     681* 型：!IntegerParam
     682* 多重度：0..1
     683
     684== !RteMappedToTaskRef ==
     685{{{
     686/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteMappedToTaskRef
     687}}}
     688* 型：Reference
     689* 多重度：0..1
     690
     691== !RteUsedOsAlarmRef ==
     692{{{
     693/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteUsedOsAlarmRef
     694}}}
     695* 型：Reference
     696* 多重度：0..1
     697
     698== !RteUsedOsEventRef ==
     699{{{
     700/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteUsedOsEventRef
     701}}}
     702* 型：Reference
     703* 多重度：0..1
     704
     705== !RteUsedOsSchTblExpiryPointRef ==
     706{{{
     707/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteUsedOsSchTblExpiryPointRef
     708}}}
     709* 型：Reference
     710* 多重度：0..1
     711
     712== !RteVirtuallyMappedToTaskRef ==
     713{{{
     714/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteVirtuallyMappedToTaskRef
     715}}}
     716* 型：Reference
     717* 多重度：0..1
     718
     719== !RteEventRef ==
     720{{{
     721/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteEventToTaskMapping/RteEventRef
     722}}}
     723* 型：Reference
     724* 多重度：1
     725
     726== !RteExclusiveAreaImplementation ==
     727{{{
     728/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteExclusiveAreaImplementation
     729}}}
     730* 型：Container
     731* 多重度：0..*
     732
     733== !RteExclusiveAreaImplMechanism ==
     734{{{
     735/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteExclusiveAreaImplementation/RteExclusiveAreaImplMechanism
     736}}}
     737* 型：!EnumerationParam
     738* 多重度：1
     739
     740== !RteExclusiveAreaOsResourceRef ==
     741{{{
     742/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteExclusiveAreaImplementation/RteExclusiveAreaOsResourceRef
     743}}}
     744* 型：Reference
     745* 多重度：0..1
     746
     747== !RteExclusiveAreaRef ==
     748{{{
     749/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteExclusiveAreaImplementation/RteExclusiveAreaRef
     750}}}
     751* 型：Reference
     752* 多重度：1
     753
     754== !RteExternalTriggerConfig ==
     755{{{
     756/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteExternalTriggerConfig
     757}}}
     758* 型：Container
     759* 多重度：0..*
     760
     761== !RteTriggerSourceQueueLength ==
     762{{{
     763/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteExternalTriggerConfig/RteTriggerSourceQueueLength
     764}}}
     765* 型：!IntegerParam
     766* 多重度：1
     767
     768== !RteSwcTriggerSourceRef ==
     769{{{
     770/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteExternalTriggerConfig/RteSwcTriggerSourceRef
     771}}}
     772* 型：Reference
     773* 多重度：1
     774
     775== !RteInternalTriggerConfig ==
     776{{{
     777/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteInternalTriggerConfig
     778}}}
     779* 型：Container
     780* 多重度：0..*
     781
     782== !RteTriggerSourceQueueLength ==
     783{{{
     784/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteInternalTriggerConfig/RteTriggerSourceQueueLength
     785}}}
     786* 型：!IntegerParam
     787* 多重度：1
     788
     789== !RteSwcTriggerSourceRef ==
     790{{{
     791/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteInternalTriggerConfig/RteSwcTriggerSourceRef
     792}}}
     793* 型：Reference
     794* 多重度：1
     795
     796== !RteNvRamAllocation ==
     797{{{
     798/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteNvRamAllocation
     799}}}
     800* 型：Container
     801* 多重度：0..*
     802
     803== !RteNvmRamBlockLocationSymbol ==
     804{{{
     805/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteNvRamAllocation/RteNvmRamBlockLocationSymbol
     806}}}
     807* 型：!LinkerSymbol
     808* 多重度：0..1
     809
     810== !RteNvmRomBlockLocationSymbol ==
     811{{{
     812/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteNvRamAllocation/RteNvmRomBlockLocationSymbol
     813}}}
     814* 型：!LinkerSymbol
     815* 多重度：0..1
     816
     817== !RteSwNvRamMappingRef ==
     818{{{
     819/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteNvRamAllocation/RteSwNvRamMappingRef
     820}}}
     821* 型：Reference
     822* 多重度：1
     823
     824== !RteNvmBlockRef ==
     825{{{
     826/AUTOSAR/EcucDefs/Rte/RteSwComponentInstance/RteNvRamAllocation/RteNvmBlockRef
     827}}}
     828* 型：Reference
     829* 多重度：1
     830
     831== !RteSwComponentType ==
     832{{{
     833/AUTOSAR/EcucDefs/Rte/RteSwComponentType
     834}}}
     835* 型：Container
     836* 多重度：0..*
     837
     838== !RteComponentTypeRef ==
     839{{{
     840/AUTOSAR/EcucDefs/Rte/RteSwComponentType/RteComponentTypeRef
     841}}}
     842* 型：Reference
     843* 多重度：1
     844
     845== !RteImplementationRef ==
     846{{{
     847/AUTOSAR/EcucDefs/Rte/RteSwComponentType/RteImplementationRef
     848}}}
     849* 型：Reference
     850* 多重度：0..1
     851
     852== !RteComponentTypeCalibration ==
     853{{{
     854/AUTOSAR/EcucDefs/Rte/RteSwComponentType/RteComponentTypeCalibration
     855}}}
     856* 型：Container
     857* 多重度：0..1
     858
     859== !RteCalibrationSupportEnabled ==
     860{{{
     861/AUTOSAR/EcucDefs/Rte/RteSwComponentType/RteComponentTypeCalibration/RteCalibrationSupportEnabled
     862}}}
     863* 型：!BooleanParam
     864* 多重度：1
     865
     866== !RteCalibrationSwAddrMethodRef ==
     867{{{
     868/AUTOSAR/EcucDefs/Rte/RteSwComponentType/RteComponentTypeCalibration/RteCalibrationSwAddrMethodRef
     869}}}
     870* 型：Reference
     871* 多重度：0..*
     872
     873