/*
 *  @(#) $Id$
 */

/*
 *  LWIPミドルウェアのコンフィギュレーションファイル
 */

#include "lwip.h"


CRE_TSK(LWIP_TASK_1, { TA_NULL, 0, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });
CRE_TSK(LWIP_TASK_2, { TA_NULL, 1, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });
CRE_TSK(LWIP_TASK_3, { TA_NULL, 2, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });
CRE_TSK(LWIP_TASK_4, { TA_NULL, 3, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });
CRE_TSK(LWIP_TASK_5, { TA_NULL, 4, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });
CRE_TSK(LWIP_TASK_6, { TA_NULL, 5, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });
CRE_TSK(LWIP_TASK_7, { TA_NULL, 6, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });
CRE_TSK(LWIP_TASK_8, { TA_NULL, 7, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });
CRE_TSK(LWIP_TASK_N, { TA_NULL, 8, lwip_task, LWIP_DEFAULT_PRIORITY, LWIP_STACK_SIZE, NULL });

CRE_SEM(LWIP_PROTECT,  { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_THREAD,   { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_SNPRINTF, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_1, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_2, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_3, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_4, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_5, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_6, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_7, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_8, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_9, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_10, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_11, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_12, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_13, { TA_TPRI, 1, 1 });
CRE_SEM(LWIP_LOCK_N, { TA_TPRI, 1, 1 });

CRE_SEM(LWIP0_SEM_1, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_2, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_3, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_4, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_5, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_6, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_7, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_8, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_9, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_10, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_11, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_12, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_13, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_14, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_15, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_16, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_17, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_18, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_19, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_20, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_21, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_22, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_23, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_24, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_25, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_26, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_27, { TA_TPRI, 0, 1 });
CRE_SEM(LWIP0_SEM_N, { TA_TPRI, 0, 1 });