Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_design.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_design.txt	(revision 302)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_design.txt	(revision 306)
@@ -3,7 +3,60 @@
 		ARMã³ã¢ä¾å­é¨ è¨­è¨ã¡ã¢
 
-		å¯¾å¿ãã¼ã¸ã§ã³: Release 3.B.0
-		æçµæ´æ°: 2015å¹´8æ18æ¥
-
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 3.1.0
+		æçµæ´æ°: 2016å¹´5æ14æ¥
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2014-2016 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: arm_design.txt 751 2016-05-14 15:03:06Z ertl-hiro $
 ----------------------------------------------------------------------
 
@@ -55,5 +108,8 @@
 ARMv7-Aï¼ARMv7-Rã«æºæ ãããã­ã»ããµã³ã¢ãæã¤ã¿ã¼ã²ããã·ã¹ãã ï¼ãã
 ãï¼ã«å
-±éã«ä½¿ç¨ã§ããé¨åã§ããï¼
+±éã«ä½¿ç¨ã§ããé¨åã§ããï¼ãã ãï¼ããã«è©²å½ãããã¹ã¦ã®ARMã³ã¢
+ã«å¯¾å¿ã§ãã¦ããããã§ã¯ãªãï¼æ°ãããããã«ãã¼ãã£ã³ã°ããéã«ã¯ï¼ã³
+ã¢ä¾å­é¨ã«ä½ããã®ä¿®æ­£ãå¿
+è¦ã«ãªããã¨ãå¤ãã¨æãããï¼
 
 ARMã³ã¢ã®ãã­ã»ããµã³ã¢ç¥ç§°ã"arm"ã¨ããï¼GNUéçºç°å¢åãã®ARMã³ã¢ä¾å­
@@ -284,11 +340,12 @@
 ã®cpsrãspsrã«å¾©å¸° */
 	msr		spsr_cxsf, r0
-	ldmfd	sp!, {r0-r4,r12,lr,pc}^		/* ä¾å¤å¦çããã®å¾©å¸° */
-----------------------------------------
-
-ããã§ï¼ã¹ã¯ã©ããã¬ã¸ã¹ã¿ã«å ãã¦r4ãå¾©å¸°ãã¦ããã®ã¯ï¼ä¾å¤ã®åºå
-¥å£å¦
-çã§ã¹ã¯ã©ããã¬ã¸ã¹ã¿ä»¥å¤ã«ä½¿ããã¬ã¸ã¹ã¿ã¨ãã¦ï¼r4ãç¢ºä¿ããããã§ã
-ãï¼
+	ldmfd	sp!, {r0-r5,r12,lr,pc}^		/* ä¾å¤å¦çããã®å¾©å¸° */
+----------------------------------------
+
+ããã§ï¼ã¹ã¯ã©ããã¬ã¸ã¹ã¿ã«å ãã¦r4ã¨r5ãå¾©å¸°ãã¦ããã®ã¯ï¼ä¾å¤ã®åºå
+¥
+å£å¦çã§ã¹ã¯ã©ããã¬ã¸ã¹ã¿ä»¥å¤ã«ä½¿ããã¬ã¸ã¹ã¿ã¨ãã¦ï¼r4ã¨r5ãç¢ºä¿ãã
+ããã§ããï¼å®éã«ã¯ï¼r4ã ããä½¿ããã°ååã§ãããï¼ã¹ã¿ãã¯ãã¤ã³ã¿ã
+8ãã¤ãå¢çã«ã¢ã©ã¤ã³ããããã«r5ãä¿å­ï¼å¾©å¸°ãã¦ããï¼ï¼
 
 ãã®åºå£ãå®è¡ããæç¹ã§ï¼ã¹ã¿ãã¯ã¯æ¬¡ã®ããã«ãªã£ã¦ããå¿
@@ -310,10 +367,12 @@
 	|       r4       |
 	+----------------+ <- sp+0x18
+	|       r5       |
+	+----------------+ <- sp+0x1c
 	|       r12      |
-	+----------------+ <- sp+0x1c
+	+----------------+ <- sp+0x20
 	|       lr       |
-	+----------------+ <- sp+0x20
+	+----------------+ <- sp+0x24
 	|    æ»ãçªå°    |
-	+----------------+
+	+----------------+ <- sp+0x28
 
 ããã«å¯¾å¿ããä¾å¤ã®å
@@ -325,5 +384,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_IRQ_BIT)
-	stmfd	sp!, {r0-r4,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */	(*1)
+	stmfd	sp!, {r0-r5,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */	(*1)
 
 	/*
@@ -339,5 +398,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_IRQ_BIT)
-	str		r2, [sp,#0x1c]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */		(*2)
+	str		r2, [sp,#0x20]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */		(*2)
 	push	{r1}					/* spsrãã¹ã¿ãã¯ã«ä¿å­ */
 ----------------------------------------
@@ -346,6 +405,6 @@
 ãï¼ãã®æç¹ã§ä¿å­ããpcã®å¤ã¯ä½¿ããªãï¼(*2)ã§ï¼ç¢ºä¿ããã¹ãã¼ã¹ã«æ»ã
 çªå°ãæ ¼ç´ããï¼æ ¼ç´å
-ã[sp,#0x1c]ã¨ããã®ã¯ï¼ãã®æç¹ã§ã¯spã¯ä¸ã®å³ã®
-ï¼sp+0x04ï¼ãæãã¦ããï¼æ»ãçªå°ã¯ï¼sp+0x20ï¼ã«æ ¼ç´ãããããã§ããï¼
+ã[sp,#0x20]ã¨ããã®ã¯ï¼ãã®æç¹ã§ã¯spã¯ä¸ã®å³ã®
+ï¼sp+0x04ï¼ãæãã¦ããï¼æ»ãçªå°ã¯ï¼sp+0x24ï¼ã«æ ¼ç´ãããããã§ããï¼
 
 ä¾å¤ãåãä»ããã¨Iããããã»ããããããï¼ä¾å¤ã®å
@@ -393,12 +452,13 @@
 
 ----------------------------------------
-	ldmfd	sp!, {r0-r4,r12,lr}
+	ldmfd	sp!, {r0-r5,r12,lr}
 	rfefd	sp!
 ----------------------------------------
 
-ããã§ï¼ã¹ã¯ã©ããã¬ã¸ã¹ã¿ã«å ãã¦r4ãå¾©å¸°ãã¦ããã®ã¯ï¼ä¾å¤ã®åºå
-¥å£å¦
-çã§ã¹ã¯ã©ããã¬ã¸ã¹ã¿ä»¥å¤ã«ä½¿ããã¬ã¸ã¹ã¿ã¨ãã¦ï¼r4ãç¢ºä¿ããããã§ã
-ãï¼
+ããã§ï¼ã¹ã¯ã©ããã¬ã¸ã¹ã¿ã«å ãã¦r4ã¨r5ãå¾©å¸°ãã¦ããã®ã¯ï¼ä¾å¤ã®åºå
+¥
+å£å¦çã§ã¹ã¯ã©ããã¬ã¸ã¹ã¿ä»¥å¤ã«ä½¿ããã¬ã¸ã¹ã¿ã¨ãã¦ï¼r4ã¨r5ãç¢ºä¿ãã
+ããã§ããï¼å®éã«ã¯ï¼r4ã ããä½¿ããã°ååã§ãããï¼ã¹ã¿ãã¯ãã¤ã³ã¿ã
+8ãã¤ãå¢çã«ã¢ã©ã¤ã³ããããã«r5ãä¿å­ï¼å¾©å¸°ãã¦ããï¼ï¼
 
 ãã®åºå£ãå®è¡ããæç¹ã§ï¼ã¹ã¿ãã¯ã¯æ¬¡ã®ããã«ãªã£ã¦ããå¿
@@ -418,12 +478,14 @@
 	|       r4       |
 	+----------------+ <- sp+0x14
+	|       r5       |
+	+----------------+ <- sp+0x18
 	|       r12      |
-	+----------------+ <- sp+0x18
+	+----------------+ <- sp+0x1c
 	|       lr       |
-	+----------------+ <- sp+0x1c
+	+----------------+ <- sp+0x20
 	|    æ»ãçªå°    |
-	+----------------+ <- sp+0x20
+	+----------------+ <- sp+0x24
 	|      cpsr      |
-	+----------------+
+	+----------------+ <- sp+0x28
 
 ããã«å¯¾å¿ããä¾å¤ã®å
@@ -443,5 +505,5 @@
 	 */
 	cps		#CPSR_SVC_MODE
-	stmfd	sp!, {r0-r4,r12,lr}
+	stmfd	sp!, {r0-r5,r12,lr}
 ----------------------------------------
 
@@ -585,11 +647,18 @@
 ä¸­ã§å¿
 è¦ãªæ
-å ±ï¼ä¾ãã°ï¼å²è¾¼ã¿çªå·ï¼ã¯ï¼irc_begin_intã§ã¹ã¿ãã¯ä¸ã«ä¿å­
-ãã¦ããå¿
-è¦ãããï¼ãããå¯è½ã«ããããã«ï¼irc_begin_intãå¼ã³åºããã
-ãï¼irc_end_intãå¿
-ãå¼ã³åºãããããã«ãã¦ããï¼ã¹ããªã¢ã¹å²è¾¼ã¿ã®å ´å
-ã«ãï¼irc_end_intãå¼ã³åºãããã«ãã¦ããï¼
-
+å ±ï¼ä¾ãã°ï¼å²è¾¼ã¿çªå·ï¼ã¯ï¼irc_begin_intã§ã¹ã¿ãã¯ã®å
+é ­ã«
+ä¿å­ãã¦ããå¿
+è¦ãããï¼ããã«ç¨ããããã«ï¼ã¹ã¿ãã¯ã®å
+é ­ã«1ã¯ã¼ãã®ç©º
+ãé åãè¨­ãã¦ããï¼
+
+irc_end_intã§å¿
+è¦ãªæ
+å ±ã1ã¯ã¼ãã§ä¸è¶³ããå ´åã«ã¯ï¼irc_begin_intã§ã¹ã¿ã
+ã¯ã«ç©ã¿ï¼irc_end_intã§ã¹ã¿ãã¯ããåãåºãï¼ãããå¯è½ã«ããããã«ï¼
+irc_begin_intãå¼ã³åºããããï¼irc_end_intãå¿
+ãå¼ã³åºãããããã«ãã¦
+ããï¼ã¹ããªã¢ã¹å²è¾¼ã¿ã®å ´åã«ãï¼irc_end_intãå¼ã³åºãããã«ãã¦ããï¼
 ãµãã«ã¼ãã³ï¼irc_begin_intï¼ã®ä¸­ã§ã¹ã¿ãã¯ã«ç©ã¿å¢ãã®ã¯ï¼ä¸è¬ã«ã¯æ¡ç¨
 ããªããã­ã°ã©ãã³ã°ææ³ã§ãããï¼irc_begin_intããirc_end_intã«æ¸¡ãæ
@@ -894,10 +963,5 @@
 å ±ãè¨æ¶ãã¦ããé åã®å
 é ­çªå°ãç¬¬1ãã©ã¡ã¼ã¿ï¼CPUä¾å¤ãã³ã
-ã©çªå·ãç¬¬2ãã©ã¡ã¼ã¿ã¨ãã¦å¼ã³åºãï¼r12ã«ä¿å­ããã¦ããCPUä¾å¤ã®æ
-å ±ã
-è¨æ¶ãã¦ããé åã®å
-é ­çªå°ãä¿å­ãããããã«ï¼å¿
-è¦ã«å¿ãã¦ï¼ã¹ã¿ãã¯ã«
-ä¿å­ããï¼
+ã©çªå·ãç¬¬2ãã©ã¡ã¼ã¿ã¨ãã¦å¼ã³åºãï¼
 
 ----------------------------------------
@@ -919,7 +983,7 @@
 ã¯ã«æ»ãï¼ãã®å¾ï¼CPUä¾å¤ãçºçããç¶æ³ãå¤æ­ããããã®è¿½å æ
 å ±ãã¹ã¿ã
-ã¯ä¸ããæ¨ã¦ãï¼ä¾å¤ãã¹ãã«ã¦ã³ãã0ã«ãªã£ãå ´åã®å¦çã¯ï¼å²è¾¼ã¿ãã³ã
-ã©ã®åºå£å¦çã¨å
-±éã§ããããï¼ret_int_1ã«åå²ããï¼
+ã¯ä¸ããæ¨ã¦ãï¼ä¾å¤ãã¹ãã«ã¦ã³ãã0ã«ãªã£ãå ´åã®å¦çã¯ï¼è¿½å æ
+å ±ãã¹
+ã¿ãã¯ä¸ããæ¨ã¦ããã¨ä»¥å¤ã¯ï¼å²è¾¼ã¿ãã³ãã©ã®åºå£å¦çã¨åæ§ã§ããï¼
 
 ----------------------------------------
@@ -957,9 +1021,4 @@
 #endif /* TOPPERS_SUPPORT_OVRHDR */
 		}
-----------------------------------------
-
-ä»¥ä¸ã®å¦çã«ã¯ï¼å²è¾¼ã¿ãã³ãã©ã®åºå£å¦çã®ã«ã¼ãã³ãæµç¨ããï¼
-
-----------------------------------------
 		CPUä¾å¤å¦çããã®ãªã¿ã¼ã³å¾ã«ï¼CPUã­ãã¯è§£é¤ç¶æ
 ã«æ»ãããã«æºåãã
@@ -972,6 +1031,4 @@
 ----------------------------------------
 
-ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãå¾©å¸°ããå¾ï¼ä¾å¤ãããªã¿ã¼ã³ããï¼
-
 âã¹ã¿ãã¯ãã¤ã³ã¿ãä¸æ­£ã®å ´åã®å¯¾ç­
 
Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_memo.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_memo.txt	(revision 302)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_memo.txt	(revision 306)
@@ -82,4 +82,5 @@
 	- ç©çã¡ã¢ãªã·ã¹ãã ã¢ã¼ã­ãã¯ãã£ï¼PMSAï¼ã§ã®ã¬ã¸ã¹ã¿
 	- ããã©ã¼ãã³ã¹ã¢ãã¿ã¬ã¸ã¹ã¿
+ã»ãã®ä»ï¼åå¿é²ï¼
 
 âåèæç®
@@ -651,5 +652,5 @@
 ã»ARMv7-Aï¼VMSAï¼ã«ãããã­ã£ãã·ã¥ã»åå²äºæ¸¬ã¡ã³ããã³ã¹æä½
 	- ICIALLIS, ICIALLU, ICIMVAU â¦ å½ä»¤ã­ã£ãã·ã¥ã¨åå²äºæ¸¬ã®ç¡å¹å
-	- BPIALLIS, CPIALL, CPIMVA	â¦ åå²äºæ¸¬ã®ç¡å¹å
+	- BPIALLIS, BPIALL, BPIMVA	â¦ åå²äºæ¸¬ã®ç¡å¹å
 	- DCIMVAC, DCISW			â¦ ãã¼ã¿ï¼çµ±åã­ã£ãã·ã¥ã®ç¡å¹å
 	- DCCMVAC, DCCSW, DCCMVAU	â¦ ãã¼ã¿ï¼çµ±åã­ã£ãã·ã¥ã®ã¯ãªã¼ã³
@@ -1322,3 +1323,12 @@
 âããã©ã¼ãã³ã¹ã¢ãã¿ã¬ã¸ã¹ã¿
 
+âãã®ä»ï¼åå¿é²ï¼
+
+âã¹ã¿ãã¯ã®ã¢ã©ã¤ã³ã¡ã³ã
+
+ARMã¢ã¼ã­ãã¯ãã£åããã­ã·ã¼ã¸ã£ã³ã¼ã«æ¨æºï¼AAPCSï¼ã§ã¯ï¼ãã¹ã¦ã®å¤é¨
+ã¤ã³ã¿ãã§ã¼ã¹ã«ããã¦ï¼ã¹ã¿ãã¯ãã¤ã³ã¿ã8ãã¤ãå¢çã§ã¢ã©ã¤ã³ããå¿
+è¦
+ãããã
+
 ä»¥ä¸
Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_user.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_user.txt	(revision 306)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_user.txt	(revision 306)
@@ -0,0 +1,617 @@
+
+		TOPPERS/ASP3ã«ã¼ãã«
+		ARMä¾å­é¨ ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«
+
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 3.1
+		æçµæ´æ°: 2016å¹´4æ3æ¥
+
+ãã®ãã­ã¥ã¡ã³ãã¯ï¼TOPPERS/ASP3ã«ã¼ãã«ã®ARMä¾å­é¨ãä½¿ç¨ããããã«å¿
+è¦
+ãªäºé 
+ãèª¬æãããã®ã§ããï¼
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2014-2016 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
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+ $Id: arm_user.txt 752 2016-05-14 15:06:22Z ertl-hiro $
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+æ°ã§ãªããã°ãªããªãï¼åºå®é·ã¡ã¢ãªãã¼ã«é åã®å
+é ­çªå°ã¯ï¼4ã®åæ°ã§ãªã
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+å²è¾¼ã¿ãã³ãã©ã®å
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+ã³ã³ãã£ã®ã¥ã¬ã¼ã¿ã«ãã£ã¦æ¤åºãããï¼
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+ããã«å¯¾ãã¦ï¼å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³ã®å
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+ããæ¹æ³ãæ¨æºã«ãã¦ããï¼ãã®ããï¼åççææ©è½æ¡å¼µãä½¿ç¨ããå ´åã«ã¯ï¼
+TLSFã®ããã±ã¼ã¸ã«å«ã¾ããtlsf.hã¨tlsf.cãï¼ã«ã¼ãã«ããã«ããããã£ã¬
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+è¦ãããï¼
+
+----------------------------------------
+KERNEL_COBJS := $(KERNEL_COBJS) tlsf.o
+----------------------------------------
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+ãªãï¼TLSFï¼åä½ç¢ºèªã¯ï¼Version 2.4.6ï¼ã¯ï¼ä»¥ä¸ã®ã¦ã§ããµã¤ããããã¦ã³
+ã­ã¼ããããã¨ãã§ããï¼
+
+	http://www.gii.upv.es/tlsf/
+
+
+ï¼ï¼ä½¿ç¨ä¸ã®æ³¨æã¨ãã³ã
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+MMUãæã¤ãããã§ã¯ï¼MMUãä½¿ç¨ããªãã¨ã­ã£ãã·ã¥ãä½¿ç¨ãããã¨ãã§ããª
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+æå¹ãªã¢ãã¬ã¹ã®ç¯å²ã¨ï¼åã¢ãã¬ã¹ç¯å²ã«ãããMMUã¸ã®è¨­å®å±æ§ï¼è¨±å¯ãã
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+å­é¨ãä½¿ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®è¨­å®ã¨ãªãï¼
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+ã«åºåãããä»¥ä¸ã§ã¯ï¼CPUä¾å¤ã®ç¨®é¡æ¯ã«ï¼CPUä¾å¤ã®åå ãè¿½åããæ¹æ³ã«
+ã¤ãã¦èª¬æããã
+
+(1) æªå®ç¾©å½ä»¤ä¾å¤
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+ã·ã¹ãã ã­ã°ã«åºåããããã­ã°ã©ã ã«ã¦ã³ã¿ï¼pcï¼ã®å¤ã¯ï¼æªå®ç¾©å½ä»¤ã®æ¬¡
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+ã·ã¹ãã ã­ã°ã«åºåããããã­ã°ã©ã ã«ã¦ã³ã¿ï¼pcï¼ã®å¤ã¯ï¼svcå½ä»¤ã®æ¬¡ã®å½
+ä»¤ã®çªå°ã§ããããã®æåã«ããsvcå½ä»¤ãå®è¡ãããã¨ãï¼CPUä¾å¤ã®åå ã§
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+(3) ããªãã§ããã¢ãã¼ã
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+ã·ã¹ãã ã­ã°ã«åºåããããã­ã°ã©ã ã«ã¦ã³ã¿ï¼pcï¼ã®å¤ã¯ï¼(ã¢ãã¼ãããã
+å½ä»¤ãã§ããã®çªå°+4)ã§ããã
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+ããªãã§ããã¢ãã¼ãã¯ï¼ä¸æ­£ãªçªå°ã¸ã®åå²ã«ãã£ã¦èµ·ããã®ãä¸è¬çã§ã
+ããï¼ãã®å ´åï¼ãã­ã°ã©ã ã«ã¦ã³ã¿ã®å¤ã¯ï¼(åå²å
+ã®çªå°+4)ã¨ãªããCPUä¾
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+ãç¥ãæ¹æ³ã¯ãªãããã ãï¼é¢æ°å¼åºãã«ããåå²ã®å ´åã«ã¯ï¼ãªã³ã¯ã¬
+ã¸ã¹ã¿ï¼lrï¼ã«æ»ãçªå°ãä¿å­ãããããï¼ãªã³ã¯ã¬ã¸ã¹ã¿ãæãå½ä»¤ã®æå
+ã®åå²å½ä»¤ãï¼CPUä¾å¤ã®åå ã¨ãããã¨ã«ãªãã
+
+ããªãã§ããã¢ãã¼ãçºçã®è©³ããç¶æ³ã¯ï¼ARMv7ã§ã¯ï¼CP15ã®
+IFSRï¼Instruction Fault Status Registerï¼ãIFARï¼Instruction Fault
+Address Registerï¼ãèª­ã¿åºããã¨ãå¿
+è¦ã§ããã
+
+(4) ãã¼ã¿ã¢ãã¼ã
+
+ã·ã¹ãã ã­ã°ã«åºåããããã­ã°ã©ã ã«ã¦ã³ã¿ï¼pcï¼ã®å¤ã¯ï¼(ãã¼ã¿ã¢ãã¼ã
+ãèµ·ãããå½ä»¤çªå°+8)ã§ããã(ãã­ã°ã©ã ã«ã¦ã³ã¿ã®å¤-8)ã®çªå°ã«ããå½ä»¤
+ãå®è¡ãããã¨ãï¼CPUä¾å¤ã®åå ã§ããã
+
+ç¹æ®ãªç¶æ³ã¨ãã¦ï¼CPUä¾å¤ãã«ã¼ãã«å
+ï¼dabort_handlerå
+ã§ãããã¨ãä¸è¬
+çï¼ã§çºçãï¼ã·ã¹ãã ã­ã°ã«åºåãããnest_countãç°å¸¸ãªå¤ï¼INT32_MINè¿
+è¾ºã®å¤ï¼ã«ãªã£ã¦ããå ´åããããããã¯ï¼ã¹ã¿ãã¯ãã¤ã³ã¿ãä¸æ­£ãªå¤ã«ãªã£
+ãç¶æ
+ã§CPUä¾å¤ãçºçãï¼ã«ã¼ãã«å
+ã§å¿
+è¦ãªæ
+å ±ãã¹ã¿ãã¯ã«ä¿å­ãããã¨
+ãã¦ååº¦CPUä¾å¤ãçºçããç¶æ³ã§ããããã®å ´åï¼CPUä¾å¤ãèµ·ãã£ãç¶æ³ã
+ä¿å­ããã¦ããªãããï¼CPUä¾å¤ã®åå ã®è¿½åã¯é£ããã
+
+ãã¼ã¿ã¢ãã¼ãçºçã®è©³ããç¶æ³ã¯ï¼CP15ã®DFSRï¼Data Fault Status
+Registerï¼ãDFARï¼Data Fault Address Registerï¼ARMv6ä»¥åã¯FARã®åç§°ï¼
+ARMv6ããåã¯IFARã¨çµ±åããã¦ããï¼ãèª­ã¿åºããã¨ãå¿
+è¦ã§ããã
+
+(5) ã¢ãã¼ãçºçã®ç¶æ³
+
+ARMv7ã§ã¯ï¼ä»¥ä¸ã®ã¬ã¸ã¹ã¿ãç¨æããã¦ããã
+
+	DFSRï¼Instruction Fault Status Registerï¼	cp15 c5 0 c0 0
+	DFARï¼Instruction Fault Address Registerï¼	cp15 c6 0 c0 0
+	IFSRï¼Instruction Fault Status Registerï¼	cp15 c5 0 c0 1
+	IFARï¼Instruction Fault Address Registerï¼	cp15 c6 0 c0 2
+
+ARMv6ã¯ï¼ARMv6ã®æã¤4ã¤ã®ã¬ã¸ã¹ã¿å
+ï¼IFARã¯ãªãã·ã§ã³ã§ãããã¾ãï¼
+DFARã¯FARï¼Fault Address Registerï¼ã¨å¼ã°ãã¦ããã
+
+ARMv5ä»¥åã¯ï¼ä»¥ä¸ã®ã¬ã¸ã¹ã¿ãç¨æããã¦ããã
+
+	FSRï¼Fault Status Registerï¼	cp15 c5 0 c0 0
+	FARï¼Fault Address Registerï¼	cp15 c6 0 c0 0
+
+3.3 ããã©ã¼ãã³ã¹ã¢ãã¿ã«ããæ§è½è©ä¾¡
+
+ARMv7ã«æºæ ããããã©ã¼ãã³ã¹ã¢ãã¿ãæã¤ã¿ã¼ã²ããã·ã¹ãã ã§ã¯ï¼
+USE_ARM_PM_HISTãå®ç¾©ãã¦ã³ã³ãã¤ã«ãããã¨ã§ï¼å®è¡æéåå¸éè¨ãµã¼ãã¹
+ã«ããã¦ï¼ããã©ã¼ãã³ã¹ã¢ãã¿ãç¨ãã¦å®è¡æéãè¨æ¸¬ããï¼å®è¡æéã®è¨
+æ¸¬åä½ã¯ï¼0.1ãã¤ã¯ã­ç§ã¨ãã¦ããï¼
+
+
+ï¼ï¼ãªãã¡ã¬ã³ã¹
+
+4.1 ãã£ã¬ã¯ããªæ§æã»ãã¡ã¤ã«æ§æ
+
+	arm_gcc/
+		MANIFEST				åå¥ããã±ã¼ã¸ã®ãã¡ã¤ã«ãªã¹ã
+
+	arm_gcc/common/
+		Makefile.core			Makefileã®ã³ã¢ä¾å­é¨
+		arm.c					ã³ã¢ã®ãã¼ãã¦ã§ã¢è³æºã®æä½
+		arm.h					ã³ã¢ã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+		arm_insn.h				ã³ã¢ç¬èªã®å½ä»¤ã®å®è¡
+		core_asm.inc			ã¢ã»ã³ãã©è¨è¿°ã®ããã®ãã¯ã­
+		core_cfg1_out.h			cfg1_out.cã®ãªã³ã¯ã«å¿
+è¦ãªã¹ã¿ãã®å®ç¾©
+		core_check.trb			kernel_check.trbã®ã³ã¢ä¾å­é¨
+		core_kernel.h			kernel.hã®ã³ã¢ä¾å­é¨
+		core_kernel.trb			kernel.trbã®ã³ã¢ä¾å­é¨
+		core_kernel_impl.c		ã«ã¼ãã«å®è£
+ã®ã³ã¢ä¾å­é¨é¢é£ã®å®ç¾©
+		core_kernel_impl.h		ã«ã¼ãã«å®è£
+ã®ã³ã¢ä¾å­é¨
+		core_offset.trb			genoffset.trbã®ã³ã¢ä¾å­é¨
+		core_rename.def			ã³ã¢ä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã å®ç¾©
+		core_rename.h			ã³ã¢ä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã 
+		core_sil.h				sil.hã®ã³ã¢ä¾å­é¨
+		core_stddef.h			t_stddef.hã®ã³ã¢ä¾å­é¨
+		core_support.S			ã«ã¼ãã«å®è£
+ã®ã³ã¢ä¾å­é¨ï¼ã¢ã»ã³ããªè¨èª
+								ã§è¨è¿°ããé¨åï¼
+ 		core_sym.def			kernel_sym.defã®ã³ã¢ä¾å­é¨
+		core_syssvc.h			ã·ã¹ãã ãµã¼ãã¹ã®ã³ã¢ä¾å­å®ç¾©
+		core_test.h				ãã¹ããã­ã°ã©ã ã®ã³ã¢ä¾å­å®ç¾©
+		core_unrename.h			ã³ã¢ä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã è§£é¤
+		gic_kernel_impl.c		ã«ã¼ãã«å®è£
+ã®GICä¾å­é¨é¢é£ã®å®ç¾©
+		gic_kernel_impl.h		ã«ã¼ãã«å®è£
+ã®GICä¾å­é¨
+		gic_support.S			ã«ã¼ãã«å®è£
+ã®GICä¾å­é¨é¢é£ï¼ã¢ã»ã³ããªè¨
+								èªã§è¨è¿°ããé¨åï¼
+		pl310.c					L2ã­ã£ãã·ã¥ã³ã³ãã­ã¼ã©ï¼PL310ï¼ã®æä½ã©ã¤
+								ãã©ãª
+		pl310.h					L2ã­ã£ãã·ã¥ã³ã³ãã­ã¼ã©ï¼PL310ï¼ã«é¢ããå®ç¾©
+		sp804.h					ARM Dual-Timer Moduleï¼SP804ï¼ã«é¢ããå®ç¾©
+		start.S					ã«ã¼ãã«ç¨ã®ã¹ã¿ã¼ãã¢ããã¢ã¸ã¥ã¼ã«ï¼ARMç¨ï¼
+		tUartPL011.c			ARM PrimCell UARTï¼PL011ï¼ç¨ ç°¡æSIOãã©ã¤ã
+		tUartPL011.cdl			ARM PrimCell UARTï¼PL011ï¼ç¨ ç°¡æSIOãã©ã¤
+								ãã®ã³ã³ãã¼ãã³ãè¨è¿°
+		uart_pl011.h			ARM PrimCell UARTï¼PL011ï¼ã«é¢ããå®ç¾©
+
+	arm_gcc/mpcore/
+		MANIFEST				MPCoreä¾å­é¨ã®ãã¡ã¤ã«ãªã¹ã
+		Makefile.chip			Makefileã®ãããä¾å­é¨
+		chip_kernel.h			kernel.hã®ãããä¾å­é¨
+		chip_kernel_impl.c		ã«ã¼ãã«å®è£
+ã®ãããä¾å­é¨é¢é£ã®å®ç¾©
+		chip_kernel_impl.h		ã«ã¼ãã«å®è£
+ã®ãããä¾å­é¨
+		chip_rename.def			ãããä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã å®ç¾©
+		chip_rename.h			ãããä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã 
+		chip_stddef.h			t_stddef.hã®ãããä¾å­é¨
+		chip_timer.c			ã¿ã¤ããã©ã¤ã
+		chip_timer.cfg			ã¿ã¤ããã©ã¤ãã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+		chip_timer.h			ã¿ã¤ããã©ã¤ããä½¿ç¨ããããã®å®ç¾©
+		chip_unrename.h			ãããä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã è§£é¤
+		mpcore.h				ãããã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+
+	arm_gcc/rza1/
+		MANIFEST				RZ/A1ä¾å­é¨ã®ãã¡ã¤ã«ãªã¹ã
+		Makefile.chip			Makefileã®ãããä¾å­é¨
+		chip_kernel.h			kernel.hã®ãããä¾å­é¨
+		chip_kernel.trb			kernel.trbã®ãããä¾å­é¨
+		chip_kernel_impl.c		ã«ã¼ãã«å®è£
+ã®ãããä¾å­é¨é¢é£ã®å®ç¾©
+		chip_kernel_impl.h		ã«ã¼ãã«å®è£
+ã®ãããä¾å­é¨
+		chip_rename.def			ãããä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã å®ç¾©
+		chip_rename.h			ãããä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã 
+		chip_stddef.h			t_stddef.hã®ãããä¾å­é¨
+		chip_sym.def			kernel_sym.defã®ãããä¾å­é¨
+		chip_timer.c			ã¿ã¤ããã©ã¤ã
+		chip_timer.cfg			ã¿ã¤ããã©ã¤ãã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ãã¡ã¤ã«
+		chip_timer.h			ã¿ã¤ããã©ã¤ããä½¿ç¨ããããã®å®ç¾©
+		chip_unrename.h			ãããä¾å­é¨ã®å
+é¨è­å¥åã®ãªãã¼ã è§£é¤
+		rza1.h					ãããã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
+		scif.h					ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ã«é¢ããå®ç¾©
+		tSCIF.c					ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ç¨ ç°¡æSIOãã©ã¤ã
+		tSCIF.cdl				ã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹ç¨ ç°¡æSIOãã©ã¤ã
+								ã®ã³ã³ãã¼ãã³ãè¨è¿°
+
+	arm_gcc/doc/
+		arm_design.txt			ARMã³ã¢ä¾å­é¨ è¨­è¨ã¡ã¢
+		arm_user.txt			ARMä¾å­é¨ ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«
+		gic_design.txt			GICä¾å­é¨ è¨­è¨ã¡ã¢
+
+4.2 ãã¼ã¸ã§ã³å±¥æ­´
+
+	2015å¹´8æ5æ¥	Release	3.B.0		æåã®ãªãªã¼ã¹
+	2016å¹´2æ8æ¥	Release	3.0.0		æåã®ä¸è¬å
+¬é
+	2016å¹´5æ15æ¥	Release	3.1.0		RZ/A1ã®ãµãã¼ããè¿½å 
+
+ä»¥ä¸
Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_vmsa_memo.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_vmsa_memo.txt	(revision 302)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/arm_vmsa_memo.txt	(revision 306)
@@ -5,5 +5,5 @@
 		ä½æè
 : é«ç°åºç« ï¼åå¤å±å¤§å­¦ï¼
-		æçµæ´æ°: 2015å¹´8æ6æ¥
+		æçµæ´æ°: 2016å¹´1æ16æ¥
 
 âã¡ã¢ã®ä½ç½®ã¥ã
@@ -382,5 +382,17 @@
 ±æï¼1ï¼ãéå
 ±æï¼0ï¼ã
+ã»ããã[0]
+	ãã¼ã¸ãã¼ãã«ã¦ã©ã¼ã¯ãã­ã£ãã·ã¥ã§ããï¼1ï¼ãã§ããªãï¼0ï¼ã
 ã»ä»ã®ãããã¯æªä½¿ç¨
+
+ã»ARMv5ä»¥åã¯ï¼ããã[4:0]ã¯ãµãã¼ããã¦ãããï¼0ã«ãã¹ãï¼ä»¥ä¸ã®è¨è¿°ã
+ãå¤æ­ï¼ï¼
+
+åèæç®[1]ã®B4.7.1ç¯ãã
+--------------------
+Prior to VMSAv6, a single TTBR existed. Only bits[31:14] of the
+Translation Table Base Register are significant, and bits[13:0] should
+be zero.
+--------------------
 
 âTTBR1ï¼Translation Table Base Register 1ï¼â¦ (0, c2, c0, 1)
Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_design.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_design.txt	(revision 302)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_design.txt	(revision 306)
@@ -3,7 +3,60 @@
 		GICï¼ARM Generic Interrupt Controllerï¼ä¾å­é¨ è¨­è¨ã¡ã¢
 
-		å¯¾å¿ãã¼ã¸ã§ã³: Release 3.B.0
-		æçµæ´æ°: 2015å¹´7æ24æ¥
-
+		å¯¾å¿ãã¼ã¸ã§ã³: Release 3.0.0
+		æçµæ´æ°: 2016å¹´1æ16æ¥
+
+----------------------------------------------------------------------
+ TOPPERS/ASP Kernel
+     Toyohashi Open Platform for Embedded Real-Time Systems/
+     Advanced Standard Profile Kernel
+
+ Copyright (C) 2014-2016 by Embedded and Real-Time Systems Laboratory
+             Graduate School of Information Science, Nagoya Univ., JAPAN
+ 
+ ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+     æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+     ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+     è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+     ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+     ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+     ã¨ï¼
+   (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+       ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+   (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+       å ±åãããã¨ï¼
+ (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+     å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+     ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+     ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+     å
+è²¬ãããã¨ï¼
+ 
+ æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ ã®è²¬ä»»ãè² ããªãï¼
+ 
+ $Id: gic_design.txt 533 2016-01-15 23:29:33Z ertl-hiro $
 ----------------------------------------------------------------------
 
@@ -14,7 +67,13 @@
 	- GICä¾å­é¨ãæ§æãããã¡ã¤ã«
 ã»ãããä¾å­ã®ãã©ã¡ã¼ã¿
+	- ã¢ããªã±ã¼ã·ã§ã³ããåç
+§ã§ãããã©ã¡ã¼ã¿
+	- ã«ã¼ãã«å
+é¨ã§ä½¿ç¨ãããã©ã¡ã¼ã¿
 ã»GICã«ãããå²è¾¼ã¿ãã³ãã©ããã³CPUä¾å¤ãã³ãã©ã®åºå
 ¥å£å¦ç
 	- GICã«ãããå²è¾¼ã¿ãã³ãã©ã®åºå
+¥å£å¦ç
+	- GICã«ãããCPUä¾å¤ãã³ãã©ã®åºå
 ¥å£å¦ç
 
@@ -43,16 +102,34 @@
 GICä¾å­é¨ã¯ï¼æ¬¡ã®3ã¤ã®ãã¡ã¤ã«ã§æ§æãããï¼
 
-gic_kernel_impl.h
-gic_kernel_impl.c
-gic_support.S
+  arch/arm_gcc/common/
+	gic_kernel_impl.h	ã«ã¼ãã«ã®å²è¾¼ã¿GICä¾å­é¨ã®ããããã¡ã¤ã«
+	gic_kernel_impl.c	ã«ã¼ãã«ã®å²è¾¼ã¿GICä¾å­é¨
+	gic_support.S		ã«ã¼ãã«ã®å²è¾¼ã¿GICä¾å­é¨ã®ã¢ã»ã³ããªè¨èªé¨
 
 âãããä¾å­ã®ãã©ã¡ã¼ã¿
 
-TMIN_INTPRI
-TMAX_INTPRI
-
-ã«ã¼ãã«ã®ã¿ã¼ã²ããä¾å­é¨ã®ããããã¡ã¤ã«ããgic_kernel_impl.hãã¤ã³ã¯
-ã«ã¼ãããåã«ï¼å¿
-è¦ã«å¿ãã¦ï¼ä»¥ä¸ã®å®æ°ããã¯ã­å®ç¾©ãã¦ããï¼
+âã¢ããªã±ã¼ã·ã§ã³ããåç
+§ã§ãããã©ã¡ã¼ã¿
+
+target_kernel.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ã§ï¼ä»¥ä¸ã®
+å®æ°ããã¯ã­å®ç¾©ãã¦ããï¼
+
+(1) TMIN_INTPRI			å²è¾¼ã¿åªå
+åº¦ã®æå°å¤ï¼æé«å¤ï¼
+(2) TMAX_INTPRI			å²è¾¼ã¿åªå
+åº¦ã®æå¤§å¤ï¼æä½å¤ï¼
+
+TMAX_INTPRIã¯ï¼-1ã«å®ç¾©ããï¼TMAX_INTPRIã¯ï¼ã¿ã¼ã²ãããããã®GICã§ãµãã¼
+ãããå²è¾¼ã¿åªå
+åº¦ã®æ®µæ°ã«ããï¼-15ï¼-31ï¼-63ï¼-127ï¼-255ã®ããããã«å®
+ç¾©ããï¼
+
+âã«ã¼ãã«å
+é¨ã§ä½¿ç¨ãããã©ã¡ã¼ã¿
+
+target_kernel_impl.hï¼ã¾ãã¯ï¼ããããã¤ã³ã¯ã«ã¼ãããããã¡ã¤ã«ï¼ãã
+gic_kernel_impl.hãã¤ã³ã¯ã«ã¼ãããåã«ï¼å¿
+è¦ã«å¿ãã¦ï¼ä»¥ä¸ã®å®æ°ããã¯
+ã­å®ç¾©ãã¦ããï¼
 
 (1) GIC_TNUM_INTNO		å²è¾¼ã¿ã®æ°
@@ -62,22 +139,15 @@
 Peripheral Interruptï¼ã®åè¨æ°ï¼
 
-(2) GIC_PRI_LEVEL		å²è¾¼ã¿åªå
-åº¦ã®æ®µæ°
-
-ã¿ã¼ã²ãããããã®GICããµãã¼ãããå²è¾¼ã¿åªå
-åº¦ã®æ®µæ°ï¼16ï¼32ï¼64ï¼128ï¼
-256ã®ããããï¼
-
-(3) GICC_BASE			CPUã¤ã³ã¿ãã§ã¼ã¹ã®ãã¼ã¹ã¢ãã¬ã¹
-(4) GICD_BASE			ãã£ã¹ããªãã¥ã¼ã¿ã®ãã¼ã¹ã¢ãã¬ã¹
+(2) GICC_BASE			CPUã¤ã³ã¿ãã§ã¼ã¹ã®ãã¼ã¹ã¢ãã¬ã¹
+(3) GICD_BASE			ãã£ã¹ããªãã¥ã¼ã¿ã®ãã¼ã¹ã¢ãã¬ã¹
 
 GICã®CPUã¤ã³ã¿ãã§ã¼ã¹ããã³ãã£ã¹ããªãã¥ã¼ã¿ã®ãã¼ã¹ã¢ãã¬ã¹ï¼
 
-(5) TOPPERS_SAFEG_SECURE	ã»ã­ã¥ã¢ã¢ã¼ãï¼ãªãã·ã§ã³ï¼
+(4) TOPPERS_SAFEG_SECURE	ã»ã­ã¥ã¢ã¢ã¼ãï¼ãªãã·ã§ã³ï¼
 
 ã»ã­ã¥ã¢ã¢ã¼ãã§ã«ã¼ãã«ãåä½ããï¼FIQãã«ã¼ãã«ç®¡çã®å²è¾¼ã¿ã¨æ±ãå ´å
 ã«ï¼ãã®ã·ã³ãã«ããã¯ã­å®ç¾©ããï¼
 
-(6) GIC_ARM11MOCORE		ARM11 MPCoreã¸ã®å¯¾å¿ï¼ãªãã·ã§ã³ï¼
+(5) GIC_ARM11MPCORE		ARM11 MPCoreã¸ã®å¯¾å¿ï¼ãªãã·ã§ã³ï¼
 
 ARM11 MPCoreã®Distributed Interrupt Controllerã®å ´åã«ã¯ï¼ãã®ã·ã³ãã«
@@ -284,5 +354,40 @@
 ¥å£å¦ç
 
-
+GICã«ãããCPUä¾å¤ãã³ãã©ã®å
+¥å£å¦çï¼irc_begin_excï¼ã§ã¯ï¼CPUä¾å¤çºç
+åã®å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãã¹ã¿ãã¯ã«ä¿å­ãï¼CPUä¾å¤ãã³ãã©ã®å
+¥å£å¦ç
+ï¼irc_end_excï¼ã§å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ãï¼
+
+----------------------------------------
+ALABEL(irc_begin_exc)
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãä¿å­ããï¼
+	 */
+	ldr		r1, =GICC_PMR		/* ç¾å¨ã®å²è¾¼ã¿åªå
+åº¦ãåå¾ */
+	ldr		r2, [r1]
+	push	{r2}				/* irc_end_excã§ç¨ããæ
+å ±ãä¿å­ */
+	bx		lr
+----------------------------------------
+ALABEL(irc_end_exc)
+	/*
+	 *  å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ãï¼
+	 */
+	pop		{r2}				/* irc_begin_excã§ä¿å­ããæ
+å ±ãå¾©å¸° */
+	ldr		r1, =GICC_PMR		/* å²è¾¼ã¿åªå
+åº¦ãã¹ã¯ãå
+ã«æ»ã */
+	str		r2, [r1]
+	bx		lr
+----------------------------------------
 
 ä»¥ä¸
Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_memo.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_memo.txt	(revision 302)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/gic_memo.txt	(revision 306)
@@ -5,5 +5,5 @@
 		ä½æè
 : é«ç°åºç« ï¼åå¤å±å¤§å­¦ï¼
-		æçµæ´æ°: 2015å¹´7æ25æ¥
+		æçµæ´æ°: 2016å¹´3æ24æ¥
 
 âã¡ã¢ã®ä½ç½®ã¥ã
@@ -340,8 +340,14 @@
 	- åå²è¾¼ã¿ã®ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã2ãããã§è¨­å®
 	- ã¬ãã«ããªã¬ãã¨ãã¸ããªã¬ããè¨­å®
+			ä¸ä½ãããã0ï¼ã¬ãã«ããªã¬
+			ä¸ä½ãããã1ï¼ã¨ãã¸ããªã¬
 	- GICv1ããåã®ä¸é¨ã®å®è£
 ã§ã¯ï¼N-Nã¢ãã«ã1-Nã¢ãã«ããããã§è¨­å®
-			0ï¼N-Nã¢ãã«
-			1ï¼1-Nã¢ãã«
+			ä¸ä½ãããã0ï¼N-Nã¢ãã«
+			ä¸ä½ãããã1ï¼1-Nã¢ãã«
+	- GICv1ä»¥éã§ã¯ï¼ä¸ä½ããããã©ã®ããã«è¨­å®ãã¹ããï¼
+			æç®[1]ã«ã¯æè¨ããªã
+			æç®[2]ã«ããã¨ï¼1ã«ãã¹ãã¨ãèª­ãã
+	â GIC_ARM11MPCOREãå®ç¾©ããã¦ããã°1ï¼ããã§ãªããã°0ã«åæåããï¼
 
 å²è¾¼ã¿ãã³ã»ã­ã¥ã¢ã¢ã¯ã»ã¹å¶å¾¡ã¬ã¸ã¹ã¿ï¼GICD_NSCARnï¼0xe00ã0xefc â¦ ãªãã·ã§ã³
Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/mpcore_memo.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/mpcore_memo.txt	(revision 302)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/mpcore_memo.txt	(revision 306)
@@ -5,5 +5,5 @@
 		ä½æè
 : é«ç°åºç« ï¼åå¤å±å¤§å­¦ï¼
-		æçµæ´æ°: 2015å¹´8æ9æ¥
+		æçµæ´æ°: 2016å¹´1æ16æ¥
 
 âã¡ã¢ã®ä½ç½®ã¥ã
@@ -22,4 +22,6 @@
 
 ã»åèæç®
+ã»MPCoreã¨ã¯ï¼
+ã»SCUï¼Snoop Control Unitï¼
 ã»ARM CT11MPcore with RealView Emulation Baseboard
 	- ç¨èªã®æ´ç
@@ -53,4 +55,50 @@
 HBI-0159, HBI-0175, HBI-0176
 DUI0351E_realview_platform_baseboard_for_arm11_mpcore_ug.pdf
+
+âMPCoreã¨ã¯ï¼
+
+MPCoreã¨ã¯ï¼ARMã³ã¢ã1ã4åã¨ï¼SCUï¼Snoop Control Unitï¼ãªã©ï¼ãã«ãã³
+ã¢ã·ã¹ãã ã«å¿
+è¦ãªå¨è¾ºåè·¯ãå«ããã­ã»ããµã¢ã¼ã­ãã¯ãã£ã®åç§°ã¨æãã
+ãï¼
+
+åèæç®[1]ã«ããã¨ï¼ARM11 MPCoreã¨ã¯ï¼1ã4åã®MP11 CPUï¼ã³ã¢ï¼ãè¼ãï¼
+SCUï¼DICï¼Distributed Interrupt Controllerï¼ï¼ã³ã¢æ¯ã®ãã©ã¤ãã¼ãã¿ã¤
+ãã¨ãã©ã¤ãã¼ãã¦ã©ããããã°ï¼AXIã¤ã³ã¿ãã§ã¼ã¹ãªã©ãå«ããã­ã»ããµã®
+åç§°ã§ããï¼MP11 CPUã¨ã¯ï¼ARM11ãæ¡å¼µããã³ã¢ã®ãã¨ã¨æãããï¼
+
+åèæç®[2]ã«ããã¨ï¼Cortex-A9 MPCoreã¨ã¯ï¼1ã4åã®Cortex-A9ãã­ã»ããµ
+ï¼ã³ã¢ï¼ãè¼ãï¼SCUï¼GICï¼Generic Interrupt Controllerï¼ï¼ãã©ã¤ãã¼ã
+ããªãã§ã©ã«ï¼ã°ã­ã¼ãã«ã¿ã¤ãï¼ã³ã¢æ¯ã®ãã©ã¤ãã¼ãã¿ã¤ãã¨ã¦ã©ãããã
+ã°ï¼ï¼AXIã¤ã³ã¿ãã§ã¼ã¹ï¼ãªãã·ã§ã³ï¼ãªã©ãå«ããã­ã»ããµã®åç§°ã§ããï¼
+
+ä»¥ä¸ããï¼MPCoreãããä¾å­é¨ã«ã¯ï¼SCUï¼GICï¼ã¾ãã¯DICï¼ï¼ãã©ã¤ãã¼ãã
+ãªãã§ã©ã«ãæ±ãã³ã¼ããå«ããã®ãå¦¥å½ã¨èããããï¼ãã ãï¼GICï¼ããã³
+DICï¼ã«ã¤ãã¦ã¯ï¼å¥ã®ARMãã­ã»ããµã«ãå
+±éã§ä½¿ãããããï¼ARMã³ã¢ä¾å­é¨
+ã«å«ããï¼
+
+âSCUï¼Snoop Control Unitï¼
+
+SCUã¯ï¼åã³ã¢ãæã¤L1ã­ã£ãã·ã¥ã®ã³ãã¼ã¬ã³ã¹ãä¿ã¤ããã®åè·¯ã§ããï¼
+ARM11 MPCoreã§ã¯ï¼SCUãããã©ã¼ãã³ã¹ã¢ãã¿ã®æ©è½ãæã£ã¦ãããï¼
+Cortex-Aã·ãªã¼ãºã§ã¯ï¼ããã©ã¼ãã³ã¹ã¢ãã¿ã¯ç¬ç«ããæ©è½ã¨ãã¦ç¨æãã
+ã¦ããï¼SCUã¯ããã©ã¼ãã³ã¹ã¢ãã¿ã®æ©è½ãæããªãï¼
+
+ä»¥ä¸ã§ã¯ï¼SCUã®å¶å¾¡ã¬ã¸ã¹ã¿ã«ã¤ãã¦ã¾ã¨ããï¼
+
+SCUå¶å¾¡ã¬ã¸ã¹ã¿ï¼MPCORE_SCU_CTRLï¼â¦ 32ããã
+ï¼ARM11 MPCoreã¨Cortex-A9 MPCoreã§ï¼ãããé
+ç½®ãç°ãªãï¼
+
+SCUã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¬ã¸ã¹ã¿ï¼MPCORE_SCU_CONFIGï¼â¦ 32ããã
+
+SCU CPUãã¯ã¼ã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿ï¼MPCORE_SCU_CPUSTATï¼â¦ 32ããã
+ï¼ARM11 MPCoreã¨Cortex-A9 MPCoreã§ï¼ãããé
+ç½®ãç°ãªãï¼
+
+SCUå
+¨ç¡å¹åã¬ã¸ã¹ã¿ï¼MPCORE_SCU_INVALLï¼â¦ 32ããã
+	- ãã®ã¬ã¸ã¹ã¿ã«æ¸ãè¾¼ããã¨ã§ï¼ã¿ã°ã¡ã¢ãªãç¡å¹åã§ããï¼
 
 âARM CT11MPcore with RealView Emulation Baseboard
@@ -133,5 +181,5 @@
 	- ä»¥ä¸ã®ã¬ã¸ã¹ã¿ã®ã¢ãã¬ã¹ãæ±ºãã
 		+ ARM11 MPCoreã®ã¬ã¸ã¹ã¿
-			Snoop Control Unitï¼SCUï¼ã®å¶å¾¡ã¬ã¸ã¹ã¿
+			SCUã®å¶å¾¡ã¬ã¸ã¹ã¿
 		+ L220ã­ã£ãã·ã¥ã³ã³ãã­ã¼ã©ã®ã¬ã¸ã¹ã¿
 		+ ARM11 MPCoreãã¹ããããã®ã¬ã¸ã¹ã¿
@@ -167,6 +215,6 @@
 èµã¿ã¤ãï¼[1] 9.2ç¯ï¼
 
-ARM11 MPCoreã¯ï¼ã³ã¢æ¯ã«ï¼ã¿ã¤ãã¨ã¦ã©ããããã°ãæã¤ï¼ã¦ã©ããããã°
-ã¯ï¼ã¿ã¤ãã¨ãã¦ä½¿ç¨ãããã¨ãã§ããï¼
+ARM11 MPCoreã¯ï¼ã³ã¢æ¯ã«ï¼ãã©ã¤ãã¼ãã¿ã¤ãã¨ãã©ã¤ãã¼ãã¦ã©ãããã
+ã°ãæã¤ï¼ã¦ã©ããããã°ã¯ï¼ã¿ã¤ãã¨ãã¦ä½¿ç¨ãããã¨ãã§ããï¼
 
 âã¿ã¤ã
Index: asp3_wo_tecs/trunk/arch/arm_gcc/doc/rza1_memo.txt
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/doc/rza1_memo.txt	(revision 306)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/doc/rza1_memo.txt	(revision 306)
@@ -0,0 +1,284 @@
+
+		TOPPERSãã­ã¸ã§ã¯ã è¨­è¨ã¡ã¢
+		ã«ããµã¹ RZ/Aããã³GR-PEACHã«é¢ããã¡ã¢
+
+		ä½æè
+: é«ç°åºç« ï¼åå¤å±å¤§å­¦ï¼
+		æçµæ´æ°: 2016å¹´3æ21æ¥
+
+âã¡ã¢ã®ä½ç½®ã¥ã
+
+ãã®ã¡ã¢ã¯ï¼ã«ããµã¹ RZ/Aã¨ï¼ãããç¨ãããã¼ãã§ããGR-PEACHã«é¢ãã¦ï¼
+TOPPERSã«ã¼ãã«ããã¼ãã£ã³ã°ããã«ããã£ã¦å¿
+è¦ã¨ãªãäºé 
+ãã¾ã¨ãããã®
+ã§ããï¼
+
+âç®æ¬¡
+
+ã»åèæç®
+ã»RZ/Aã¨ã¯ï¼
+ã»RZ/A1ãããä¾å­é¨
+
+âåèæç®
+
+[1] RZ/A1Hã°ã«ã¼ãï¼RZ/A1Mã°ã«ã¼ã ã¦ã¼ã¶ã¼ãºããã¥ã¢ã« ãã¼ãã¦ã§ã¢ç·¨
+Rev.2.00 2015.05
+r01uh0403jj0200_rz_a1h.pdf
+
+[2] RZ/A1Lã°ã«ã¼ã ã¦ã¼ã¶ã¼ãºããã¥ã¢ã« ãã¼ãã¦ã§ã¢ç·¨
+Rev.2.00 2015.05
+r01uh0437jj0200_rz_a1l.pdf
+
+âRZ/Aã·ãªã¼ãºã¨ã¯ï¼
+
+RZ/Aã·ãªã¼ãºã¨ã¯ï¼ARM Cortex-A9ã³ã¢ãæ­è¼ããã«ããµã¹ã®ä¸é£ã®ãã¤ã³ã³ã®
+ç·ç§°ã§ï¼ç¾æç¹ã§ä»¥ä¸ã®4ã¤ã®ããããããï¼
+
+ã»RZ/A1L
+ã»RZ/A1LU
+ã»RZ/A1M
+ã»RZ/A1H
+
+ãããã¯ããããï¼åä½å¨æ³¢æ°400MHzã®ARM Cortex-A9ã³ã¢ã1ã¤æ­è¼ãã¦ãã
+ãï¼æ­è¼ããRAMå®¹éãå¨è¾ºããã¤ã¹ã«éããããï¼
+
+âRZ/A1ãããä¾å­é¨
+
+TOPPERS/ASP3ã«ã¼ãã«ã§ã¯ï¼ä¸ã®4ã¤ã®ããããRZ/A1ã¨ç·ç§°ãï¼ä»å¾ï¼RZ/A2x
+ãåºã¦ããã¨æ³åãï¼RZ/A1ã¨ç§°ãã¦ããï¼ï¼ãã®å
+±éé¨ãarch/arm_gcc/rza1
+ãã£ã¬ã¯ããªã«ç½®ããã¨ã«ããï¼ãã ãï¼ç¾æç¹ã§4ã¤ã®ããããã¹ã¦ã«å¯¾å¿ã§
+ãã¦ããããã§ã¯ãªãï¼
+
+âã³ã¢
+
+ã»ARM Cortex-A9 MPCore Ã 1ã³ã¢ï¼Revision: r3p0ï¼
+	å½ä»¤ã­ã£ãã·ã¥ï¼32KB
+	ãã¼ã¿ã­ã£ãã·ã¥ï¼32KB
+	TLBã¨ã³ããªï¼128
+	Jazelleï¼ã¡ãã£ã¢ãã­ã»ãã·ã³ã°ã¨ã³ã¸ã³ï¼FPUï¼PTMã¤ã³ã¿ãã§ã¼ã¹
+	å
+èµã®å²è¾¼ã¿ã³ã³ãã­ã¼ã©ã¯ä½¿ç¨ããªã
+	ãã©ã¤ãã¼ãã¡ã¢ãªé åã®ãã¼ã¹ã¢ãã¬ã¹ï¼0xf0000000
+
+ã»å
+èµã®ã¿ã¤ãã¯å®è£
+ããã¦ããæ¨¡æ§ã ãï¼å²è¾¼ã¿ãããããã¨ãã§ããªã
+
+âå²è¾¼ã¿ã³ã³ãã­ã¼ã©
+
+ã»ã³ã¢å¤ã«å²è¾¼ã¿ã³ã³ãã­ã¼ã©ãæ­è¼
+ã»ARM PrimeCell Generic Interrupt Controllerï¼PL390ï¼
+	- ARM GICã¢ã¼ã­ãã¯ãã£ä»æ§ ãã¼ã¸ã§ã³1ã«å¯¾å¿
+ã»å²è¾¼ã¿åªå
+é ä½ï¼32ã¬ãã«è¨­å®å¯è½
+
+ã»ã¬ã¸ã¹ã¿ã®çªå°
+|	0xfcfef800		ICR0	å²è¾¼ã¿ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿0
+|	0xfcfef802		ICR1	å²è¾¼ã¿ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿1
+|	0xfcfef804		IRQRR	IRQå²è¾¼ã¿è¦æ±ã¬ã¸ã¹ã¿
+
+	0xe8201000		ICDDCR	åé
+å¨å¶å¾¡ã¬ã¸ã¹ã¿
+							â ãã£ã¹ããªãã¥ã¼ã¿å¶å¾¡ã¬ã¸ã¹ã¿ï¼GICD_CTLRï¼
+	â¦â¦
+	â» å²è¾¼ã¿ã¢ã¯ãã£ãã»ããã¬ã¸ã¹ã¿ã¯ï¼å²è¾¼ã¿ã¢ã¯ãã£ããããã¬ã¸ã¹ã¿
+	â» å²è¾¼ã¿ã¢ã¯ãã£ãã¯ãªã¢ã¬ã¸ã¹ã¿ã¯ç¡ã
+|	0xe8201d00		ppi_status		PPIã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿
+|	0xe8201d04		spi_status0		SPIã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿0
+|	â¦â¦
+|	0xe8201d44		spi_status16	SPIã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿16
+	0xe8201f00		ICDSGIR			ã½ããã¦ã§ã¢çæå²è¾¼ã¿ã¬ã¸ã¹ã¿
+
+	0xe8202000		ICCICR	CPUã¤ã³ã¿ãã§ã¼ã¹å¶å¾¡ã¬ã¸ã¹ã¿
+							â CPUã¤ã³ã¿ãã§ã¼ã¹å¶å¾¡ã¬ã¸ã¹ã¿ï¼GICC_CTLRï¼
+	â¦â¦
+
+ãå²è¾¼ã¿ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿0ï¼ICR0ï¼
+	- NMIå
+¥åã¬ãã«ã®èª­ã¿åºã
+	- NMIã¨ãã¸ã»ã¬ã¯ãã®è¨­å®ï¼èª­ã¿åºã
+	- NMIå²è¾¼ã¿è¦æ±ã®èª­ã¿åºãï¼ã¯ãªã¢
+
+ãå²è¾¼ã¿ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿1ï¼ICR1ï¼
+	- IRQ7ãIRQ0ã«å¯¾ãã¦ï¼ã­ã¼ã¬ãã«ï¼ç«ã¡ä¸ããã¨ãã¸ï¼ç«ã¡ä¸ããã¨ã
+	  ã¸ï¼ä¸¡ã¨ãã¸ã®è¨­å®ï¼èª­ã¿åºã
+	â IRQå²è¾¼ã¿ããªã¬è¨­å®ã¯ãã®ã¬ã¸ã¹ã¿ã§è¡ãï¼GICå´ã¯ã¬ãã«ã«è¨­å®ãã
+
+ãIRQå²è¾¼ã¿è¦æ±ã¬ã¸ã¹ã¿ï¼IRQRRï¼
+	- IRQ7ãIRQ0ã®å²è¾¼ã¿è¦æ±ã®èª­ã¿åºãï¼ã¯ãªã¢
+
+ã»å²è¾¼ã¿è¦å ã¨å²è¾¼ã¿ID
+	- NMIå²è¾¼ã¿ â¦ CPUã«FIQã§éç¥
+	- IRQå²è¾¼ã¿
+	- å
+èµå¨è¾ºã¢ã¸ã¥ã¼ã«å²è¾¼ã¿
+	- ç«¯å­å²è¾¼ã¿
+
+ã»IRQå²è¾¼ã¿ã¨å
+èµå¨è¾ºã¢ã¸ã¥ã¼ã«å²è¾¼ã¿ã«å¯¾ãã¦ï¼å²è¾¼ã¿ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§
+ãã³ã¬ã¸ã¹ã¿ï¼GICD_ICFGRnï¼ãæå®ãããå¤ã«åæåããï¼
+	â gic_kernel_impl.cã«ããã¯ãå
+¥ãããã¨ãå¿
+è¦
+	â ä¸æ¬ãã¦åæåããªãã¦ãæ­£ããåãã¦ãã
+
+âã·ãªã¢ã«ã¤ã³ã¿ãã§ã¼ã¹
+
+ã»RZ/A1ã¯ï¼FIFOå
+èµã·ãªã¢ã«ã³ãã¥ãã±ã¼ã·ã§ã³ã¤ã³ã¿ãã§ã¼ã¹ãæã¤
+	RZ/A1Hï¼8ãã¼ã
+	RZ/A1Lï¼5ãã¼ã
+
+ã»ãã¼ãæ¯ã®ã¬ã¸ã¹ã¿
+	SCSMR		ã·ãªã¢ã«ã¢ã¼ãã¬ã¸ã¹ã¿		ãªãã»ããï¼0x00	16ããã
+	SCBRR		ãããã¬ã¼ãã¬ã¸ã¹ã¿		ãªãã»ããï¼0x04	8ããã
+	SCSCR		ã·ãªã¢ã«ã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿ ãªãã»ããï¼0x08	16ããã
+	SCFTDR		éä¿¡FIFOãã¼ã¿ã¬ã¸ã¹ã¿		ãªãã»ããï¼0x0C	8ããã
+	SCFSR		ã·ãªã¢ã«ã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿	ãªãã»ããï¼0x10	16ããã
+	SCFRDR		åä¿¡FIFOãã¼ã¿ã¬ã¸ã¹ã¿		ãªãã»ããï¼0x14	8ããã
+	SCFCR		FIFOã³ã³ãã­ã¼ã«ã¬ã¸ã¹ã¿	ãªãã»ããï¼0x18	16ããã
+	SCFDR		FIFOãã¼ã¿ã«ã¦ã³ãã¬ã¸ã¹ã¿	ãªãã»ããï¼0x1C 	16ããã
+	SCSPTR		ã·ãªã¢ã«ãã¼ãã¬ã¸ã¹ã¿		ãªãã»ããï¼0x20	16ããã
+	SCLSR		ã©ã¤ã³ã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿	ãªãã»ããï¼0x24	16ããã
+	SCEMR		ã·ãªã¢ã«æ¡å¼µã¢ã¼ãã¬ã¸ã¹ã¿	ãªãã»ããï¼0x28	16ããã
+
+âOSã¿ã¤ã
+
+ã»2ãã£ã³ãã«ã®OSã¿ã¤ããæã¤
+	- 32ãããã¿ã¤ã
+ã»2ã¤ã®åä½ã¢ã¼ã
+ã»P0Ïã§é§å
+	- P0Ïã¯33.33MHzï¼æå¤§ï¼
+	- ã¦ã¼ã¶ã¼ãºããã¥ã¢ã«ã«ã¯33.33MHzã¨è¡¨è¨ããã¦ãããï¼400MHzã®12å
+	  å¨ãªã®ã§ï¼å®éã«ã¯ï¼33.333333â¦MHzã¨æããã
+
+ã»ã¤ã³ã¿ã¼ãã«ã¿ã¤ãã¢ã¼ã
+	- ä¸å®ééã§å²è¾¼ã¿ãçºçãããå ´åã«ä½¿ç¨
+	- æå®å¤ãã0ã¾ã§ãã¦ã³ã«ã¦ã³ãï¼å¨æã¯ï¼æå®å¤+1ï¼
+	- 0ããæå®å¤ã«æ»ãæã«å²è¾¼ã¿ãçºç
+
+	- æå®å¤ãå¤æ´ããã¨ï¼æ¬¡ã«æ»ãæã«åæ 
+	- ããã«æå®å¤ãåæ ããããã¨ãå¯è½
+
+	- ã«ã¦ã³ãéå§æã«å²è¾¼ã¿ãçºçãããæ©è½ãããï¼ä½¿éãä¸æï¼
+	- 0ã«ãªã£ãå¾ã«ã«ã¦ã³ããæ­¢ããã¢ã¼ãã¯ãªãï¼ã¯ã³ã·ã§ããã¯ã§ããªãï¼
+
+ã»ããªã¼ã©ã³ãã³ã°ã³ã³ãã¢ã¢ã¼ã
+	- 0x00000000ãã0xffffffffã¾ã§ã«ã¦ã³ãã¢ãã
+	- æå®å¤ã«ãªã£ããï¼å²è¾¼ã¿ãçºç
+
+	- æå®å¤ã®è¨­å®æã«ï¼æå®å¤ãéãã¦ããå ´åã®å¯¾ç­ãèª²é¡
+		â èª­ã¿è¾¼ãã§ï¼æå®å¤ãéãã¦ãããï¼GICãæä½ãã¦å²è¾¼ã¿è¦æ±ãåºã
+
+ã»ãã£ãã«æ¯ã®ã¬ã¸ã¹ã¿
+	OSTMnCMP	ã³ã³ãã¢ã¬ã¸ã¹ã¿			ãªãã»ããï¼0x00	RW 32ããã
+				âãæå®å¤ããè¨­å®
+	OSTMnCNT	ã«ã¦ã³ãã¬ã¸ã¹ã¿			ãªãã»ããï¼0x04	R 32ããã
+	OSTMnTE		ã«ã¦ã³ãã¤ãã¼ãã«ã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿	0x10	R 8ããã
+	OSTMnTS		ã«ã¦ã³ãéå§ããªã¬ã¬ã¸ã¹ã¿	ãªãã»ããï¼0x14	W 8ããã
+	OSTMnTT		ã«ã¦ã³ãåæ­¢ããªã¬ã¬ã¸ã¹ã¿	ãªãã»ããï¼0x18	W 8ããã
+	OSTMnCTL	å¶å¾¡ã¬ã¸ã¹ã¿				ãªãã»ããï¼0x20	RW 8ããã
+				â åä½ã¢ã¼ãã¨ã«ã¦ã³ãéå§æã®å²è¾¼ã¿ã®æç¡ãè¨­å®
+
+ã»33.33â¦MHzã®ã¯ã­ãã¯ã§ãã¾ããããï¼
+	- ã¿ã¤ããå·¡åããå¨æãæ±ãã
+		2^32(= 4,294,967,296)/33.33â¦
+		= 2^32(= 4,294,967,296)*3/100
+		= 128,849,018.88Î¼sï¼ç´2åï¼
+		â ããã 128,849,019Î¼s ã¨ä¸¸ããã®ã¯è¨±å®¹ç¯å²
+			ãã®èª¤å·®ã¯ï¼æ°´æ¶çºæ¯å­ã®ç²¾åº¦ãããå°ãã
+	
+	- ã«ã¦ã³ã¿å¤ * 3 / 100 ãÎ¼såä½ã®æå»ã¨ããã¨
+
+		ã«ã¦ã³ã¿å¤					Î¼såä½æå»ï¼ã«ã¦ã³ã¿å¤ * 3 / 100ï¼
+		0ã33 [34]						0
+		34ã66 [33]						1
+		67ã99 [33]						2
+		100ã133 [34]					3
+		â¦								â¦
+		4294967200ã4294967233 [34]		128,849,016
+		4294967234ã4294967266 [33]		128,849,017
+		4294967267ã4294967295 [29]		128,849,018
+		â æå¾ã ãééã29ã«ãªã
+		â ãã¤ï¼long longã§ã®è¨ç®ãå¿
+è¦
+
+	- (x / 4 + x / 4000000000) * 3 / 25 ãÎ¼såä½ã®æå»ã¨ããã¨
+											where x = ã«ã¦ã³ã¿å¤
+		ã«ã¦ã³ã¿å¤					Î¼såä½æå»ï¼ã«ã¦ã³ã¿å¤ * 3 / 100ï¼
+		0ã35 [36]						0
+		36ã67 [32]						1
+		68ã99 [32]						2
+		100ã135 [36]					3
+		136ã167 [32]					4
+		168ã199 [32]					5
+		â¦								â¦
+		3999999900ã3999999935 [36]		119999997
+		3999999936ã3999999967 [32]		119999998
+		3999999968ã3999999999 [32]		119999999
+		4000000000ã4000000031 [32]		120000000 â¦ ããã32ã«ãªã
+		4000000032ã4000000063 [32]		120000001
+		4000000064ã4000000095 [32]		120000002
+		â¦								â¦
+		4294967196ã4294967231 [36]		128849016
+		4294967232ã4294967263 [32]		128849017
+		4294967264ã4294967295 [32]		128849018 â¦ æå¾ã32ãç¶­æããã
+		â» 32ã¨36ã®éã§ã°ãã¤ãã®ã¯ï¼4ã§å²ã£ã¦ããã®ã§ãããããªã
+
+	- y = (x - z * 999999999) * 3 / 100 + z * 30000000 ãÎ¼såä½ã®æå»ã¨ããã¨
+							where x = ã«ã¦ã³ã¿å¤, z = x / 1000000000
+		ãã¹ã¦ã®ééã33ã34ã®ããããã«è½ã¡çã
+
+----------------------------------------------------------------------
+#!/usr/bin/env ruby
+# -*- coding: utf-8 -*-
+
+def calc(x)
+#  y = (x / 4 + x / 4000000000) * 3 / 25
+  z = x / 1000000000
+  y = (x - z * 999999999) * 3 / 100 + z * 30000000
+  return(y)
+end
+
+xx = yy = -1
+0.upto(200).each do |x|
+  y = calc(x)
+  if (y != yy)
+    if yy >= 0
+      puts(sprintf("%d - %d [%d] ... %d", xx, x-1, x - xx, yy))
+    end
+    yy = y
+    xx = x
+  end
+end
+
+xx = yy = -1
+3999999800.upto(4000000200).each do |x|
+  y = calc(x)
+  if (y != yy)
+    if yy >= 0
+      puts(sprintf("%d - %d [%d] ... %d", xx, x-1, x - xx, yy))
+    end
+    yy = y
+    xx = x
+  end
+end
+
+xl = xx = yy = -1
+4294967100.upto(4294967295).each do |x|
+  y = calc(x)
+  if (y != yy)
+    if yy >= 0
+      puts(sprintf("%d - %d [%d] ... %d", xx, x-1, x - xx, yy))
+    end
+    yy = y
+    xx = x
+  end
+  xl = x
+end
+puts(sprintf("%d - %d [%d] ... %d", xx, xl, xl + 1 - xx, yy))
+----------------------------------------------------------------------
+
+ä»¥ä¸
