Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/Makefile.core
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/Makefile.core	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/Makefile.core	(revision 306)
@@ -2,5 +2,5 @@
 #		Makefileã®ã³ã¢ä¾å­é¨ï¼ARMç¨ï¼
 #
-#  $Id: Makefile.core 484 2016-01-03 15:13:38Z ertl-hiro $
+#  $Id: Makefile.core 572 2016-02-01 14:40:09Z ertl-hiro $
 #
 
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/arm.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/arm.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/arm.h	(revision 306)
@@ -52,5 +52,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: arm.h 523 2016-01-14 11:01:04Z ertl-hiro $
+ *  $Id: arm.h 694 2016-03-23 13:17:48Z ertl-hiro $
  */
 
@@ -127,4 +127,5 @@
 #define CP15_SCTLR_VECTOR		UINT_C(0x00002000)
 #define CP15_SCTLR_ICACHE		UINT_C(0x00001000)
+#define CP15_SCTLR_BP			UINT_C(0x00000800)
 #define CP15_SCTLR_DCACHE		UINT_C(0x00000004)
 #define CP15_SCTLR_MMU			UINT_C(0x00000001)
@@ -308,4 +309,30 @@
 
 /*
+ *  åå²äºæ¸¬ãã¤ãã¼ãã«
+ */
+Inline void
+arm_enable_bp(void)
+{
+	uint32_t	reg;
+
+	CP15_READ_SCTLR(reg);
+	reg |= CP15_SCTLR_BP;
+	CP15_WRITE_SCTLR(reg);
+}
+
+/*
+ *  åå²äºæ¸¬ããã£ã¹ã¨ã¼ãã«
+ */
+Inline void
+arm_disable_bp(void)
+{
+	uint32_t	reg;
+
+	CP15_READ_SCTLR(reg);
+	reg &= ~CP15_SCTLR_BP;
+	CP15_WRITE_SCTLR(reg);
+}
+
+/*
  *  ãã­ã»ããµçªå·ã®åå¾
  *
@@ -413,4 +440,15 @@
 
 /*
+ *  åå²äºæ¸¬ã®ç¡å¹å
+ */
+Inline void
+arm_invalidate_bp(void)
+{
+	CP15_INVALIDATE_BP();
+	data_sync_barrier();
+	inst_sync_barrier();
+}
+
+/*
  *  TLBã®ç¡å¹å
  */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/arm_insn.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/arm_insn.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/arm_insn.h	(revision 306)
@@ -52,5 +52,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: arm_insn.h 547 2016-01-16 06:26:08Z ertl-hiro $
+ *  $Id: arm_insn.h 694 2016-03-23 13:17:48Z ertl-hiro $
  */
 
@@ -245,4 +245,8 @@
 #define CP15_INVALIDATE_ICACHE() \
 								Asm("mcr p15, 0, %0, c7, c5, 0"::"r"(0))
+
+/* åå²äºæ¸¬å
+¨ä½ã®ç¡å¹å */
+#define CP15_INVALIDATE_BP()	Asm("mcr p15, 0, %0, c7, c5, 6"::"r"(0))
 
 /* ãã¼ã¿ã­ã£ãã·ã¥å
@@ -435,3 +439,13 @@
 }
 
+/*
+ *  CP15ã®ã»ã­ã¥ãªãã£æ¡å¼µã¬ã¸ã¹ã¿æä½ãã¯ã­ï¼ARMv7ã®ã¿ï¼
+ */
+#if __TARGET_ARCH_ARM == 7
+
+/* ãã¯ã¿ãã¼ã¹ã¢ãã¬ã¹ã¬ã¸ã¹ã¿ */
+#define CP15_READ_VBAR(reg)		Asm("mrc p15, 0, %0, c12, c0, 0":"=r"(reg))
+#define CP15_WRITE_VBAR(reg)	Asm("mcr p15, 0, %0, c12, c0, 0"::"r"(reg))
+
+#endif /* __TARGET_ARCH_ARM == 7 */
 #endif /* TOPPERS_ARM_INSN_H */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_asm.inc
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_asm.inc	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_asm.inc	(revision 306)
@@ -3,5 +3,5 @@
  *      Toyohashi Open Platform for Embedded Real-Time Systems
  * 
- *  Copyright (C) 2011-2014 by Embedded and Real-Time Systems Laboratory
+ *  Copyright (C) 2011-2016 by Embedded and Real-Time Systems Laboratory
  *              Graduate School of Information Science, Nagoya Univ., JAPAN
  * 
@@ -50,5 +50,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: core_asm.inc 349 2015-07-25 05:25:27Z ertl-hiro $
+ *  $Id: core_asm.inc 714 2016-03-31 05:52:19Z ertl-hiro $
  */
 
@@ -82,3 +82,45 @@
 #define BSS_END			__end_bss
 
+/*
+ *  ãã¼ã¿ã¡ã¢ãªããªã¢
+ */
+	.macro	asm_data_memory_barrier reg1
+#ifdef ASM_DATA_MEMORY_BARRIER
+	ASM_DATA_MEMORY_BARRIER(reg1)
+#elif __TARGET_ARCH_ARM <= 6
+	mov		\reg1, #0
+	mcr		p15, 0, \reg1, c7, c10, 5
+#else /* __TARGET_ARCH_ARM <= 6 */
+	dmb
+#endif
+	.endm
+
+/*
+ *  ãã¼ã¿åæããªã¢
+ */
+	.macro	asm_data_sync_barrier reg1
+#ifdef ASM_DATA_SYNC_BARRIER
+	ASM_DATA_SYNC_BARRIER(reg1)
+#elif __TARGET_ARCH_ARM <= 6
+	mov		\reg1, #0
+	mcr		p15, 0, \reg1, c7, c10, 4
+#else /* __TARGET_ARCH_ARM <= 6 */
+	dsb
+#endif
+	.endm
+
+/*
+ *  å½ä»¤åæããªã¢
+ */
+	.macro	asm_inst_sync_barrier reg1
+#ifdef ASM_INST_SYNC_BARRIER
+	ASM_INST_SYNC_BARRIER(reg1)
+#elif __TARGET_ARCH_ARM <= 6
+	mov		\reg1, #0
+	mcr		p15, 0, \reg1, c7, c5, 4
+#else /* __TARGET_ARCH_ARM <= 6 */
+	isb
+#endif
+	.endm
+
 #endif /* TOPPERS_CORE_ASM_INC */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_check.trb
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_check.trb	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_check.trb	(revision 306)
@@ -3,10 +3,10 @@
 #		ãã¹3ã®çæã¹ã¯ãªããã®ã³ã¢ä¾å­é¨ï¼ARMç¨ï¼
 # 
-#  $Id: core_check.trb 588 2016-02-05 12:54:58Z ertl-hiro $
+#  $Id: core_check.trb 730 2016-04-03 02:04:52Z ertl-hiro $
 #
 
-# 
+#
 #  ã¿ã¼ã²ããéä¾å­é¨ã®ã¤ã³ã¯ã«ã¼ã
-# 
+#
 IncludeTrb("kernel/kernel_check.trb")
 
@@ -27,5 +27,5 @@
     error_wrong_id("E_PAR", params, :inthdr, :inhno, "not aligned")
   end
-  if $CHECK_FUNC_NONNULL == 1 && inthdr == 0
+  if $CHECK_FUNC_NONNULL && inthdr == 0
     error_wrong_id("E_PAR", params, :inthdr, :inhno, "null")
   end
@@ -47,5 +47,5 @@
     error_wrong_id("E_PAR", params, :exchdr, :excno, "not aligned")
   end
-  if $CHECK_FUNC_NONNULL == 1 && exchdr == 0
+  if $CHECK_FUNC_NONNULL && exchdr == 0
     error_wrong_id("E_PAR", params, :exchdr, :excno, "null")
   end
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel.h	(revision 306)
@@ -6,5 +6,5 @@
  *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
  *                              Toyohashi Univ. of Technology, JAPAN
- *  Copyright (C) 2004-2015 by Embedded and Real-Time Systems Laboratory
+ *  Copyright (C) 2004-2016 by Embedded and Real-Time Systems Laboratory
  *              Graduate School of Information Science, Nagoya Univ., JAPAN
  * 
@@ -53,5 +53,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: core_kernel.h 454 2015-08-16 03:18:46Z ertl-hiro $
+ *  $Id: core_kernel.h 718 2016-04-01 15:05:01Z ertl-hiro $
  */
 
@@ -109,4 +109,5 @@
 	uint32_t	r3;
 	uint32_t	r4;
+	uint32_t	r5;
 	uint32_t	r12;
 	uint32_t	lr;
@@ -125,4 +126,5 @@
 	uint32_t	r3;
 	uint32_t	r4;
+	uint32_t	r5;
 	uint32_t	r12;
 	uint32_t	lr;
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel.trb
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel.trb	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel.trb	(revision 306)
@@ -53,5 +53,5 @@
 #   ã®è²¬ä»»ãè² ããªãï¼
 # 
-#   $Id: core_kernel.trb 572 2016-02-01 14:40:09Z ertl-hiro $
+#   $Id: core_kernel.trb 662 2016-02-27 02:33:51Z ertl-hiro $
 # 
 
@@ -96,5 +96,5 @@
 #  å²è¾¼ã¿è¦æ±ã©ã¤ã³è¨­å®ãã¼ãã«
 #
-if $USE_INTCFG_TABLE == 1
+if $USE_INTCFG_TABLE
   $kernelCfgC.comment_header("Interrupt Configuration Table")
 
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel_impl.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel_impl.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel_impl.h	(revision 306)
@@ -6,5 +6,5 @@
  *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
  *                              Toyohashi Univ. of Technology, JAPAN
- *  Copyright (C) 2006-2015 by Embedded and Real-Time Systems Laboratory
+ *  Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory
  *              Graduate School of Information Science, Nagoya Univ., JAPAN
  * 
@@ -53,5 +53,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: core_kernel_impl.h 546 2016-01-16 06:00:09Z ertl-hiro $
+ *  $Id: core_kernel_impl.h 664 2016-02-29 16:32:29Z ertl-hiro $
  */
 
@@ -79,5 +79,5 @@
 #endif /* __thumb__ */
 #define CHECK_FUNC_NONNULL			/* é¢æ°ã®éNULLãã§ãã¯ */
-#define CHECK_STACK_ALIGN	4		/* ã¹ã¿ãã¯é åã®ã¢ã©ã¤ã³åä½ */
+#define CHECK_STACK_ALIGN	8		/* ã¹ã¿ãã¯é åã®ã¢ã©ã¤ã³åä½ */
 #define CHECK_STACK_NONNULL			/* ã¹ã¿ãã¯é åã®éNULLãã§ãã¯ */
 #define CHECK_MPF_ALIGN		4		/* åºå®é·ã¡ã¢ãªãã¼ã«é åã®ã¢ã©ã¤ã³åä½ */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_rename.def
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_rename.def	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_rename.def	(revision 306)
@@ -42,4 +42,10 @@
 irc_end_exc
 
+# pl310.c
+pl310_initialize
+pl310_disable
+pl310_invalidate_all
+pl310_clean_and_invalidate_all
+
 # target_kernel_impl.c
 arm_tnum_memory_area
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_rename.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_rename.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_rename.h	(revision 306)
@@ -58,4 +58,12 @@
 
 /*
+ *  pl310.c
+ */
+#define pl310_initialize			_kernel_pl310_initialize
+#define pl310_disable				_kernel_pl310_disable
+#define pl310_invalidate_all		_kernel_pl310_invalidate_all
+#define pl310_clean_and_invalidate_all	_kernel_pl310_clean_and_invalidate_all
+
+/*
  *  target_kernel_impl.c
  */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_sil.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_sil.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_sil.h	(revision 306)
@@ -5,5 +5,5 @@
  *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
  *                              Toyohashi Univ. of Technology, JAPAN
- *  Copyright (C) 2004-2014 by Embedded and Real-Time Systems Laboratory
+ *  Copyright (C) 2004-2016 by Embedded and Real-Time Systems Laboratory
  *              Graduate School of Information Science, Nagoya Univ., JAPAN
  * 
@@ -52,5 +52,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: core_sil.h 352 2015-07-25 06:36:42Z ertl-hiro $
+ *  $Id: core_sil.h 714 2016-03-31 05:52:19Z ertl-hiro $
  */
 
@@ -155,15 +155,4 @@
 #define SIL_UNL_INT()	(TOPPERS_set_fiq_irq(TOPPERS_fiq_irq_mask))
 
-/*
- *  å¾®å°æéå¾
-ã¡
- */
-Inline void
-sil_dly_nse(ulong_t dlytim) throw()
-{
-	register uint32_t r0 asm("r0") = (uint32_t) dlytim;
-	Asm("bl _sil_dly_nse" : "=g"(r0) : "0"(r0) : "lr","cc");
-}
-
 #endif /* TOPPERS_MACRO_ONLY */
 #endif /* TOPPERS_CORE_SIL_H */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_support.S
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_support.S	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_support.S	(revision 306)
@@ -6,5 +6,5 @@
  *  Copyright (C) 2000-2004 by Embedded and Real-Time Systems Laboratory
  *                              Toyohashi Univ. of Technology, JAPAN
- *  Copyright (C) 2006-2015 by Embedded and Real-Time Systems Laboratory
+ *  Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory
  *              Graduate School of Information Science, Nagoya Univ., JAPAN
  * 
@@ -53,5 +53,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: core_support.S 459 2015-08-29 13:03:42Z ertl-hiro $
+ *  $Id: core_support.S 733 2016-04-03 09:10:54Z ertl-hiro $
  */
 
@@ -72,5 +72,6 @@
  *  ä¾å¤ãã¯ã¿
  */
-	ASECTION(vector)
+	ASECTION(.vector)
+	AALIGN(5)
 	AGLOBAL(vector_table)
 ALABEL(vector_table)
@@ -122,5 +123,5 @@
 ã§å¼ã³åºãããï¼
 	 */
-	push	{lr}					/* æ»ãçªå°ãä¿å­ */
+	push	{r12,lr}				/* æ»ãçªå°ãä¿å­ï¼r12ã¯ããã¼ */
 #ifdef TOPPERS_SUPPORT_OVRHDR
 	bl		ovrtimer_stop
@@ -139,5 +140,5 @@
 	bl		ovrtimer_start
 #endif /* TOPPERS_SUPPORT_OVRHDR */
-	pop		{lr}					/* æ»ãçªå°ãå¾©å¸° */
+	pop		{r12,lr}				/* æ»ãçªå°ãå¾©å¸° */
 	bx		lr
 
@@ -325,5 +326,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_IRQ_BIT)
-	stmfd	sp!, {r0-r4,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
+	stmfd	sp!, {r0-r5,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 
 	/*
@@ -339,5 +340,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_IRQ_BIT)
-	str		r2, [sp,#0x1c]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
+	str		r2, [sp,#0x20]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
 	push	{r1}					/* spsrãã¹ã¿ãã¯ã«ä¿å­ */
 #else /* __TARGET_ARCH_ARM < 6 */
@@ -354,6 +355,13 @@
 	 */
 	cps		#CPSR_SVC_MODE
-	stmfd	sp!, {r0-r4,r12,lr}
+	stmfd	sp!, {r0-r5,r12,lr}
 #endif /* __TARGET_ARCH_ARM < 6 */
+
+	/*
+	 *  ã¹ã¿ãã¯ãã¤ã³ã¿ã®èª¿æ´
+	 */
+	and		r1, sp, #4
+	sub		sp, sp, r1
+	push	{r0,r1}					/* r0ã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 
 	/*
@@ -378,9 +386,9 @@
 	 *  éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã«åãæããï¼
 	 */
-	mov		r1, sp					/* ãã®æç¹ã®ã¹ã¿ãã¯ãã¤ã³ã¿ãr1ã« */
+	mov		r3, sp					/* ãã®æç¹ã®ã¹ã¿ãã¯ãã¤ã³ã¿ãr3ã« */
 	ldr		r2, =istkpt				/* éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã« */
 	ldr		sp, [r2]
-	push	{r1}					/* åæãåã®ã¹ã¿ãã¯ãã¤ã³ã¿ãä¿å­ */
-
+	push	{r0,r3}					/* åæãåã®ã¹ã¿ãã¯ãã¤ã³ã¿ãä¿å­ */
+									/* r0ã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 ALABEL(irq_handler_1)
 	/*
@@ -388,7 +396,12 @@
 	 */
 	bl		irc_begin_int
-	cmp		r4, #TNUM_INHNO			/* ã¹ããªã¢ã¹å²è¾¼ã¿ãªã */
-	bhs		irq_handler_2			/*  irq_handler_2ã«åå² */
-
+#if TNUM_INHNO <= 256 || __TARGET_ARCH_ARM <= 6
+	cmp		r4, #TNUM_INHNO			/* TNUM_INHNOã®å¤ã«ãã£ã¦ã¯ã¨ã©ã¼ã«ãªã */
+#else /* TNUM_INHNO <= 256 || __TARGET_ARCH_ARM <= 6 */
+	movw	r3, #TNUM_INHNO
+	cmp		r4, r3			
+#endif /* TNUM_INHNO <= 256 || __TARGET_ARCH_ARM <= 6 */
+	bhs		irq_handler_2			/* ã¹ããªã¢ã¹å²è¾¼ã¿ãªã */
+									/*  irq_handler_2ã«åå² */
 	/*
 	 *  CPUã­ãã¯è§£é¤ç¶æ
@@ -447,5 +460,4 @@
 ALABEL(irq_handler_2)
 	bl		irc_end_int
-#endif /* OMIT_IRQ_HANDLER */
 
 	/*
@@ -462,6 +474,6 @@
 	 *  ã¿ã¹ã¯ç¨ã®ã¹ã¿ãã¯ã«æ»ãï¼
 	 */
-	pop		{r1}
-	mov   	sp, r1
+	pop		{r0,r3}
+	mov   	sp, r3
 
 	/*
@@ -469,5 +481,4 @@
 è¦ãå¤å®ããï¼
 	 */
-ALABEL(ret_int_1)
 	ldr		r0, =p_runtsk			/* p_runtsk â r0 */
 	ldr		r0, [r0]
@@ -482,5 +493,5 @@
 	tst		r0, r0					/* p_runtskãNULLãªãdispatcher_0ã¸ */
 	beq		dispatcher_0
-	stmfd	sp!, {r5-r11}			/* éã¹ã¯ã©ããã¬ã¸ã¹ã¿ã®ä¿å­ */
+	stmfd	sp!, {r6-r11}			/* éã¹ã¯ã©ããã¬ã¸ã¹ã¿ã®ä¿å­ */
 	str		sp, [r0,#TCB_sp]		/* ã¹ã¿ãã¯ãã¤ã³ã¿ãä¿å­ */
 	adr		r1, ret_int_r			/* å®è¡åéçªå°ãä¿å­ */
@@ -492,5 +503,5 @@
 	 *  ã³ã³ãã­ã¹ããå¾©å¸°ããï¼
 	 */
-	ldmfd	sp!, {r5-r11}			/* éã¹ã¯ã©ããã¬ã¸ã¹ã¿ã®å¾©å¸° */
+	ldmfd	sp!, {r6-r11}			/* éã¹ã¯ã©ããã¬ã¸ã¹ã¿ã®å¾©å¸° */
 
 #ifdef TOPPERS_SUPPORT_OVRHDR
@@ -516,12 +527,14 @@
 #endif /* TOPPERS_SUPPORT_OVRHDR */
 ALABEL(irq_handler_3)
+	pop		{r0,r1}					/* ã¹ã¿ãã¯ãã¤ã³ã¿ã®èª¿æ´ */
+	add		sp, sp, r1
 #if __TARGET_ARCH_ARM < 6
 	ldmfd	sp!, {r0}				/* æ»ãå
 ã®cpsrãspsrã«è¨­å® */
 	msr		spsr_cxsf, r0
-	ldmfd	sp!, {r0-r4,r12,lr,pc}^	/* ã³ã³ãã­ã¹ãã®å¾©å¸° */
+	ldmfd	sp!, {r0-r5,r12,lr,pc}^	/* ã³ã³ãã­ã¹ãã®å¾©å¸° */
 									/* ^ä»ããªã®ã§ï¼spsr â cpsr */
 #else /* __TARGET_ARCH_ARM < 6 */
-	ldmfd	sp!, {r0-r4,r12,lr}
+	ldmfd	sp!, {r0-r5,r12,lr}
 	rfefd	sp!
 #endif /* __TARGET_ARCH_ARM < 6 */
@@ -536,4 +549,5 @@
 	b		irq_handler_3
 #endif /* TOPPERS_SUPPORT_OVRHDR */
+#endif /* OMIT_IRQ_HANDLER */
 
 /*
@@ -560,5 +574,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	stmfd	sp!, {r0-r4,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
+	stmfd	sp!, {r0-r5,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 
 	/*
@@ -573,5 +587,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	str		r2, [sp,#0x1c]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
+	str		r2, [sp,#0x20]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
 	push	{r1}					/* spsrãã¹ã¿ãã¯ã«ä¿å­ */
 #else /* __TARGET_ARCH_ARM < 6 */
@@ -587,5 +601,5 @@
 	 */
 	cps		#CPSR_SVC_MODE
-	stmfd	sp!, {r0-r4,r12,lr}
+	stmfd	sp!, {r0-r5,r12,lr}
 #endif /* __TARGET_ARCH_ARM < 6 */
 	mov		r4, #EXCNO_UNDEF
@@ -609,5 +623,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	stmfd	sp!, {r0-r4,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
+	stmfd	sp!, {r0-r5,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 
 	/*
@@ -620,5 +634,5 @@
 	 *  æ»ãçªå°ã¨spsrãä¿å­ããï¼
 	 */
-	str		r2, [sp,#0x1c]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
+	str		r2, [sp,#0x20]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
 	push	{r1}					/* spsrãã¹ã¿ãã¯ã«ä¿å­ */
 #else /* __TARGET_ARCH_ARM < 6 */
@@ -634,5 +648,5 @@
 	 */
 	cps		#CPSR_SVC_MODE			/* ä¸è¦ã¨æããã */
-	stmfd	sp!, {r0-r4,r12,lr}
+	stmfd	sp!, {r0-r5,r12,lr}
 #endif /* __TARGET_ARCH_ARM < 6 */
 	mov		r4, #EXCNO_SVC
@@ -657,5 +671,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	stmfd	sp!, {r0-r4,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
+	stmfd	sp!, {r0-r5,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 
 	/*
@@ -670,5 +684,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	str		r2, [sp,#0x1c]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
+	str		r2, [sp,#0x20]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
 	push	{r1}					/* spsrãã¹ã¿ãã¯ã«ä¿å­ */
 #else /* __TARGET_ARCH_ARM < 6 */
@@ -684,5 +698,5 @@
 	 */
 	cps		#CPSR_SVC_MODE
-	stmfd	sp!, {r0-r4,r12,lr}
+	stmfd	sp!, {r0-r5,r12,lr}
 #endif /* __TARGET_ARCH_ARM < 6 */
 	mov		r4, #EXCNO_PABORT
@@ -720,5 +734,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	stmfd	sp!, {r0-r4,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
+	stmfd	sp!, {r0-r5,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 
 	/*
@@ -733,5 +747,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	str		r2, [sp,#0x1c]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
+	str		r2, [sp,#0x20]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
 	push	{r1}					/* spsrãã¹ã¿ãã¯ã«ä¿å­ */
 #else /* __TARGET_ARCH_ARM < 6 */
@@ -747,5 +761,5 @@
 	 */
 	cps		#CPSR_SVC_MODE
-	stmfd	sp!, {r0-r4,r12,lr}
+	stmfd	sp!, {r0-r5,r12,lr}
 #endif /* __TARGET_ARCH_ARM < 6 */
 	mov		r4, #EXCNO_DABORT
@@ -766,5 +780,5 @@
 	ldr		sp, =istkpt
 	ldr		sp, [sp]
-	stmfd	sp!, {r0-r4,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
+	stmfd	sp!, {r0-r5,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 
 	/*
@@ -779,5 +793,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	str		r2, [sp,#0x1c]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
+	str		r2, [sp,#0x20]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
 	push	{r1}					/* spsrãã¹ã¿ãã¯ã«ä¿å­ */
 #else /* __TARGET_ARCH_ARM < 6 */
@@ -786,5 +800,5 @@
 	 *  ã¯ãã¤ã³ã¿ãåæåããï¼
 	 */
-	cpsid	if,#CPSR_SVC_MODE
+	cpsid	if, #CPSR_SVC_MODE
 	ldr		sp, =istkpt
 	ldr		sp, [sp]
@@ -802,5 +816,5 @@
 	 */
 	cps		#CPSR_SVC_MODE
-	stmfd	sp!, {r0-r4,r12,lr}
+	stmfd	sp!, {r0-r5,r12,lr}
 #endif /* __TARGET_ARCH_ARM < 6 */
 
@@ -833,5 +847,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	stmfd	sp!, {r0-r4,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
+	stmfd	sp!, {r0-r5,r12,lr,pc}		/* pcã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 
 	/*
@@ -846,5 +860,5 @@
 	 */
 	msr		cpsr_c, #(CPSR_SVC_MODE AOR CPSR_FIQ_IRQ_BIT)
-	str		r2, [sp,#0x1c]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
+	str		r2, [sp,#0x20]			/* æ»ãçªå°ãã¹ã¿ãã¯ã«ä¿å­ */
 	push	{r1}					/* spsrãã¹ã¿ãã¯ã«ä¿å­ */
 #else /* __TARGET_ARCH_ARM < 6 */
@@ -860,5 +874,5 @@
 	 */
 	cps		#CPSR_SVC_MODE
-	stmfd	sp!, {r0-r4,r12,lr}
+	stmfd	sp!, {r0-r5,r12,lr}
 #endif /* __TARGET_ARCH_ARM < 6 */
 	mov		r4, #EXCNO_FIQ
@@ -875,5 +889,5 @@
  * ããã®æç¹ã®ã¬ã¸ã¹ã¿ç¶æ
 ã
- *  r0ï¼CPUä¾å¤ãã³ãã©çªå·
+ *  r4ï¼CPUä¾å¤ãã³ãã©çªå·
  */
 ALABEL(exc_handler_1)
@@ -889,8 +903,15 @@
 	ldr		r3, [r2]
 	push	{r3}					/* ä¾å¤ãã¹ãã«ã¦ã³ããä¿å­ */
-	mov		r12, sp					/* CPUä¾å¤ã®æ
+	mov		r5, sp					/* CPUä¾å¤ã®æ
 å ±ãè¨æ¶ãã¦ããé åã® */
-									/*				å
-é ­çªå°ãr12ã«ä¿å­ */
+									/*				  å
+é ­çªå°ãr5ã«ä¿å­ */
+	/*
+	 *  ã¹ã¿ãã¯ãã¤ã³ã¿ã®èª¿æ´
+	 */
+	and		r1, sp, #4
+	sub		sp, sp, r1
+	push	{r0,r1}					/* r0ã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
+
 	/*
 	 *  ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ãå¤å®ãã
@@ -905,5 +926,5 @@
 	 *  ã®ãããããã»ããããã¦ãããªãï¼ããè©²å½ããï¼
 	 */
-	ldr		r1, [r12,#T_EXCINF_cpsr]	/* ä¾å¤ãã¬ã¼ã ããcpsrãåå¾ */
+	ldr		r1, [r5,#T_EXCINF_cpsr]		/* ä¾å¤ãã¬ã¼ã ããcpsrãåå¾ */
 	ands	r1, r1, #CPSR_FIQ_IRQ_BIT
 	bne		nk_exc_handler_1		/* ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ã®å¦çã¸ */
@@ -915,5 +936,5 @@
 	 *  r3ï¼excpt_nest_countã®å¤
 	 *  r4ï¼CPUä¾å¤ãã³ãã©çªå·
-	 *  r12ï¼CPUä¾å¤ã®æ
+	 *  r5ï¼CPUä¾å¤ã®æ
 å ±ãè¨æ¶ãã¦ããé åã®å
 é ­çªå°
@@ -932,7 +953,5 @@
 	 *  ãªã¼ãã©ã³ã¿ã¤ããåæ­¢ããï¼
 	 */
-	push	{r12}
 	bl		ovrtimer_stop
-	pop		{r12}
 #endif /* TOPPERS_SUPPORT_OVRHDR */
 
@@ -943,6 +962,6 @@
 	ldr		r2, =istkpt				/* éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã« */
 	ldr		sp, [r2]
-	push	{r3}					/* åæãåã®ã¹ã¿ãã¯ãã¤ã³ã¿ãä¿å­ */
-
+	push	{r0,r3}					/* åæãåã®ã¹ã¿ãã¯ãã¤ã³ã¿ãä¿å­ */
+									/* r0ã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 ALABEL(exc_handler_2)
 	/*
@@ -950,5 +969,5 @@
 ã
 	 *  r4ï¼CPUä¾å¤ãã³ãã©çªå·
-	 *  r12ï¼CPUä¾å¤ã®æ
+	 *  r5ï¼CPUä¾å¤ã®æ
 å ±ãè¨æ¶ãã¦ããé åã®å
 é ­çªå°
@@ -982,8 +1001,6 @@
 	 */
 #ifdef LOG_EXC_ENTER
-	push	{r12}
 	mov		r0, r4					/* CPUä¾å¤çªå·ããã©ã¡ã¼ã¿ã«æ¸¡ã */
 	bl		log_exc_enter
-	pop		{r12}
 #endif /* LOG_EXC_ENTER */
 
@@ -993,5 +1010,5 @@
 	ldr		r2, =exc_table			/* CPUä¾å¤ãã³ãã©ãã¼ãã«ã®èª­è¾¼ã¿ */
 	ldr		r3, [r2,r4,lsl #2]		/* CPUä¾å¤ãã³ãã©ã®çªå° â r3 */
-	mov		r0, r12					/* CPUä¾å¤ã®æ
+	mov		r0, r5					/* CPUä¾å¤ã®æ
 å ±ãè¨æ¶ãã¦ããé åã® */
 									/*		å
@@ -1035,30 +1052,88 @@
 	ldr		r3, [r2]
 	subs	r3, r3, #1
-	str		r3, [r2]
+	str		r3, [r2]				/* æ»ãå
+ãéã¿ã¹ã¯ã³ã³ãã­ã¹ããªã */
+	bne		exc_handler_3			/*				exc_handler_3ã«åå² */
 
 	/*
 	 *  ã¿ã¹ã¯ç¨ã®ã¹ã¿ãã¯ã«æ»ãï¼
 	 */
-	popeq	{r1}					/* æ»ãå
-ãã¿ã¹ã¯ã³ã³ãã­ã¹ããªã */
-	moveq	sp, r1					/*		 ã¿ã¹ã¯ç¨ã®ã¹ã¿ãã¯ã«æ»ã */
+	pop		{r0,r3}
+	mov		sp, r3
+
+	/*
+	 *  ãã£ã¹ããããå¿
+è¦ãå¤å®ããï¼
+	 */
+	ldr		r0, =p_runtsk			/* p_runtsk â r0 */
+	ldr		r0, [r0]
+	ldr		r1, =p_schedtsk			/* p_schedtsk â r1 */
+	ldr		r1, [r1]
+	teq		r0, r1					/* p_runtskã¨p_schedtskãåããªã */
+	beq		exc_handler_4			/*				  exc_handler_4ã¸ */
+
+	/*
+	 *  ã³ã³ãã­ã¹ããä¿å­ããï¼
+	 */
+	tst		r0, r0					/* p_runtskãNULLãªãdispatcher_0ã¸ */
+	beq		dispatcher_0
+	stmfd	sp!, {r6-r11}			/* éã¹ã¯ã©ããã¬ã¸ã¹ã¿ã®ä¿å­ */
+	str		sp, [r0,#TCB_sp]		/* ã¹ã¿ãã¯ãã¤ã³ã¿ãä¿å­ */
+	adr		r1, ret_exc_r			/* å®è¡åéçªå°ãä¿å­ */
+	str		r1, [r0,#TCB_pc]
+	b		dispatcher				/* r0ã«ã¯p_runtskãæ ¼ç´ããã¦ãã */
+
+ALABEL(ret_exc_r)
+	/*
+	 *  ã³ã³ãã­ã¹ããå¾©å¸°ããï¼
+	 */
+	ldmfd	sp!, {r6-r11}			/* éã¹ã¯ã©ããã¬ã¸ã¹ã¿ã®å¾©å¸° */
+
+#ifdef TOPPERS_SUPPORT_OVRHDR
+	/*
+	 *  ãªã¼ãã©ã³ã¿ã¤ããåä½éå§ããï¼
+	 */
+	bl		ovrtimer_start
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+
+	/*
+	 *  CPUä¾å¤å¦çããã®ãªã¿ã¼ã³
+	 *
+	 *  CPUä¾å¤å¦çããã®ãªã¿ã¼ã³ã«ããï¼CPUã­ãã¯è§£é¤ç¶æ
+ã«é·ç§»ããã
+	 *  ãã«ããå¿
+è¦ããããï¼ARMã¯CPSRã®ãããã«ãã£ã¦CPUã­ãã¯ç¶æ
+ã
+	 *  è¡¨ãã¦ããããï¼CPSRãå
+ã«æ»ãã¦ãªã¿ã¼ã³ããã°ããï¼
+	 */
+#ifndef TOPPERS_SUPPORT_OVRHDR
+ALABEL(exc_handler_4)
+#endif /* TOPPERS_SUPPORT_OVRHDR */
+ALABEL(exc_handler_3)
+	pop		{r0,r1}					/* ã¹ã¿ãã¯ãã¤ã³ã¿ã®èª¿æ´ */
+	add		sp, sp, r1
 	add		sp, sp, #8				/* ã¹ã¿ãã¯ä¸ã®æ
 å ±ãæ¨ã¦ã */
-	beq		ret_int_1				/* ret_int_1ã«åå² */
-
-	/*
-	 *  CPUä¾å¤å¦çããã®ãªã¿ã¼ã³ï¼irq_handler_3ã¨åãå¦çå
-å®¹ï¼
-	 */
 #if __TARGET_ARCH_ARM < 6
 	ldmfd	sp!, {r0}				/* æ»ãå
 ã®cpsrãspsrã«è¨­å® */
 	msr		spsr_cxsf, r0
-	ldmfd	sp!, {r0-r4,r12,lr,pc}^	/* ã³ã³ãã­ã¹ãã®å¾©å¸° */
+	ldmfd	sp!, {r0-r5,r12,lr,pc}^	/* ã³ã³ãã­ã¹ãã®å¾©å¸° */
 									/* ^ä»ããªã®ã§ï¼spsr â cpsr */
 #else /* __TARGET_ARCH_ARM < 6 */
-	ldmfd	sp!, {r0-r4,r12,lr}
+	ldmfd	sp!, {r0-r5,r12,lr}
 	rfefd	sp!
 #endif /* __TARGET_ARCH_ARM < 6 */
+
+#ifdef TOPPERS_SUPPORT_OVRHDR
+ALABEL(exc_handler_4)
+	/*
+	 *  ãªã¼ãã©ã³ã¿ã¤ããåä½éå§ããï¼
+	 */
+	tst		r0, r0					/* p_runtskãNULLã§ãªãå ´å */
+	blne	ovrtimer_start
+	b		exc_handler_3
+#endif /* TOPPERS_SUPPORT_OVRHDR */
 
 /*
@@ -1074,5 +1149,5 @@
 	 *  r3ï¼excpt_nest_countã®å¤
 	 *  r4ï¼CPUä¾å¤ãã³ãã©çªå·
-	 *  r12ï¼CPUä¾å¤ã®æ
+	 *  r5ï¼CPUä¾å¤ã®æ
 å ±ãè¨æ¶ãã¦ããé åã®å
 é ­çªå°
@@ -1093,6 +1168,6 @@
 	ldr		r2, =istkpt				/* éã¿ã¹ã¯ã³ã³ãã­ã¹ãç¨ã®ã¹ã¿ãã¯ã« */
 	ldr		sp, [r2]
-	push	{r3}					/* åæãåã®ã¹ã¿ãã¯ãã¤ã³ã¿ãä¿å­ */
-
+	push	{r0,r3}					/* åæãåã®ã¹ã¿ãã¯ãã¤ã³ã¿ãä¿å­ */
+									/* r0ã¯ã¹ãã¼ã¹ç¢ºä¿ã®ãã */
 ALABEL(nk_exc_handler_2)
 	/*
@@ -1109,5 +1184,5 @@
 	ldr		r2, =exc_table			/* CPUä¾å¤ãã³ãã©ãã¼ãã«ã®èª­è¾¼ã¿ */
 	ldr		r3, [r2,r4,lsl #2]		/* CPUä¾å¤ãã³ãã©ã®çªå° â r3 */
-	mov		r0, r12					/* CPUä¾å¤ã®æ
+	mov		r0, r5					/* CPUä¾å¤ã®æ
 å ±ãè¨æ¶ãã¦ããé åã® */
 									/*		å
@@ -1123,44 +1198,14 @@
 	ldr		r3, [r2]
 	subs	r3, r3, #1
-	str		r3, [r2]
+	str		r3, [r2]				/* æ»ãå
+ãéã¿ã¹ã¯ã³ã³ãã­ã¹ããªã */
+	bne		exc_handler_3			/*				exc_handler_3ã«åå² */
 
 	/*
 	 *  ã¿ã¹ã¯ç¨ã®ã¹ã¿ãã¯ã«æ»ãï¼
 	 */
-	popeq	{r1}					/* æ»ãå
-ãã¿ã¹ã¯ã³ã³ãã­ã¹ããªã */
-	moveq	sp, r1					/*		 ã¿ã¹ã¯ç¨ã®ã¹ã¿ãã¯ã«æ»ã */
-	add		sp, sp, #8				/* ã¹ã¿ãã¯ä¸ã®æ
-å ±ãæ¨ã¦ã */
-
-	/*
-	 *  CPUä¾å¤å¦çããã®ãªã¿ã¼ã³ï¼irq_handler_3ã¨åãå¦çå
-å®¹ï¼
-	 */
-#if __TARGET_ARCH_ARM < 6
-	ldmfd	sp!, {r0}				/* æ»ãå
-ã®cpsrãspsrã«è¨­å® */
-	msr		spsr_cxsf, r0
-	ldmfd	sp!, {r0-r4,r12,lr,pc}^	/* ã³ã³ãã­ã¹ãã®å¾©å¸° */
-									/* ^ä»ããªã®ã§ï¼spsr â cpsr */
-#else /* __TARGET_ARCH_ARM < 6 */
-	ldmfd	sp!, {r0-r4,r12,lr}
-	rfefd	sp!
-#endif /* __TARGET_ARCH_ARM < 6 */
-
-/*
- *  å¾®å°æéå¾
-ã¡
- */
-	ATEXT
-	AALIGN(2)
-	AGLOBAL(_sil_dly_nse)
-ALABEL(_sil_dly_nse)
-	subs	r0, r0, #SIL_DLY_TIM1
-	bxls	lr
-ALABEL(_sil_dly_nse1)
-	subs	r0, r0, #SIL_DLY_TIM2
-	bhi		_sil_dly_nse1
-	bx		lr
+	pop		{r0,r3}
+	mov		sp, r3
+	b		exc_handler_3
 
 /*
@@ -1186,2 +1231,27 @@
 
 #endif /* __thumb__ */
+
+/*
+ *  å¾®å°æéå¾
+ã¡
+ *
+ *  ã­ã£ãã·ã¥ã©ã¤ã³ã®ã©ã®å ´æã«ãããã®ãã£ã¦å®è¡æéãå¤ããããï¼å¤§
+ *  ããã®åä½ã§ã¢ã©ã¤ã³ãã¦ããï¼
+ */
+	ATEXT
+	AALIGN(8)
+	AGLOBAL(sil_dly_nse)
+ALABEL(sil_dly_nse)
+	mov		r1, #0
+	mcr		p15, 0, r1, c7, c5, 6		/* åå²äºæ¸¬å
+¨ä½ã®ç¡å¹å */
+	asm_inst_sync_barrier r3
+	subs	r0, r0, #SIL_DLY_TIM1
+	bxls	lr
+ALABEL(sil_dly_nse1)
+	mcr		p15, 0, r1, c7, c5, 6		/* åå²äºæ¸¬å
+¨ä½ã®ç¡å¹å */
+	asm_inst_sync_barrier r3
+	subs	r0, r0, #SIL_DLY_TIM2
+	bhi		sil_dly_nse1
+	bx		lr
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_sym.def
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_sym.def	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_sym.def	(revision 306)
@@ -1,4 +1,4 @@
 TARGET_ARCH_ARM,__TARGET_ARCH_ARM
-USE_INTCFG_TABLE,1,,defined(USE_INTCFG_TABLE)
+USE_INTCFG_TABLE,true,bool,defined(USE_INTCFG_TABLE)
 sizeof_TCB,sizeof(TCB)
 offsetof_TCB_p_tinib,"offsetof(TCB,p_tinib)"
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/core_unrename.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/core_unrename.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/core_unrename.h	(revision 306)
@@ -59,4 +59,12 @@
 
 /*
+ *  pl310.c
+ */
+#undef pl310_initialize
+#undef pl310_disable
+#undef pl310_invalidate_all
+#undef pl310_clean_and_invalidate_all
+
+/*
  *  target_kernel_impl.c
  */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_kernel_impl.c
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_kernel_impl.c	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_kernel_impl.c	(revision 306)
@@ -1,6 +1,5 @@
 /*
- *  TOPPERS/ASP Kernel
- *      Toyohashi Open Platform for Embedded Real-Time Systems/
- *      Advanced Standard Profile Kernel
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
  *
  *  Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory
@@ -51,5 +50,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: gic_kernel_impl.c 522 2016-01-14 06:56:53Z ertl-hiro $
+ *  $Id: gic_kernel_impl.c 714 2016-03-31 05:52:19Z ertl-hiro $
  */
 
@@ -138,5 +137,5 @@
 	 *  ãã¹ã¦ã®å²è¾¼ã¿ãã°ã«ã¼ã1ï¼IRQï¼ã«è¨­å®
 	 */
-	for (i = 0; i < GIC_TNUM_INTNO / 32; i++) {
+	for (i = 0; i < (GIC_TNUM_INTNO + 31) / 32; i++) {
 		sil_wrw_mem(GICD_IGROUPR(i), 0xffffffffU);
 	}
@@ -146,5 +145,5 @@
 	 *  ãã¹ã¦ã®å²è¾¼ã¿ãç¦æ­¢
 	 */
-	for (i = 0; i < GIC_TNUM_INTNO / 32; i++) {
+	for (i = 0; i < (GIC_TNUM_INTNO + 31) / 32; i++) {
 		sil_wrw_mem(GICD_ICENABLER(i), 0xffffffffU);
 	}
@@ -153,5 +152,5 @@
 	 *  ãã¹ã¦ã®å²è¾¼ã¿ãã³ãã£ã³ã°ãã¯ãªã¢
 	 */
-	for (i = 0; i < GIC_TNUM_INTNO / 32; i++) {
+	for (i = 0; i < (GIC_TNUM_INTNO + 31) / 32; i++) {
 		sil_wrw_mem(GICD_ICPENDR(i), 0xffffffffU);
 	}
@@ -161,5 +160,5 @@
 åº¦ã«è¨­å®
 	 */
-	for (i = 0; i < GIC_TNUM_INTNO / 4; i++){
+	for (i = 0; i < (GIC_TNUM_INTNO + 3) / 4; i++){
 		sil_wrw_mem(GICD_IPRIORITYR(i), 0xffffffffU);
 	}
@@ -169,5 +168,5 @@
 ±æããªãã§ã©ã«å²è¾¼ã¿ã®ã¿ã¼ã²ããããã­ã»ããµ0ã«è¨­å®
 	 */
-	for (i = GIC_INTNO_SPI0 / 4; i < GIC_TNUM_INTNO / 4; i++) {
+	for (i = GIC_INTNO_SPI0 / 4; i < (GIC_TNUM_INTNO + 3) / 4; i++) {
 		sil_wrw_mem(GICD_ITARGETSR(i), 0x01010101U);
 	}
@@ -176,5 +175,5 @@
 	 *  ãã¹ã¦ã®ããªãã§ã©ã«å²è¾¼ã¿ãã¬ãã«ããªã¬ã«è¨­å®
 	 */
-	for (i = GIC_INTNO_PPI0 / 16; i < GIC_TNUM_INTNO / 16; i++) {
+	for (i = GIC_INTNO_PPI0 / 16; i < (GIC_TNUM_INTNO + 15) / 16; i++) {
 #ifdef GIC_ARM11MPCORE
 		sil_wrw_mem(GICD_ICFGR(i), 0x55555555U);
@@ -198,4 +197,6 @@
 	sil_wrw_mem(GICD_CTLR, GICD_CTLR_DISABLE);
 }
+
+#ifndef OMIT_GIC_INITIALIZE_INTERRUPT
 
 /*
@@ -273,2 +274,4 @@
 	}
 }
+
+#endif /* OMIT_GIC_INITIALIZE_INTERRUPT */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_kernel_impl.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_kernel_impl.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_kernel_impl.h	(revision 306)
@@ -1,6 +1,5 @@
 /*
- *  TOPPERS/ASP Kernel
- *      Toyohashi Open Platform for Embedded Real-Time Systems/
- *      Advanced Standard Profile Kernel
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
  * 
  *  Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory
@@ -51,5 +50,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: gic_kernel_impl.h 535 2016-01-16 00:42:29Z ertl-hiro $
+ *  $Id: gic_kernel_impl.h 714 2016-03-31 05:52:19Z ertl-hiro $
  */
 
@@ -176,18 +175,18 @@
 #define GICD_TYPER			GIC_REG(GICD_BASE, 0x004)
 #define GICD_IIDR			GIC_REG(GICD_BASE, 0x008)
-#define GICD_IGROUPR(n)		GIC_REG(GICD_BASE, 0x080 + n * 4)
-#define GICD_ISENABLER(n)	GIC_REG(GICD_BASE, 0x100 + n * 4)
-#define GICD_ICENABLER(n)	GIC_REG(GICD_BASE, 0x180 + n * 4)
-#define GICD_ISPENDR(n)		GIC_REG(GICD_BASE, 0x200 + n * 4)
-#define GICD_ICPENDR(n)		GIC_REG(GICD_BASE, 0x280 + n * 4)
-#define GICD_ISACTIVER(n)	GIC_REG(GICD_BASE, 0x300 + n * 4)
-#define GICD_ICACTIVER(n)	GIC_REG(GICD_BASE, 0x380 + n * 4)
-#define GICD_IPRIORITYR(n)	GIC_REG(GICD_BASE, 0x400 + n * 4)
-#define GICD_ITARGETSR(n)	GIC_REG(GICD_BASE, 0x800 + n * 4)
-#define GICD_ICFGR(n)		GIC_REG(GICD_BASE, 0xc00 + n * 4)
-#define GICD_NSCAR(n)		GIC_REG(GICD_BASE, 0xe00 + n * 4)
+#define GICD_IGROUPR(n)		GIC_REG(GICD_BASE, 0x080 + (n) * 4)
+#define GICD_ISENABLER(n)	GIC_REG(GICD_BASE, 0x100 + (n) * 4)
+#define GICD_ICENABLER(n)	GIC_REG(GICD_BASE, 0x180 + (n) * 4)
+#define GICD_ISPENDR(n)		GIC_REG(GICD_BASE, 0x200 + (n) * 4)
+#define GICD_ICPENDR(n)		GIC_REG(GICD_BASE, 0x280 + (n) * 4)
+#define GICD_ISACTIVER(n)	GIC_REG(GICD_BASE, 0x300 + (n) * 4)
+#define GICD_ICACTIVER(n)	GIC_REG(GICD_BASE, 0x380 + (n) * 4)
+#define GICD_IPRIORITYR(n)	GIC_REG(GICD_BASE, 0x400 + (n) * 4)
+#define GICD_ITARGETSR(n)	GIC_REG(GICD_BASE, 0x800 + (n) * 4)
+#define GICD_ICFGR(n)		GIC_REG(GICD_BASE, 0xc00 + (n) * 4)
+#define GICD_NSCAR(n)		GIC_REG(GICD_BASE, 0xe00 + (n) * 4)
 #define GICD_SGIR			GIC_REG(GICD_BASE, 0xf00)
-#define GICD_CPENDSGIR(n)	GIC_REG(GICD_BASE, 0xf10 + n * 4)
-#define GICD_SPENDSGIR(n)	GIC_REG(GICD_BASE, 0xf20 + n * 4)
+#define GICD_CPENDSGIR(n)	GIC_REG(GICD_BASE, 0xf10 + (n) * 4)
+#define GICD_SPENDSGIR(n)	GIC_REG(GICD_BASE, 0xf20 + (n) * 4)
 
 /*
@@ -200,7 +199,8 @@
  *  å²è¾¼ã¿ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¬ã¸ã¹ã¿ï¼GICD_ICFGRnï¼ã®è¨­å®å¤
  *
- *  ç¬¬1ãããã¯ï¼ARM11 MPCoreã§ã¯å²è¾¼ã¿ã®éç¥å
-ãã­ã»ããµãè¨­å®ãããã
- *  ã«ä½¿ç¨ããã¦ãããï¼GICv1ããã³GICv2ã§ã¯äºç´ãããã¨ãªã£ã¦ããï¼
+ *  ç¬¬1ãããã¯ï¼ARM11 MPCoreããã³GICã®æ©ãææã®å®è£
+ã§ã¯å²è¾¼ã¿ã®éç¥
+ *  å
+ãã­ã»ããµãè¨­å®ããããã«ä½¿ç¨ããã¦ããï¼
  */
 #define GICD_ICFGRn_LEVEL	UINT_C(0x00)
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_support.S
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_support.S	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/gic_support.S	(revision 306)
@@ -1,6 +1,5 @@
 /*
- *  TOPPERS/ASP Kernel
- *      Toyohashi Open Platform for Embedded Real-Time Systems/
- *      Advanced Standard Profile Kernel
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
  * 
  *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
@@ -53,5 +52,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: gic_support.S 522 2016-01-14 06:56:53Z ertl-hiro $
+ *  $Id: gic_support.S 718 2016-04-01 15:05:01Z ertl-hiro $
  */
 
@@ -79,5 +78,6 @@
 å ±ï¼å²è¾¼ã¿çºçåã®å²è¾¼ã¿
  *  åªå
-åº¦ãã¹ã¯ï¼ãï¼ã¹ã¿ãã¯ã«ä¿å­ããï¼
+åº¦ãã¹ã¯ï¼ãï¼ã¹ã¿ãã¯ã®å
+é ­ã«ä¿å­ããï¼
  */
 	ATEXT
@@ -104,14 +104,8 @@
 	str		r0, [r1]			/* æ°ããå²è¾¼ã¿åªå
 åº¦ãã¹ã¯ãã»ãããã */
-//	DATA_SYNC_BARRIER			/* å²è¾¼ã¿åªå
+	asm_data_sync_barrier r0	/* å²è¾¼ã¿åªå
 åº¦ãã¹ã¯ãã»ãããããã®ãå¾
 ã¤ */
-#if __TARGET_ARCH_ARM == 6
-	mov		r0, #0
-	mcr		p15, 0, r0, c7, c10, 4
-#elif __TARGET_ARCH_ARM == 7
-	dsb
-#endif /* __TARGET_ARCH_ARM == 7 */
-	push	{r2}				/* irc_end_intã§ç¨ããæ
+	str		r2, [sp]			/* irc_end_intã§ç¨ããæ
 å ±ãä¿å­ */
 
@@ -141,5 +135,5 @@
 ã«æ»ãï¼
 	 */
-	pop		{r2}				/* irc_begin_intã§ä¿å­ããæ
+	ldr		r2, [sp]			/* irc_begin_intã§ä¿å­ããæ
 å ±ãå¾©å¸° */
 	ldr		r1, =GICC_PMR		/* å²è¾¼ã¿åªå
@@ -178,5 +172,6 @@
 å ±ï¼CPUä¾å¤çºçåã®å²è¾¼ã¿åªå
 åº¦ãã¹ã¯ï¼ãï¼ã¹ã¿ã
- *	ã¯ã«ä¿å­ããï¼
+ *	ã¯ã®å
+é ­ã«ä¿å­ããï¼
  */
 	ATEXT
@@ -191,5 +186,5 @@
 åº¦ãåå¾ */
 	ldr		r2, [r1]
-	push	{r2}				/* irc_end_excã§ç¨ããæ
+	str		r2, [sp]			/* irc_end_excã§ç¨ããæ
 å ±ãä¿å­ */
 	bx		lr
@@ -207,5 +202,5 @@
 ã«æ»ãï¼
 	 */
-	pop		{r2}				/* irc_begin_excã§ä¿å­ããæ
+	ldr		r2, [sp]			/* irc_begin_excã§ä¿å­ããæ
 å ±ãå¾©å¸° */
 	ldr		r1, =GICC_PMR		/* å²è¾¼ã¿åªå
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/pl310.c
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/pl310.c	(revision 306)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/pl310.c	(revision 306)
@@ -0,0 +1,185 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2013-2016 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id$
+ */
+
+/*
+ *		L2ã­ã£ãã·ã¥ã³ã³ãã­ã¼ã©ï¼PL310ï¼ã®æä½ã©ã¤ãã©ãª
+ */
+
+#include "kernel_impl.h"
+#include "pl310.h"
+
+Inline uint32_t
+get_way_mask(void)
+{
+	uint32_t	aux;
+	
+	aux = sil_rew_mem(PL310_AUX_CTRL);
+	if ((aux & PL310_AUX_CTRL_ASSOCIATIVITY) != 0U) {
+		/* 16ã¦ã§ã¤ */
+		return(0x0000ffffU);
+	}
+	else {
+		/* 8ã¦ã§ã¤ */
+		return(0x000000ffU);
+	}
+}
+
+Inline void
+pl310_cache_sync(void)
+{
+	sil_wrw_mem(PL310_CACHE_SYNC, 0);
+}
+
+Inline void
+pl310_inv_all(void)
+{
+	uint32_t	way_mask = get_way_mask();
+
+	/* ãã¹ã¦ã®ã¦ã§ã¤ãç¡å¹åãã */
+	sil_wrw_mem(PL310_INV_WAY, 0xffff);
+	while ((sil_rew_mem(PL310_INV_WAY) & way_mask) != 0U) ;
+	pl310_cache_sync();
+}
+
+Inline void
+pl310_debug_set(uint32_t val)
+{
+	sil_wrw_mem(PL310_DEBUG_CTRL, val);
+}
+
+/*
+ *  PL310ã®åæå
+ */
+void
+pl310_initialize(uint32_t aux_val, uint32_t aux_mask)
+{
+	uint32_t	aux;
+	uint32_t	prefetch;
+	uint32_t	prefetch_val = 0U;
+
+	/* L2ã­ã£ãã·ã¥ããã£ã¹ã¨ã¼ãã«ã®å ´åã®ã¿åæåãè¡ã */
+	if ((sil_rew_mem(PL310_CTRL) & 0x01) == 0U) {
+		/* å
+±æå±æ§ãç¡è¦ãã */
+		aux_val |= PL310_AUX_CTRL_IGNORE_SHARE;
+
+		/* å½ä»¤ããªãã§ãããã¤ãã¼ãã« */
+		aux_val |= PL310_AUX_CTRL_INST_PREFETCH;
+		prefetch_val |= PL310_AUX_CTRL_INST_PREFETCH;
+
+		/* ãã¼ã¿ããªãã§ãããã¤ãã¼ãã« */
+		aux_val |= PL310_AUX_CTRL_DATA_PREFETCH;
+		prefetch_val |= PL310_AUX_CTRL_DATA_PREFETCH;
+
+		/* ããã«ã©ã¤ã³ãã£ã«ãã¤ãã¼ãã« */
+		prefetch_val |= PL310_PREFETCH_CTRL_DLINEFILL;
+		prefetch_val |= PL310_PREFETCH_CTRL_INCR_DLINEFILL;
+                
+		/* è£å©å¶å¾¡ã¬ã¸ã¹ã¿ãè¨­å® */
+		aux = sil_rew_mem(PL310_AUX_CTRL);
+		sil_wrw_mem(PL310_AUX_CTRL, ((aux & aux_mask) | aux_val));
+
+		/* ããªãã§ããå¶å¾¡ã¬ã¸ã¹ã¿ãè¨­å® */
+		prefetch = sil_rew_mem(PL310_PREFETCH_CTRL);
+		sil_wrw_mem(PL310_PREFETCH_CTRL, (prefetch | prefetch_val));
+
+		/* L2ã­ã£ãã·ã¥ã®å
+¨ä½ã®ç¡å¹å */
+		pl310_inv_all();
+        
+		/* ã¯ã­ãã¯ã²ã¼ãã£ã³ã°ã¨ã¹ã¿ã³ãã¤ã¢ã¼ããã¤ãã¼ãã« */
+		sil_wrw_mem(PL310_POWER_CTRL, 0x03);
+        
+		/* L2ã­ã£ãã·ã¥ã®ã¤ãã¼ãã« */
+		sil_wrw_mem(PL310_CTRL, 0x01);
+	}    
+}
+
+/*
+ *  L2ã­ã£ãã·ã¥ã®ãã£ã¹ã¨ã¼ãã«
+ */
+void
+pl310_disable(void)
+{
+	pl310_clean_and_invalidate_all();
+	sil_wrw_mem(PL310_CTRL, 0x00);
+}
+
+/*
+ *  L2ã­ã£ãã·ã¥å
+¨ä½ã®ç¡å¹åï¼æ¸ãæ»ããªãï¼
+ */
+void
+pl310_invalidate_all(void)
+{
+	pl310_debug_set(0x03);
+	pl310_inv_all();
+	pl310_debug_set(0x00);
+}
+
+/*
+ *  L2ã­ã£ãã·ã¥å
+¨ä½ã®ã¯ãªã¼ã³ã¨ç¡å¹å
+ */
+void
+pl310_clean_and_invalidate_all(void)
+{
+	uint32_t	way_mask = get_way_mask();
+
+	pl310_debug_set(0x03);
+	sil_wrw_mem(PL310_CLEAN_INV_WAY, way_mask);
+	while ((sil_rew_mem(PL310_CLEAN_INV_WAY) & way_mask) != 0U) ;
+	pl310_cache_sync();
+	pl310_debug_set(0x00);
+}
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/pl310.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/pl310.h	(revision 306)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/pl310.h	(revision 306)
@@ -0,0 +1,148 @@
+/*
+ *  TOPPERS Software
+ *      Toyohashi Open Platform for Embedded Real-Time Systems
+ * 
+ *  Copyright (C) 2013-2016 by Embedded and Real-Time Systems Laboratory
+ *              Graduate School of Information Science, Nagoya Univ., JAPAN
+ * 
+ *  ä¸è¨èä½æ¨©è
+ã¯ï¼ä»¥ä¸ã®(1)ï½(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
+ *  ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
+ *  å¤ã»åé
+å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
+ *  (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
+ *      æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
+ *      ã¹ã³ã¼ãä¸­ã«å«ã¾ãã¦ãããã¨ï¼
+ *  (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨
+ *      è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
+ *      ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *  (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
+ *      ç¨ã§ããªãå½¢ã§åé
+å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
+ *      ã¨ï¼
+ *    (a) åé
+å¸ã«ä¼´ããã­ã¥ã¡ã³ãï¼å©ç¨è
+ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
+ *        ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
+ *    (b) åé
+å¸ã®å½¢æ
+ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSãã­ã¸ã§ã¯ãã«
+ *        å ±åãããã¨ï¼
+ *  (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
+ *      å®³ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ããå
+è²¬ãããã¨ï¼
+ *      ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
+ *      ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
+ããã³TOPPERSãã­ã¸ã§ã¯ãã
+ *      å
+è²¬ãããã¨ï¼
+ * 
+ *  æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
+ã
+ *  ãã³TOPPERSãã­ã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
+ *  ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
+ *  ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
+ *  ã®è²¬ä»»ãè² ããªãï¼
+ * 
+ *  $Id$
+ */
+
+/*
+ *		L2ã­ã£ãã·ã¥ã³ã³ãã­ã¼ã©ï¼PL310ï¼ã«é¢ããå®ç¾©
+ */
+
+#ifndef TOPPERS_PL310_H
+#define TOPPERS_PL310_H
+
+/*
+ *  åã­ã£ã¹ããè¡ããã¯ã­ã®å®ç¾©
+ */
+#ifndef CAST
+#define CAST(type, val)		((type)(val))
+#endif /* CAST */
+
+/*
+ *  PL310ã®ã¬ã¸ã¹ã¿ã®çªå°ã®å®ç¾©
+ */
+#define PL310_CACHE_ID			CAST(uint32_t *, PL310_BASE + 0x000)
+#define PL310_CACHE_TYPE		CAST(uint32_t *, PL310_BASE + 0x004)
+#define PL310_CTRL				CAST(uint32_t *, PL310_BASE + 0x100)
+#define PL310_AUX_CTRL			CAST(uint32_t *, PL310_BASE + 0x104)
+#define PL310_TAG_RAM_CTRL		CAST(uint32_t *, PL310_BASE + 0x108)
+#define PL310_DATA_RAM_CTRL		CAST(uint32_t *, PL310_BASE + 0x10c)
+#define PL310_EVENT_CNT_CTRL	CAST(uint32_t *, PL310_BASE + 0x200)
+#define PL310_EVENT_CNT1_CFG	CAST(uint32_t *, PL310_BASE + 0x204)
+#define PL310_EVENT_CNT0_CFG	CAST(uint32_t *, PL310_BASE + 0x208)
+#define PL310_EVENT_CNT1		CAST(uint32_t *, PL310_BASE + 0x20c)
+#define PL310_EVENT_CNT0		CAST(uint32_t *, PL310_BASE + 0x210)
+#define PL310_INT_MASK			CAST(uint32_t *, PL310_BASE + 0x214)
+#define PL310_INT_MASK_STAT		CAST(uint32_t *, PL310_BASE + 0x218)
+#define PL310_INT_RAW_STAT		CAST(uint32_t *, PL310_BASE + 0x21c)
+#define PL310_INT_CLEAR			CAST(uint32_t *, PL310_BASE + 0x220)
+#define PL310_CACHE_SYNC		CAST(uint32_t *, PL310_BASE + 0x730)
+#define PL310_INV_PA			CAST(uint32_t *, PL310_BASE + 0x770)
+#define PL310_INV_WAY			CAST(uint32_t *, PL310_BASE + 0x77c)
+#define PL310_CLEAN_PA			CAST(uint32_t *, PL310_BASE + 0x7b0)
+#define PL310_CLEAN_IDX			CAST(uint32_t *, PL310_BASE + 0x7b8)
+#define PL310_CLEAN_WAY			CAST(uint32_t *, PL310_BASE + 0x7bc)
+#define PL310_CLEAN_INV_PA		CAST(uint32_t *, PL310_BASE + 0x7f0)
+#define PL310_CLEAN_INV_IDX		CAST(uint32_t *, PL310_BASE + 0x7f8)
+#define PL310_CLEAN_INV_WAY		CAST(uint32_t *, PL310_BASE + 0x7Fc)
+#define PL310_D_LOCKDOWN0		CAST(uint32_t *, PL310_BASE + 0x900)
+#define PL310_I_LOCKDOWN0		CAST(uint32_t *, PL310_BASE + 0x904)
+#define PL310_DEBUG_CTRL		CAST(uint32_t *, PL310_BASE + 0xf40)
+#define PL310_PREFETCH_CTRL		CAST(uint32_t *, PL310_BASE + 0xf60)
+#define PL310_POWER_CTRL		CAST(uint32_t *, PL310_BASE + 0xf80)
+
+/*
+ *  ã­ã£ãã·ã¥è£å©å¶å¾¡ã¬ã¸ã¹ã¿ï¼PL310_AUX_CTRLï¼ã®è¨­å®å¤
+ */
+#define PL310_AUX_CTRL_ASSOCIATIVITY		0x00010000
+#define PL310_AUX_CTRL_WAY_SIZE_SHIFT		17
+#define PL310_AUX_CTRL_WAY_SIZE_MASK		0x000e0000
+#define PL310_AUX_CTRL_IGNORE_SHARE			0x00400000
+#define PL310_AUX_CTRL_NS_LOCKDOWN			0x04000000
+#define PL310_AUX_CTRL_NS_INT_CTRL			0x08000000
+#define PL310_AUX_CTRL_DATA_PREFETCH		0x10000000
+#define PL310_AUX_CTRL_INST_PREFETCH		0x20000000
+#define PL310_AUX_CTRL_EARLY_BRESP			0x40000000
+
+/*
+ *  ããªãã§ããå¶å¾¡ã¬ã¸ã¹ã¿ï¼PL310_PREFETCH_CTRLï¼ã®è¨­å®å¤
+ */
+#define PL310_PREFETCH_CTRL_INCR_DLINEFILL	0x00800000
+#define PL310_PREFETCH_CTRL_DATA_PREFETCH	0x10000000
+#define PL310_PREFETCH_CTRL_INST_PREFETCH	0x20000000
+#define PL310_PREFETCH_CTRL_DLINEFILL		0x40000000
+
+#ifndef TOPPERS_MACRO_ONLY
+
+/*
+ *  L2ã­ã£ãã·ã¥ã®åæåã¨ã¤ãã¼ãã«
+ */
+extern void pl310_initialize(uint32_t aux_val, uint32_t aux_mask);
+
+/*
+ *  L2ã­ã£ãã·ã¥ã®ãã£ã¹ã¨ã¼ãã«
+ */
+extern void pl310_disable(void);
+
+/*
+ *  L2ã­ã£ãã·ã¥å
+¨ä½ã®ç¡å¹åï¼æ¸ãæ»ããªãï¼
+ */
+extern void pl310_invalidate_all(void);
+
+/*
+ *  L2ã­ã£ãã·ã¥å
+¨ä½ã®ã¯ãªã¼ã³ã¨ç¡å¹å
+ */
+extern void pl310_clean_and_invalidate_all(void);
+
+#endif /* TOPPERS_MACRO_ONLY */
+#endif /* TOPPERS_PL310_H */
Index: asp3_wo_tecs/trunk/arch/arm_gcc/common/uart_pl011.h
===================================================================
--- asp3_wo_tecs/trunk/arch/arm_gcc/common/uart_pl011.h	(revision 305)
+++ asp3_wo_tecs/trunk/arch/arm_gcc/common/uart_pl011.h	(revision 306)
@@ -6,5 +6,5 @@
  *  Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
  *                              Toyohashi Univ. of Technology, JAPAN
- *  Copyright (C) 2006-2015 by Embedded and Real-Time Systems Laboratory
+ *  Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory
  *              Graduate School of Information Science, Nagoya Univ., JAPAN
  * 
@@ -53,5 +53,5 @@
  *  ã®è²¬ä»»ãè² ããªãï¼
  * 
- *  $Id: uart_pl011.h 359 2015-07-26 10:27:20Z ertl-hiro $
+ *  $Id: uart_pl011.h 509 2016-01-12 06:06:14Z ertl-hiro $
  */
 
