Changeset 304 for asp3_wo_tecs/trunk/arch/arm_gcc
- Timestamp:
- Jun 26, 2017, 5:33:59 PM (7 years ago)
- Location:
- asp3_wo_tecs/trunk/arch/arm_gcc
- Files:
-
- 4 added
- 4 deleted
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
asp3_wo_tecs/trunk/arch/arm_gcc/common/Makefile.core
r302 r304 36 36 # ã³ã³ãã£ã®ã¥ã¬ã¼ã¿é¢ä¿ã®å¤æ°ã®å®ç¾© 37 37 # 38 CFG_TABS := $(CFG_TABS) -- cfg1-def-table $(COREDIR)/core_def.csv38 CFG_TABS := $(CFG_TABS) --symval-table $(COREDIR)/core_sym.def 39 39 40 40 # 41 41 # ãªãã»ãããã¡ã¤ã«çæã®ããã®å®ç¾© 42 42 # 43 OFFSET_TF = $(COREDIR)/core_offset.tf 43 TARGET_OFFSET_TRB = $(COREDIR)/core_offset.trb 44 44 45 45 # -
asp3_wo_tecs/trunk/arch/arm_gcc/common/arm_insn.h
r302 r304 5 5 * Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory 6 6 * Toyohashi Univ. of Technology, JAPAN 7 * Copyright (C) 2006-201 5by Embedded and Real-Time Systems Laboratory7 * Copyright (C) 2006-2016 by Embedded and Real-Time Systems Laboratory 8 8 * Graduate School of Information Science, Nagoya Univ., JAPAN 9 9 * … … 52 52 * ã®è²¬ä»»ãè² ããªãï¼ 53 53 * 54 * $Id: arm_insn.h 438 2015-08-09 01:37:47Z ertl-hiro $54 * $Id: arm_insn.h 547 2016-01-16 06:26:08Z ertl-hiro $ 55 55 */ 56 56 … … 365 365 * ã§ã¯æ大ç¯å²ï¼ã·ã¹ãã å 366 366 ¨ä½ï¼ãªã¼ãï¼ã©ã¤ãã®ä¸¡æ¹ï¼ã§åæãåãï¼ 367 * 368 * ARMv5以åã§ã¯ï¼ã¡ã¢ãªããªã¢æ©è½ã¯å®è£ 369 ä¾åã§ããããï¼ããããï¼ 370 * DATA_MEMORY_BARRIERï¼DATA_SYNC_BARRIERï¼INST_SYNC_BARRIERãå®ç¾©ãã 371 * ãã¨ã«ãã£ã¦ï¼é¢æ°ã®å 372 容ãå 373 ¥ãæããããããã«ãã¦ããï¼ 367 374 */ 368 375 … … 377 384 data_memory_barrier(void) 378 385 { 379 #if __TARGET_ARCH_ARM <= 6 386 #ifdef DATA_MEMORY_BARRIER 387 DATA_MEMORY_BARRIER(); 388 #elif __TARGET_ARCH_ARM <= 6 380 389 CP15_DATA_MEMORY_BARRIER(); 381 390 #else /* __TARGET_ARCH_ARM <= 6 */ 382 391 Asm("dmb":::"memory"); 383 #endif /* __TARGET_ARCH_ARM <= 6 */392 #endif 384 393 } 385 394 … … 396 405 data_sync_barrier(void) 397 406 { 398 #if __TARGET_ARCH_ARM <= 6 407 #ifdef DATA_SYNC_BARRIER 408 DATA_SYNC_BARRIER(); 409 #elif __TARGET_ARCH_ARM <= 6 399 410 CP15_DATA_SYNC_BARRIER(); 400 411 #else /* __TARGET_ARCH_ARM <= 6 */ 401 412 Asm("dsb":::"memory"); 402 #endif /* __TARGET_ARCH_ARM <= 6 */413 #endif 403 414 } 404 415 … … 415 426 inst_sync_barrier(void) 416 427 { 417 #if __TARGET_ARCH_ARM <= 6 428 #ifdef INST_SYNC_BARRIER 429 INST_SYNC_BARRIER(); 430 #elif __TARGET_ARCH_ARM <= 6 418 431 CP15_INST_SYNC_BARRIER(); 419 432 #else /* __TARGET_ARCH_ARM <= 6 */ 420 433 Asm("isb":::"memory"); 421 #endif /* __TARGET_ARCH_ARM <= 6 */434 #endif 422 435 } 423 436 -
asp3_wo_tecs/trunk/arch/arm_gcc/common/core_kernel_impl.h
r302 r304 53 53 * ã®è²¬ä»»ãè² ããªãï¼ 54 54 * 55 * $Id: core_kernel_impl.h 471 2015-12-30 10:03:16Z ertl-hiro $55 * $Id: core_kernel_impl.h 546 2016-01-16 06:00:09Z ertl-hiro $ 56 56 */ 57 57 … … 482 482 * å¤æãã¼ãã«ãã¼ã¹ã¬ã¸ã¹ã¿ï¼TTBRï¼ã®è¨å®å¤ 483 483 */ 484 #if __TARGET_ARCH_ARM < 7 484 #if __TARGET_ARCH_ARM < 6 485 #define TTBR_CONFIG 0U 486 #elif __TARGET_ARCH_ARM < 7 485 487 #define TTBR_CONFIG (CP15_TTBR_RGN_CACHEABLE|CP15_TTBR_RGN_SHAREABLE \ 486 488 |CP15_TTBR_RGN_WBACK) … … 488 490 #define TTBR_CONFIG (CP15_TTBR_RGN_SHAREABLE|CP15_TTBR_RGN_WBWA \ 489 491 |CP15_TTBR_IRGN_WBWA) 490 #endif /* __TARGET_ARCH_ARM < 7 */492 #endif 491 493 492 494 #ifndef TOPPERS_MACRO_ONLY -
asp3_wo_tecs/trunk/arch/arm_gcc/common/core_rename.h
r302 r304 63 63 #define arm_memory_area _kernel_arm_memory_area 64 64 65 #ifdef TOPPERS_LABEL_ASM66 67 /*68 * kernel_cfg.c69 */70 #define _inh_table __kernel_inh_table71 #define _intcfg_table __kernel_intcfg_table72 #define _exc_table __kernel_exc_table73 74 /*75 * core_support.S76 */77 #define _dispatch __kernel_dispatch78 #define _start_dispatch __kernel_start_dispatch79 #define _exit_and_dispatch __kernel_exit_and_dispatch80 #define _call_exit_kernel __kernel_call_exit_kernel81 #define _start_r __kernel_start_r82 #define _irq_handler __kernel_irq_handler83 #define _undef_handler __kernel_undef_handler84 #define _svc_handler __kernel_svc_handler85 #define _pabort_handler __kernel_pabort_handler86 #define _dabort_handler __kernel_dabort_handler87 #define _fiq_handler __kernel_fiq_handler88 #define _current_cpsr __kernel_current_cpsr89 #define _set_cpsr __kernel_set_cpsr90 91 /*92 * core_kernel_impl.c93 */94 #define _excpt_nest_count __kernel_excpt_nest_count95 #define _arm_mmu_initialize __kernel_arm_mmu_initialize96 #define _core_initialize __kernel_core_initialize97 #define _core_terminate __kernel_core_terminate98 #define _xlog_sys __kernel_xlog_sys99 #define _xlog_fsr __kernel_xlog_fsr100 #define _default_int_handler __kernel_default_int_handler101 #define _default_exc_handler __kernel_default_exc_handler102 103 /*104 * gic_kernel_impl.c105 */106 #define _gicc_initialize __kernel_gicc_initialize107 #define _gicc_terminate __kernel_gicc_terminate108 #define _gicd_initialize __kernel_gicd_initialize109 #define _gicd_terminate __kernel_gicd_terminate110 111 /*112 * gic_support.S113 */114 #define _irc_begin_int __kernel_irc_begin_int115 #define _irc_end_int __kernel_irc_end_int116 #define _irc_get_intpri __kernel_irc_get_intpri117 #define _irc_begin_exc __kernel_irc_begin_exc118 #define _irc_end_exc __kernel_irc_end_exc119 120 /*121 * target_kernel_impl.c122 */123 #define _arm_tnum_memory_area __kernel_arm_tnum_memory_area124 #define _arm_memory_area __kernel_arm_memory_area125 126 #endif /* TOPPERS_LABEL_ASM */127 128 65 129 66 #endif /* TOPPERS_CORE_RENAME_H */ -
asp3_wo_tecs/trunk/arch/arm_gcc/common/core_unrename.h
r302 r304 64 64 #undef arm_memory_area 65 65 66 #ifdef TOPPERS_LABEL_ASM67 68 /*69 * kernel_cfg.c70 */71 #undef _inh_table72 #undef _intcfg_table73 #undef _exc_table74 75 /*76 * core_support.S77 */78 #undef _dispatch79 #undef _start_dispatch80 #undef _exit_and_dispatch81 #undef _call_exit_kernel82 #undef _start_r83 #undef _irq_handler84 #undef _undef_handler85 #undef _svc_handler86 #undef _pabort_handler87 #undef _dabort_handler88 #undef _fiq_handler89 #undef _current_cpsr90 #undef _set_cpsr91 92 /*93 * core_kernel_impl.c94 */95 #undef _excpt_nest_count96 #undef _arm_mmu_initialize97 #undef _core_initialize98 #undef _core_terminate99 #undef _xlog_sys100 #undef _xlog_fsr101 #undef _default_int_handler102 #undef _default_exc_handler103 104 /*105 * gic_kernel_impl.c106 */107 #undef _gicc_initialize108 #undef _gicc_terminate109 #undef _gicd_initialize110 #undef _gicd_terminate111 112 /*113 * gic_support.S114 */115 #undef _irc_begin_int116 #undef _irc_end_int117 #undef _irc_get_intpri118 #undef _irc_begin_exc119 #undef _irc_end_exc120 121 /*122 * target_kernel_impl.c123 */124 #undef _arm_tnum_memory_area125 #undef _arm_memory_area126 127 #endif /* TOPPERS_LABEL_ASM */128 129 66 130 67 #endif /* TOPPERS_CORE_RENAME_H */ -
asp3_wo_tecs/trunk/arch/arm_gcc/mpcore/chip_rename.h
r302 r304 18 18 19 19 20 #ifdef TOPPERS_LABEL_ASM21 22 /*23 * chip_kernel_impl.c24 */25 #define _chip_initialize __kernel_chip_initialize26 #define _chip_terminate __kernel_chip_terminate27 28 /*29 * chip_timer.c30 */31 #define _target_hrt_initialize __kernel_target_hrt_initialize32 #define _target_hrt_terminate __kernel_target_hrt_terminate33 #define _target_hrt_handler __kernel_target_hrt_handler34 35 36 #endif /* TOPPERS_LABEL_ASM */37 38 20 #include "core_rename.h" 39 21 -
asp3_wo_tecs/trunk/arch/arm_gcc/mpcore/chip_unrename.h
r302 r304 19 19 20 20 21 #ifdef TOPPERS_LABEL_ASM22 23 /*24 * chip_kernel_impl.c25 */26 #undef _chip_initialize27 #undef _chip_terminate28 29 /*30 * chip_timer.c31 */32 #undef _target_hrt_initialize33 #undef _target_hrt_terminate34 #undef _target_hrt_handler35 36 37 #endif /* TOPPERS_LABEL_ASM */38 39 21 #include "core_unrename.h" 40 22
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