Index: uKadecot/trunk/pfatfs/diskio.c
===================================================================
--- uKadecot/trunk/pfatfs/diskio.c	(revision 108)
+++ uKadecot/trunk/pfatfs/diskio.c	(revision 154)
@@ -21,9 +21,6 @@
 #define RamDisk		((unsigned char *)0xfff00000)
 #else
-#include <windows.h>
-#include <tchar.h>
-#include <winioctl.h>
-
 unsigned char RamDisk[SZ_RAMDISK * 1024];
+extern void win_disk_initialize(void *ramDisk, int size);
 #endif
 
@@ -34,8 +31,8 @@
 	DWORD wip;
 	DWORD n_sectors;
-} STAT;
+} RD_STAT;
 
 static volatile
-STAT Stat[MAX_DRIVES];
+RD_STAT Stat[MAX_DRIVES];
 
 static
@@ -43,5 +40,5 @@
 
 static
-int get_status(volatile STAT *stat) {
+int get_status(volatile RD_STAT *stat) {
 	stat->sz_sector = SS_RAMDISK;
 	if(stat->sz_sector < _MIN_SS || stat->sz_sector > _MAX_SS) return 0;
@@ -54,16 +51,9 @@
 /* Initialize Disk Drive                                                 */
 /*-----------------------------------------------------------------------*/
-DSTATUS disk_initialize (void)
+DSTATUS ramdisk_initialize (void)
 {
 	DSTATUS sta;
 #ifdef _MSC_VER
-	HANDLE h;
-	DWORD br;
-
-	h = CreateFile(_T("..\\..\\..\\..\\uip\\apps\\webserver\\httpd-fs.bin"), GENERIC_READ, 0, 0, OPEN_EXISTING, 0, 0);
-	if (h != INVALID_HANDLE_VALUE) {
-		ReadFile(h, RamDisk, sizeof(RamDisk), &br, 0);
-		CloseHandle(h);
-	}
+	win_disk_initialize(RamDisk, sizeof(RamDisk));
 #endif
 	get_status(&Stat[0]);
@@ -77,5 +67,5 @@
 /* Get Disk Status                                                       */
 /*-----------------------------------------------------------------------*/
-DSTATUS disk_get_status (void)
+DSTATUS ramdisk_get_status (void)
 {
 	return Stat[0].status;
@@ -85,5 +75,5 @@
 /* Read Partial Sector                                                   */
 /*-----------------------------------------------------------------------*/
-DRESULT disk_readp (
+DRESULT ramdisk_readp (
 	BYTE* buff,		/* Data read buffer */
 	DWORD sector,	/* Sector number (LBA) */
@@ -118,5 +108,5 @@
 /* Write Partial Sector                                                  */
 /*-----------------------------------------------------------------------*/
-DRESULT disk_writep (
+DRESULT ramdisk_writep (
 	const BYTE* buff,	/* Pointer to the write data */
 	DWORD sc			/* Sector number (LBA), Number of bytes to send */
Index: uKadecot/trunk/pfatfs/diskio.h
===================================================================
--- uKadecot/trunk/pfatfs/diskio.h	(revision 108)
+++ uKadecot/trunk/pfatfs/diskio.h	(revision 154)
@@ -19,8 +19,9 @@
 /* Results of Disk Functions */
 typedef enum {
-	RES_OK = 0,		/* 0: Function succeeded */
-	RES_ERROR,		/* 1: Disk error */
-	RES_NOTRDY,		/* 2: Not ready */
-	RES_PARERR		/* 3: Invalid parameter */
+	RES_OK = 0,		/* 0: Successful */
+	RES_ERROR,		/* 1: R/W Error */
+	RES_WRPRT,		/* 2: Write Protected */
+	RES_NOTRDY,		/* 3: Not Ready */
+	RES_PARERR		/* 4: Invalid Parameter */
 } DRESULT;
 
@@ -29,12 +30,33 @@
 /* Prototypes for disk control functions */
 
-DSTATUS disk_initialize (void);
-DSTATUS disk_get_status (void);
-DRESULT disk_readp (BYTE* buff, DWORD sector, UINT offset, UINT count);
-DRESULT disk_writep (const BYTE* buff, DWORD sc);
+DSTATUS ramdisk_initialize (void);
+DSTATUS ramdisk_get_status (void);
+DRESULT ramdisk_readp (BYTE* buff, DWORD sector, UINT offset, UINT count);
+DRESULT ramdisk_writep (const BYTE* buff, DWORD sc);
 
 #define STA_NOINIT		0x01	/* Drive not initialized */
 #define STA_NODISK		0x02	/* No medium in the drive */
+#define STA_PROTECT		0x04	/* Write protected */
 
+/* Generic command (Used by FatFs) */
+#define CTRL_SYNC			0	/* Complete pending write process (needed at _FS_READONLY == 0) */
+#define GET_SECTOR_COUNT	1	/* Get media size (needed at _USE_MKFS == 1) */
+#define GET_SECTOR_SIZE		2	/* Get sector size (needed at _MAX_SS != _MIN_SS) */
+#define GET_BLOCK_SIZE		3	/* Get erase block size (needed at _USE_MKFS == 1) */
+#define CTRL_TRIM			4	/* Inform device that the data on the block of sectors is no longer used (needed at _USE_TRIM == 1) */
+
+/* MMC/SDC specific command (Not used by FatFs) */
+#define MMC_GET_TYPE		50	/* Get card type */
+#define MMC_GET_CSD			51	/* Get CSD */
+#define MMC_GET_CID			52	/* Get CID */
+#define MMC_GET_OCR			53	/* Get OCR */
+#define MMC_GET_SDSTAT		54	/* Get SD status */
+
+/* MMC card type flags (MMC_GET_TYPE) */
+#define CT_MMC		0x01		/* MMC ver 3 */
+#define CT_SD1		0x02		/* SD ver 1 */
+#define CT_SD2		0x04		/* SD ver 2 */
+#define CT_SDC		(CT_SD1|CT_SD2)	/* SD */
+#define CT_BLOCK	0x08		/* Block addressing */
 
 #ifdef __cplusplus
Index: uKadecot/trunk/pfatfs/mmc_rspi.c
===================================================================
--- uKadecot/trunk/pfatfs/mmc_rspi.c	(revision 154)
+++ uKadecot/trunk/pfatfs/mmc_rspi.c	(revision 154)
@@ -0,0 +1,819 @@
+/*------------------------------------------------------------------------*/
+/* FRK-RX62N: MMCv3/SDv1/SDv2 (SPI mode) Control Module                   */
+/*------------------------------------------------------------------------*/
+/*
+/  Copyright (C) 2014, ChaN, all right reserved.
+/
+/ * This software is a free software and there is NO WARRANTY.
+/ * No restriction on use. You can use, modify and redistribute it for
+/   personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/-------------------------------------------------------------------------*/
+
+#include <kernel.h>	/* Platform dependent include file */
+#include <t_syslog.h>
+#include <kernel/kernel_rename.h>
+#include <sil.h>
+#include <string.h>
+#include "pffconf.h"
+#include "target_config.h"
+#include "kernel_cfg.h"
+#include "mmc_rspi.h"
+
+static void CS_LOW()
+{
+	sil_wrb_mem(PORTC_PODR_ADDR, sil_reb_mem(PORTC_PODR_ADDR) & ~PORT_PODR_B0_BIT);		/* Set CS# low */
+}
+
+static void CS_HIGH()
+{
+	sil_wrb_mem(PORTC_PODR_ADDR, sil_reb_mem(PORTC_PODR_ADDR) | PORT_PODR_B0_BIT);		/* Set CS# high */
+}
+
+static bool_t WP()
+{
+	return false;
+}
+
+static bool_t INS()
+{
+	return (sil_reb_mem(PORT1_PIDR_ADDR) & PORT_PIDR_B5_BIT) == 0;
+}
+
+static void CTRL_INIT()
+{
+	/* CS=OUT */
+	sil_wrb_mem(PORTC_PDR_ADDR, sil_reb_mem(PORTC_PDR_ADDR) | PORT_PDR_B0_BIT);
+	/* INS=IN */
+	sil_wrb_mem(PORT1_PDR_ADDR, sil_reb_mem(PORT1_PDR_ADDR) & ~PORT_PDR_B5_BIT);
+	/* SPICLK,SPIMOSI=OUT */
+	sil_wrb_mem(PORTC_PDR_ADDR, sil_reb_mem(PORTC_PDR_ADDR) | PORT_PDR_B5_BIT | PORT_PDR_B6_BIT);
+	/* CS,SPICLK,SPIMOSI=HI */
+	sil_wrb_mem(PORTC_PODR_ADDR, sil_reb_mem(PORTC_PODR_ADDR) | PORT_PODR_B0_BIT | PORT_PDR_B5_BIT | PORT_PDR_B6_BIT);
+	/* SPIMISO=IN */
+	sil_wrb_mem(PORTC_PDR_ADDR, sil_reb_mem(PORTC_PDR_ADDR) & ~PORT_PDR_B7_BIT);
+	/* SPIMISO=PULLUP */
+	sil_wrb_mem(PORTC_PCR_ADDR, sil_reb_mem(PORTC_PDR_ADDR) | PORT_PDR_B7_BIT);
+	/* CMOSðIð */
+	sil_wrb_mem(PORTC_ODR0_ADDR, 0x00);
+	/* CMOSðIð */
+	sil_wrb_mem(PORTC_ODR1_ADDR, 0x00);
+}
+
+#define F_PCLK		48000000UL	/* PCLK frequency (configured by SCKCR.PCK) */
+#define SCLK_FAST	24000000UL	/* SCLK frequency (R/W) */
+#define SCLK_SLOW	375000UL	/* SCLK frequency (Init) */
+
+static void RSPI_ATTACH()
+{
+	/*
+	 * W
+[Xgbv@\ÌÝè(RSPI0)
+	 */
+	sil_wrh_mem(SYSTEM_PRCR_ADDR, (uint16_t)0xA502);	/* ÝÂ */
+	sil_wrw_mem(SYSTEM_MSTPCRB_ADDR,
+		sil_rew_mem(SYSTEM_MSTPCRB_ADDR) & ~SYSTEM_MSTPCRB_MSTPB17_BIT);
+	sil_wrh_mem(SYSTEM_PRCR_ADDR, (uint16_t)0xA500);	/* ÝÖ~ */
+
+	/* P15ðGPIOÆµÄgp */
+	sil_wrb_mem(PORT1_PMR_ADDR,
+		sil_reb_mem(PORT1_PMR_ADDR) & ~PORT_PMR_B5_BIT);
+	/* PC0ðGPIOÆµÄgp */
+	sil_wrb_mem(PORTC_PMR_ADDR,
+		sil_reb_mem(PORTC_PMR_ADDR) & ~PORT_PMR_B0_BIT);
+	/* PC5, PC6, PC7ðüÓ@\ÆµÄgp */
+	sil_wrb_mem(PORTC_PMR_ADDR,
+		sil_reb_mem(PORTC_PMR_ADDR) | PORT_PMR_B5_BIT | PORT_PMR_B6_BIT | PORT_PMR_B7_BIT);
+
+	/* «ÝveNgWX^ÌÝè PFSWErbgÖÌ«ÝðÂ */
+	sil_wrb_mem(MPC_PWPR_ADDR, 0x00);
+	/* «ÝveNgWX^ÌÝè PxxFSWX^ÖÌ«ÝðÂ */
+	sil_wrb_mem(MPC_PWPR_ADDR, 0x40);
+
+	/* RSPCKAðIð */
+	sil_wrb_mem(MPC_PC5PFS_ADDR, 0x0d);
+	/* MOSIAðIð */
+	sil_wrb_mem(MPC_PC6PFS_ADDR, 0x0d);
+	/* MISOAðIð */
+	sil_wrb_mem(MPC_PC7PFS_ADDR, 0x0d);
+
+	/* «ÝveNgWX^ÌÝè «ÝðÖ~ */
+	sil_wrb_mem(MPC_PWPR_ADDR, 0x80);
+}
+
+static void FCLK_FAST()
+{
+	/* RSPI@\ð³ø» */
+	sil_wrb_mem(RSPI0_SPCR_ADDR,
+		sil_reb_mem(RSPI0_SPCR_ADDR) & ~RSPI_SPCR_SPE_BIT);
+	/* rbg[gÝè */
+	sil_wrb_mem(RSPI0_SPBR_ADDR, F_PCLK / 2 / SCLK_FAST - 1);
+	/* RSPI@\ðLø» */
+	sil_wrb_mem(RSPI0_SPCR_ADDR,
+		sil_reb_mem(RSPI0_SPCR_ADDR) | RSPI_SPCR_SPE_BIT);
+}
+
+#ifdef SIL_ENDIAN_LITTLE
+#define LDDW(x) rev_endian_uint32(x)	/* Little endian: swap bytes */
+#else
+#define LDDW(x) x		/* Big endian: no swap */
+#endif
+
+
+
+/*--------------------------------------------------------------------------
+
+   Module Private Functions
+
+---------------------------------------------------------------------------*/
+
+/* MMC/SD command */
+#define CMD0	(0)			/* GO_IDLE_STATE */
+#define CMD1	(1)			/* SEND_OP_COND (MMC) */
+#define	ACMD41	(0x80+41)	/* SEND_OP_COND (SDC) */
+#define CMD8	(8)			/* SEND_IF_COND */
+#define CMD9	(9)			/* SEND_CSD */
+#define CMD10	(10)		/* SEND_CID */
+#define CMD12	(12)		/* STOP_TRANSMISSION */
+#define ACMD13	(0x80+13)	/* SD_STATUS (SDC) */
+#define CMD16	(16)		/* SET_BLOCKLEN */
+#define CMD17	(17)		/* READ_SINGLE_BLOCK */
+#define CMD18	(18)		/* READ_MULTIPLE_BLOCK */
+#define CMD23	(23)		/* SET_BLOCK_COUNT (MMC) */
+#define	ACMD23	(0x80+23)	/* SET_WR_BLK_ERASE_COUNT (SDC) */
+#define CMD24	(24)		/* WRITE_BLOCK */
+#define CMD25	(25)		/* WRITE_MULTIPLE_BLOCK */
+#define CMD32	(32)		/* ERASE_ER_BLK_START */
+#define CMD33	(33)		/* ERASE_ER_BLK_END */
+#define CMD38	(38)		/* ERASE */
+#define CMD55	(55)		/* APP_CMD */
+#define CMD58	(58)		/* READ_OCR */
+
+
+
+static volatile
+DSTATUS Stat = STA_NOINIT;	/* Physical drive status */
+
+static volatile
+WORD Timer1, Timer2;	/* 1000Hz decrement timer stopped at zero (driven by mmc_rspi_timerproc()) */
+
+static
+BYTE CardType;			/* Card type flags */
+
+static
+BYTE CSD[16], CID[16];
+
+static
+uint64_t CardCapacity;
+
+static
+uint32_t CardBlockSize;
+
+/*-----------------------------------------------------------------------*/
+/* Control SPI module                                                    */
+/*-----------------------------------------------------------------------*/
+/* Only these five functions are platform dependent. Any other functions */
+/* are portable to different system.                                     */
+
+/*---------------------------------*/
+/* Enable SPI and MMC/SDC controls */
+/*---------------------------------*/
+static
+void power_on(void)
+{
+	/* Initialize CS/INS/WP port */
+	CTRL_INIT();
+
+	/* Attach RSPI0 module to I/O pads, disable module stop */
+	RSPI_ATTACH();
+
+	/* Initialize RSPI module */
+	sil_wrb_mem(RSPI0_SPCR_ADDR, 0);		/* Stop RSPI module */
+	sil_wrb_mem(RSPI0_SPPCR_ADDR, 0);	/* Fixed idle value, disable loop-back mode */
+	sil_wrb_mem(RSPI0_SPSCR_ADDR, 0);	/* Disable sequence control */
+	sil_wrb_mem(RSPI0_SPDCR_ADDR, 0x20);	/* SPLW=1 */
+	sil_wrh_mem(RSPI0_SPCMD0_ADDR, 0x0700);	/* LSBF=0, SPB=7, BRDV=0, CPOL=0, CPHA=0 */
+	sil_wrb_mem(RSPI0_SPBR_ADDR, F_PCLK / 2 / SCLK_SLOW - 1);	/* Bit rate */
+	sil_wrb_mem(RSPI0_SPCR_ADDR, 0xC9);	/* Start RSPI in master mode */
+
+	//ena_int(INTNO_MMC_RSPI_SPRI);
+	//ena_int(INTNO_MMC_RSPI_SPTI);
+	//ena_int(INTNO_MMC_RSPI_SPII);
+	sil_wrb_mem(ICU_IR039_ADDR, 0x00);
+
+	sta_cyc(MMC_RSPI_CYC);
+}
+
+
+/*---------------------*/
+/*    Disable SPI      */
+/*---------------------*/
+static
+void power_off(void)	/* Disable MMC/SDC interface */
+{
+	stp_cyc(MMC_RSPI_CYC);
+
+	//dis_int(INTNO_MMC_RSPI_SPRI);
+	//dis_int(INTNO_MMC_RSPI_SPTI);
+	//dis_int(INTNO_MMC_RSPI_SPII);
+
+	sil_wrb_mem(RSPI0_SPCR_ADDR, 0);		/* Stop RSPI module */
+}
+
+
+/*---------------------*/
+/* Send/Receive a byte */
+/*---------------------*/
+static
+BYTE xchg_spi(
+	BYTE dat	/* Data to send */
+	)
+{
+	sil_wrb_mem(RSPI0_SPSR_ADDR, 0xA0);
+	sil_wrw_mem(RSPI0_SPDR_ADDR, dat);			/* Start transmission (lower 8bits) */
+	/*while ((sil_reb_mem(RSPI0_SPSR_ADDR) & RSPI_SPSR_SPRF_BIT) == 0);	/* Wait for end of transfer */
+	while ((sil_reb_mem(ICU_IR039_ADDR) & 0x01) == 0);
+	sil_wrb_mem(ICU_IR039_ADDR, 0x00);
+	return sil_rew_mem(RSPI0_SPDR_ADDR);			/* Returen received byte (lower 8bits) */
+}
+
+
+/*---------------------*/
+/* Send multiple bytes */
+/*---------------------*/
+static
+void xmit_spi_multi(
+	const BYTE *buff,	/* Pointer to the data */
+	UINT btx			/* Number of bytes to send (multiple of 4) */
+	)
+{
+	const DWORD *lp = (const DWORD*)buff;
+
+	sil_wrh_mem(RSPI0_SPCMD0_ADDR,
+		(sil_reh_mem(RSPI0_SPCMD0_ADDR) & ~RSPI_SPCMD_SPB_MASK) | (3 << RSPI_SPCMD_SPB_OFFSET));	/* Set 32-bit mode */
+
+	do {
+		sil_wrb_mem(RSPI0_SPSR_ADDR, 0xA0);
+		sil_wrw_mem(RSPI0_SPDR_ADDR, LDDW(*lp++));	/* Send four data bytes */
+		/*while ((sil_reb_mem(RSPI0_SPSR_ADDR) & RSPI_SPSR_SPRF_BIT) == 0);	/* Wait for end of transfer */
+		while ((sil_reb_mem(ICU_IR039_ADDR) & 0x01) == 0);
+		sil_wrb_mem(ICU_IR039_ADDR, 0x00);
+		sil_rew_mem(RSPI0_SPDR_ADDR);					/* Discard four received bytes */
+	} while (btx -= 4);					/* Repeat until all data sent */
+
+	sil_wrh_mem(RSPI0_SPCMD0_ADDR,
+		(sil_reh_mem(RSPI0_SPCMD0_ADDR) & ~RSPI_SPCMD_SPB_MASK) | (7 << RSPI_SPCMD_SPB_OFFSET));	/* Set 8-bit mode */
+}
+
+
+/*------------------------*/
+/* Receive multiple bytes */
+/*------------------------*/
+static
+void rcvr_spi_multi(
+	BYTE *buff,		/* Pointer to data buffer */
+	UINT size,		/* Buffer size */
+	UINT skip,
+	UINT btr		/* Number of bytes to receive (multiple of 4) */
+	)
+{
+	DWORD *lp, data;
+	UINT pos, start = skip & ~3, end = (skip + size) & ~3, temp, dpos;
+
+	sil_wrh_mem(RSPI0_SPCMD0_ADDR,
+		(sil_reh_mem(RSPI0_SPCMD0_ADDR) & ~RSPI_SPCMD_SPB_MASK) | (3 << RSPI_SPCMD_SPB_OFFSET));	/* Set 32-bit mode */
+
+	for (pos = 0; pos < start; pos += 4) {
+		sil_wrb_mem(RSPI0_SPSR_ADDR, 0xA0);
+		sil_wrw_mem(RSPI0_SPDR_ADDR, 0xFFFFFFFF);	/* Send four 0xFFs */
+		/*while ((sil_reb_mem(RSPI0_SPSR_ADDR) & RSPI_SPSR_SPRF_BIT) == 0);	/* Wait for end of transfer */
+		while ((sil_reb_mem(ICU_IR039_ADDR) & 0x01) == 0);
+		sil_wrb_mem(ICU_IR039_ADDR, 0x00);
+		sil_rew_mem(RSPI0_SPDR_ADDR);	/* skip four received bytes */
+	}
+
+	if ((temp = skip & 3) != 0) {
+		sil_wrb_mem(RSPI0_SPSR_ADDR, 0xA0);
+		sil_wrw_mem(RSPI0_SPDR_ADDR, 0xFFFFFFFF);	/* Send four 0xFFs */
+													/*while ((sil_reb_mem(RSPI0_SPSR_ADDR) & RSPI_SPSR_SPRF_BIT) == 0);	/* Wait for end of transfer */
+		while ((sil_reb_mem(ICU_IR039_ADDR) & 0x01) == 0);
+		sil_wrb_mem(ICU_IR039_ADDR, 0x00);
+		data = LDDW(sil_rew_mem(RSPI0_SPDR_ADDR));	/* Store four received bytes */
+		pos += 4;
+		dpos = 0;
+		switch (temp) {
+		case 1:
+			buff[dpos++] = (BYTE)(data >> 8);
+		case 2:
+			buff[dpos++] = (BYTE)(data >> 16);
+		case 3:
+			buff[dpos++] = (BYTE)(data >> 24);
+		}
+		lp = (DWORD*)&buff[dpos];
+	}
+	else
+		lp = (DWORD*)buff;
+
+	for (; pos < end; pos += 4) {
+		sil_wrb_mem(RSPI0_SPSR_ADDR, 0xA0);
+		sil_wrw_mem(RSPI0_SPDR_ADDR, 0xFFFFFFFF);	/* Send four 0xFFs */
+		/*while ((sil_reb_mem(RSPI0_SPSR_ADDR) & RSPI_SPSR_SPRF_BIT) == 0);	/* Wait for end of transfer */
+		while ((sil_reb_mem(ICU_IR039_ADDR) & 0x01) == 0);
+		sil_wrb_mem(ICU_IR039_ADDR, 0x00);
+		*lp++ = LDDW(sil_rew_mem(RSPI0_SPDR_ADDR));	/* Store four received bytes */
+	}					/* Repeat until all data received */
+
+	if ((temp = (skip + size) & 3) != 0) {
+		sil_wrb_mem(RSPI0_SPSR_ADDR, 0xA0);
+		sil_wrw_mem(RSPI0_SPDR_ADDR, 0xFFFFFFFF);	/* Send four 0xFFs */
+													/*while ((sil_reb_mem(RSPI0_SPSR_ADDR) & RSPI_SPSR_SPRF_BIT) == 0);	/* Wait for end of transfer */
+		while ((sil_reb_mem(ICU_IR039_ADDR) & 0x01) == 0);
+		sil_wrb_mem(ICU_IR039_ADDR, 0x00);
+		data = LDDW(sil_rew_mem(RSPI0_SPDR_ADDR));	/* Store four received bytes */
+		pos += 4;
+		buff = (BYTE *)lp;
+		switch (temp) {
+		case 3:
+			buff[2] = (BYTE)(data >> 16);
+		case 2:
+			buff[1] = (BYTE)(data >> 8);
+		case 1:
+			buff[0] = (BYTE)data;
+		}
+	}
+
+	for (pos = 0; pos < btr; pos += 4) {
+		sil_wrb_mem(RSPI0_SPSR_ADDR, 0xA0);
+		sil_wrw_mem(RSPI0_SPDR_ADDR, 0xFFFFFFFF);	/* Send four 0xFFs */
+													/*while ((sil_reb_mem(RSPI0_SPSR_ADDR) & RSPI_SPSR_SPRF_BIT) == 0);	/* Wait for end of transfer */
+		while ((sil_reb_mem(ICU_IR039_ADDR) & 0x01) == 0);
+		sil_wrb_mem(ICU_IR039_ADDR, 0x00);
+		sil_rew_mem(RSPI0_SPDR_ADDR);	/* skip four received bytes */
+	}
+
+	sil_wrh_mem(RSPI0_SPCMD0_ADDR,
+		(sil_reh_mem(RSPI0_SPCMD0_ADDR) & ~RSPI_SPCMD_SPB_MASK) | (7 << RSPI_SPCMD_SPB_OFFSET));	/* Set 8-bit mode */
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Wait for card ready                                                   */
+/*-----------------------------------------------------------------------*/
+
+static
+int wait_ready(	/* 1:Ready, 0:Timeout */
+	UINT wt			/* Timeout [ms] */
+	)
+{
+	Timer2 = (WORD)wt;
+
+	do {
+		if (xchg_spi(0xFF) == 0xFF) return 1;	/* Card goes ready */
+		/* This loop takes a time. Insert rot_rdq() here for multitask envilonment. */
+	} while (Timer2);	/* Wait until card goes ready or timeout */
+
+	return 0;	/* Timeout occured */
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Deselect card and release SPI                                         */
+/*-----------------------------------------------------------------------*/
+
+static
+void deselect(void)
+{
+	CS_HIGH();		/* Set CS# high */
+	xchg_spi(0xFF);	/* Dummy clock (force DO hi-z for multiple slave SPI) */
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Select card and wait for ready                                        */
+/*-----------------------------------------------------------------------*/
+
+static
+int select(void)	/* 1:OK, 0:Timeout */
+{
+	CS_LOW();		/* Set CS# low */
+	xchg_spi(0xFF);	/* Dummy clock (force DO enabled) */
+
+	if (wait_ready(500)) return 1;	/* Wait for card ready */
+
+	deselect();
+	return 0;	/* Failed to select the card due to timeout */
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Receive a data packet from the MMC                                    */
+/*-----------------------------------------------------------------------*/
+
+static
+int rcvr_datablock(	/* 1:OK, 0:Error */
+	BYTE *buff,			/* Data buffer */
+	UINT size,			/* Buffer size */
+	UINT skip,
+	UINT btr			/* Data block length (byte) */
+	)
+{
+	BYTE token;
+
+
+	Timer1 = 200;
+	do {							/* Wait for DataStart token in timeout of 200ms */
+		token = xchg_spi(0xFF);
+		/* This loop will take a time. Insert rot_rdq() here for multitask envilonment. */
+	} while ((token == 0xFF) && Timer1);
+	if (token != 0xFE) return 0;	/* Function fails if invalid DataStart token or timeout */
+
+	rcvr_spi_multi(buff, size, skip, btr);		/* Store trailing data to the buffer */
+	xchg_spi(0xFF); xchg_spi(0xFF);	/* Discard CRC */
+
+	return 1;						/* Function succeeded */
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Send a data packet to the MMC                                         */
+/*-----------------------------------------------------------------------*/
+
+#if _USE_WRITE
+static
+int xmit_datablock(	/* 1:OK, 0:Failed */
+	const BYTE *buff,	/* Ponter to 512 byte data to be sent */
+	BYTE token			/* Token */
+	)
+{
+	BYTE resp;
+
+
+	if (!wait_ready(500)) return 0;		/* Wait for card ready */
+
+	xchg_spi(token);					/* Send token */
+	if (token != 0xFD) {				/* Send data if token is other than StopTran */
+		xmit_spi_multi(buff, 512);		/* Data */
+		xchg_spi(0xFF); xchg_spi(0xFF);	/* Dummy CRC */
+
+		resp = xchg_spi(0xFF);			/* Receive data resp */
+		if ((resp & 0x1F) != 0x05)		/* Function fails if the data packet was not accepted */
+			return 0;
+	}
+	return 1;
+}
+#endif /* _USE_WRITE */
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Send a command packet to the MMC                                      */
+/*-----------------------------------------------------------------------*/
+
+static
+BYTE send_cmd(		/* Return value: R1 resp (bit7==1:Failed to send) */
+	BYTE cmd,		/* Command index */
+	DWORD arg		/* Argument */
+	)
+{
+	BYTE n, res;
+
+
+	if (cmd & 0x80) {	/* Send a CMD55 prior to ACMD<n> */
+		cmd &= 0x7F;
+		res = send_cmd(CMD55, 0);
+		if (res > 1) return res;
+	}
+
+	/* Select the card and wait for ready except to stop multiple block read */
+	if (cmd != CMD12) {
+		deselect();
+		if (!select()) return 0xFF;
+	}
+
+	/* Send command packet */
+	xchg_spi(0x40 | cmd);			/* Start + command index */
+	xchg_spi((BYTE)(arg >> 24));	/* Argument[31..24] */
+	xchg_spi((BYTE)(arg >> 16));	/* Argument[23..16] */
+	xchg_spi((BYTE)(arg >> 8));		/* Argument[15..8] */
+	xchg_spi((BYTE)arg);			/* Argument[7..0] */
+	n = 0x01;						/* Dummy CRC + Stop */
+	if (cmd == CMD0) n = 0x95;		/* Valid CRC for CMD0(0) */
+	if (cmd == CMD8) n = 0x87;		/* Valid CRC for CMD8(0x1AA) */
+	xchg_spi(n);
+
+	/* Receive command resp */
+	if (cmd == CMD12) xchg_spi(0xFF);	/* Diacard stuff byte on CMD12 */
+	n = 10;							/* Wait for response (10 bytes max) */
+	do
+		res = xchg_spi(0xFF);
+	while ((res & 0x80) && --n);
+
+	return res;						/* Return received response */
+}
+
+
+
+/*--------------------------------------------------------------------------
+
+   Public Functions
+
+---------------------------------------------------------------------------*/
+
+
+/*-----------------------------------------------------------------------*/
+/* Initialize disk drive                                                 */
+/*-----------------------------------------------------------------------*/
+
+DSTATUS mmc_rspi_initialize(void)
+{
+	BYTE n, cmd, ty, ocr[4];
+
+
+	power_on();							/* Initialize RSPI */
+	for (n = 10; n; n--) xchg_spi(0xFF);/* Send 80 dummy clocks */
+
+	ty = 0;
+	if (send_cmd(CMD0, 0) == 1) {			/* Put the card SPI/Idle state */
+		Timer1 = 1000;						/* Initialization timeout = 1 sec */
+		if (send_cmd(CMD8, 0x1AA) == 1) {	/* SDv2? */
+			for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);	/* Get 32 bit return value of R7 resp */
+			if (ocr[2] == 0x01 && ocr[3] == 0xAA) {				/* Is the card supports vcc of 2.7-3.6V? */
+				while (Timer1 && send_cmd(ACMD41, 1UL << 30));	/* Wait for end of initialization with ACMD41(HCS) */
+				if (Timer1 && send_cmd(CMD58, 0) == 0) {		/* Check CCS bit in the OCR */
+					for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
+					ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;	/* Card id SDv2 */
+				}
+			}
+		}
+		else {	/* Not SDv2 card */
+			if (send_cmd(ACMD41, 0) <= 1) {	/* SDv1 or MMC? */
+				ty = CT_SD1; cmd = ACMD41;	/* SDv1 (ACMD41(0)) */
+			}
+			else {
+				ty = CT_MMC; cmd = CMD1;	/* MMCv3 (CMD1(0)) */
+			}
+			while (Timer1 && send_cmd(cmd, 0));		/* Wait for end of initialization */
+			//if (!Timer1 || send_cmd(CMD16, 512) != 0)	/* Set block length: 512 */
+			//	ty = 0;
+		}
+		if (ty) {
+			if (send_cmd(CMD9, 0) == 0		/* READ_CSD */
+				&& rcvr_datablock(CSD, 16, 0, 16)){
+				/* CSD Ver.1.0 */
+				if ((CSD[0] & 0xC0) == 0) {
+					CardBlockSize = 1 << (CSD[5] & 0x0F);
+					CardCapacity = (((CSD[6] & 0x03) << 10) | (CSD[7] << 2) | ((CSD[8] & 0xC0) >> 6)) + 1;
+					CardCapacity *= (((uint64_t)1) << ((((CSD[9] & 0x03) << 1) | (CSD[10] & 0x80) >> 7) + 2));
+					CardCapacity *= (uint64_t)CardBlockSize;
+				}
+				else {
+					CardBlockSize = 512;
+					CardCapacity = ((uint64_t)((((CSD[7] & 0x3F) << 16) | (CSD[8] << 8) | CSD[9]) + 1)) * 512 * 1024;
+				}
+				if (send_cmd(CMD10, 0) != 0		/* READ_CID */
+					|| !rcvr_datablock(CID, 16, 0, 16)) {
+					ty = 0;
+				}
+			}
+			else {
+				ty = 0;
+			}
+		}
+	}
+	CardType = ty;	/* Card type */
+	deselect();
+
+	if (ty) {			/* OK */
+		FCLK_FAST();			/* Set fast clock */
+		Stat &= ~STA_NOINIT;	/* Clear STA_NOINIT flag */
+	}
+	else {			/* Failed */
+		power_off();
+		Stat = STA_NOINIT;
+	}
+
+	return Stat;
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get disk status                                                       */
+/*-----------------------------------------------------------------------*/
+
+DSTATUS mmc_rspi_get_status(void)
+{
+	return Stat;	/* Return disk status */
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Read sector(s)                                                        */
+/*-----------------------------------------------------------------------*/
+
+DRESULT mmc_rspi_readp(
+	BYTE *buff,		/* Pointer to the data buffer to store read data */
+	DWORD sector,	/* Start sector number (LBA) */
+	UINT offset,	/* Offset in the sector */
+	UINT count		/* Byte count */
+	)
+{
+	if (!count) return RES_PARERR;		/* Check parameter */
+	if (Stat & STA_NOINIT) return RES_NOTRDY;	/* Check if drive is ready */
+
+	if (!(CardType & CT_BLOCK)) sector *= 512;	/* LBA ot BA conversion (byte addressing cards) */
+
+	if ((send_cmd(CMD17, sector) == 0)	/* READ_SINGLE_BLOCK */
+		&& rcvr_datablock(buff, count, offset, 512))
+		count = 0;
+	deselect();
+
+	return count ? RES_ERROR : RES_OK;	/* Return result */
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Write sector(s)                                                       */
+/*-----------------------------------------------------------------------*/
+
+#if _USE_WRITE
+DRESULT mmc_rspi_writep(
+	const BYTE *buff,	/* Ponter to the data to write */
+	DWORD sector		/* Start sector number (LBA) */
+	)
+{
+	DRESULT res = RES_ERROR;
+	if (Stat & STA_NOINIT) return RES_NOTRDY;	/* Check drive status */
+	if (Stat & STA_PROTECT) return RES_WRPRT;	/* Check write protect */
+
+	if (!(CardType & CT_BLOCK)) sector *= 512;	/* LBA ==> BA conversion (byte addressing cards) */
+
+	if ((send_cmd(CMD24, sector) == 0)	/* WRITE_BLOCK */
+		&& xmit_datablock(buff, 0xFE))
+		res = RES_OK;
+	deselect();
+
+	return res;	/* Return result */
+}
+#endif /* _USE_WRITE */
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Miscellaneous drive controls other than data read/write               */
+/*-----------------------------------------------------------------------*/
+
+#if _USE_IOCTL
+DRESULT mmc_rspi_ioctl(
+	BYTE ctrl,		/* Control command code */
+	void *buff		/* Pointer to the conrtol data */
+	)
+{
+	DRESULT res;
+	BYTE n, csd[16], *ptr = buff;
+	DWORD *dp, st, ed;
+
+
+	if (Stat & STA_NOINIT) return RES_NOTRDY;	/* Check if drive is ready */
+
+	res = RES_ERROR;
+
+	switch (ctrl) {
+	case CTRL_SYNC:		/* Wait for end of internal write process of the drive */
+		if (select()) res = RES_OK;
+		break;
+
+	case GET_SECTOR_SIZE:
+		*(WORD*)buff = 512;
+		res = RES_OK;
+		break;
+
+	case GET_SECTOR_COUNT:
+		*(DWORD*)buff = CardCapacity / 512;
+		res = RES_OK;
+		break;
+
+	case GET_BLOCK_SIZE:
+		*(DWORD*)buff = CardBlockSize;
+		res = RES_OK;
+		break;
+
+	case CTRL_TRIM:	/* Erase a block of sectors (used when _USE_TRIM == 1) */
+		if (!(CardType & CT_SDC)) break;				/* Check if the card is SDC */
+		if (mmc_rspi_ioctl(MMC_GET_CSD, csd)) break;	/* Get CSD */
+		if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break;	/* Check if sector erase can be applied to the card */
+		dp = buff; st = dp[0]; ed = dp[1];				/* Load sector block */
+		if (!(CardType & CT_BLOCK)) {
+			st *= 512; ed *= 512;
+		}
+		if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000))	/* Erase sector block */
+			res = RES_OK;
+		break;
+
+		/* Following command are not used by FatFs module */
+
+	case MMC_GET_TYPE:		/* Get MMC/SDC type (BYTE) */
+		*ptr = CardType;
+		res = RES_OK;
+		break;
+
+	case MMC_GET_CSD:		/* Read CSD (16 bytes) */
+		memcpy(ptr, CSD, sizeof(CSD));
+		res = RES_OK;
+		break;
+
+	case MMC_GET_CID:		/* Read CID (16 bytes) */
+		memcpy(ptr, CID, sizeof(CID));
+		res = RES_OK;
+		break;
+
+	case MMC_GET_OCR:		/* Read OCR (4 bytes) */
+		if (send_cmd(CMD58, 0) == 0) {	/* READ_OCR */
+			for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF);
+			res = RES_OK;
+		}
+		break;
+
+	case MMC_GET_SDSTAT:	/* Read SD status (64 bytes) */
+		if (send_cmd(ACMD13, 0) == 0) {	/* SD_STATUS */
+			xchg_spi(0xFF);
+			if (rcvr_datablock(ptr, 64, 0, 64))
+				res = RES_OK;
+		}
+		break;
+
+	default:
+		res = RES_PARERR;
+	}
+
+	deselect();
+
+	return res;
+}
+#endif /* _USE_IOCTL */
+
+
+/*-----------------------------------------------------------------------*/
+/* Device timer function                                                 */
+/*-----------------------------------------------------------------------*/
+/* This function must be called from system timer process
+/  in period of 1 ms to generate card control timing.
+*/
+
+void mmc_rspi_timerproc(void)
+{
+	WORD n;
+	BYTE s;
+
+
+	n = Timer1;						/* 1kHz decrement timer stopped at 0 */
+	if (n) Timer1 = --n;
+	n = Timer2;
+	if (n) Timer2 = --n;
+
+	s = Stat;
+	if (WP())		/* Write protected */
+		s |= STA_PROTECT;
+	else		/* Write enabled */
+		s &= ~STA_PROTECT;
+	if (INS())	/* Card is in socket */
+		s &= ~STA_NODISK;
+	else		/* Socket empty */
+		s |= (STA_NODISK | STA_NOINIT);
+	Stat = s;
+}
+
+void mmc_rspi_spri_handler(void)
+{
+	i_begin_int(INTNO_MMC_RSPI_SPRI);
+
+	i_end_int(INTNO_MMC_RSPI_SPRI);
+}
+
+void mmc_rspi_spti_handler(void)
+{
+	i_begin_int(INTNO_MMC_RSPI_SPTI);
+
+	i_end_int(INTNO_MMC_RSPI_SPTI);
+}
+
+void mmc_rspi_spii_handler(void)
+{
+	i_begin_int(INTNO_MMC_RSPI_SPII);
+
+	i_end_int(INTNO_MMC_RSPI_SPII);
+}
+
+void mmc_rspi_cychdr(intptr_t exinf)
+{
+	mmc_rspi_timerproc();
+}
Index: uKadecot/trunk/pfatfs/mmc_rspi.cfg
===================================================================
--- uKadecot/trunk/pfatfs/mmc_rspi.cfg	(revision 154)
+++ uKadecot/trunk/pfatfs/mmc_rspi.cfg	(revision 154)
@@ -0,0 +1,56 @@
+/*
+ *  TOPPERS ECHONET Lite Communication Middleware
+ * 
+ *  Copyright (C) 2016 Cores Co., Ltd. Japan
+ * 
+ *  ãLì ÒÍCÈºÌ(1)`(4)Ìðð½·êÉÀèC{\tgEF
+ *  Ai{\tgEFAðüÏµ½àÌðÜÞDÈº¯¶jðgpE¡»Eü
+ *  ÏEÄzziÈºCpÆÄÔj·é±Æð³Åø·éD
+ *  (1) {\tgEFAð\[XR[hÌ`Åp·éêÉÍCãLÌì
+ *       \¦C±Ìpð¨æÑºLÌ³ÛØKèªC»ÌÜÜÌ`Å\[
+ *      XR[hÉÜÜêÄ¢é±ÆD
+ *  (2) {\tgEFAðCCu`®ÈÇC¼Ì\tgEFAJ­Ég
+ *      pÅ«é`ÅÄzz·éêÉÍCÄzzÉº¤hL
+gip
+ *      Ò}j
+AÈÇjÉCãLÌì \¦C±Ìpð¨æÑºL
+ *      Ì³ÛØKèðfÚ·é±ÆD
+ *  (3) {\tgEFAðC@íÉgÝÞÈÇC¼Ì\tgEFAJ­Ég
+ *      pÅ«È¢`ÅÄzz·éêÉÍCÌ¢¸ê©Ìðð½·±
+ *      ÆD
+ *    (a) ÄzzÉº¤hL
+gipÒ}j
+AÈÇjÉCãLÌ
+ *        ì \¦C±Ìpð¨æÑºLÌ³ÛØKèðfÚ·é±ÆD
+ *    (b) ÄzzÌ`ÔðCÊÉèßéû@ÉæÁÄCTOPPERSvWFNgÉ
+ *        ñ·é±ÆD
+ *  (4) {\tgEFAÌpÉæè¼ÚIÜ½ÍÔÚIÉ¶¶é¢©Èé¹
+ *      Q©çàCãLì Ò¨æÑTOPPERSvWFNgðÆÓ·é±ÆD
+ *      Ü½C{\tgEFAÌ[UÜ½ÍGh[U©çÌ¢©Èé
+ *      RÉîÃ­¿©çàCãLì Ò¨æÑTOPPERSvWFNgð
+ *      ÆÓ·é±ÆD
+ * 
+ *  {\tgEFAÍC³ÛØÅñ³êÄ¢éàÌÅ éDãLì Ò¨
+ *  æÑTOPPERSvWFNgÍC{\tgEFAÉÖµÄCÁèÌgpÚI
+ *  ÉÎ·éK«àÜßÄC¢©ÈéÛØàsíÈ¢DÜ½C{\tgEF
+ *  AÌpÉæè¼ÚIÜ½ÍÔÚIÉ¶¶½¢©Èé¹QÉÖµÄàC»
+ *  ÌÓCðíÈ¢D
+ * 
+ *  @(#) $Id$
+ */
+
+#include "mmc_rspi.h"
+
+/* èÝnh */
+
+DEF_INH(INHNO_MMC_RSPI_SPRI, { TA_HLNG, mmc_rspi_spri_handler });
+CFG_INT(INTNO_MMC_RSPI_SPRI, { INTATR_MMC_RSPI_SPRI, INTPRI_MMC_RSPI_SPRI });
+
+DEF_INH(INHNO_MMC_RSPI_SPTI, { TA_HLNG, mmc_rspi_spti_handler });
+CFG_INT(INTNO_MMC_RSPI_SPTI, { INTATR_MMC_RSPI_SPTI, INTPRI_MMC_RSPI_SPTI });
+
+DEF_INH(INHNO_MMC_RSPI_SPII, { TA_HLNG, mmc_rspi_spii_handler });
+CFG_INT(INTNO_MMC_RSPI_SPII, { INTATR_MMC_RSPI_SPII, INTPRI_MMC_RSPI_SPII });
+
+CRE_CYC(MMC_RSPI_CYC, { TA_NULL, 0, mmc_rspi_cychdr, 1, 0 });
+
Index: uKadecot/trunk/pfatfs/mmc_rspi.h
===================================================================
--- uKadecot/trunk/pfatfs/mmc_rspi.h	(revision 154)
+++ uKadecot/trunk/pfatfs/mmc_rspi.h	(revision 154)
@@ -0,0 +1,74 @@
+/*
+ *  TOPPERS ECHONET Lite Communication Middleware
+ * 
+ *  Copyright (C) 2016 Cores Co., Ltd. Japan
+ * 
+ *  ãLì ÒÍCÈºÌ(1)`(4)Ìðð½·êÉÀèC{\tgEF
+ *  Ai{\tgEFAðüÏµ½àÌðÜÞDÈº¯¶jðgpE¡»Eü
+ *  ÏEÄzziÈºCpÆÄÔj·é±Æð³Åø·éD
+ *  (1) {\tgEFAð\[XR[hÌ`Åp·éêÉÍCãLÌì
+ *       \¦C±Ìpð¨æÑºLÌ³ÛØKèªC»ÌÜÜÌ`Å\[
+ *      XR[hÉÜÜêÄ¢é±ÆD
+ *  (2) {\tgEFAðCCu`®ÈÇC¼Ì\tgEFAJ­Ég
+ *      pÅ«é`ÅÄzz·éêÉÍCÄzzÉº¤hL
+gip
+ *      Ò}j
+AÈÇjÉCãLÌì \¦C±Ìpð¨æÑºL
+ *      Ì³ÛØKèðfÚ·é±ÆD
+ *  (3) {\tgEFAðC@íÉgÝÞÈÇC¼Ì\tgEFAJ­Ég
+ *      pÅ«È¢`ÅÄzz·éêÉÍCÌ¢¸ê©Ìðð½·±
+ *      ÆD
+ *    (a) ÄzzÉº¤hL
+gipÒ}j
+AÈÇjÉCãLÌ
+ *        ì \¦C±Ìpð¨æÑºLÌ³ÛØKèðfÚ·é±ÆD
+ *    (b) ÄzzÌ`ÔðCÊÉèßéû@ÉæÁÄCTOPPERSvWFNgÉ
+ *        ñ·é±ÆD
+ *  (4) {\tgEFAÌpÉæè¼ÚIÜ½ÍÔÚIÉ¶¶é¢©Èé¹
+ *      Q©çàCãLì Ò¨æÑTOPPERSvWFNgðÆÓ·é±ÆD
+ *      Ü½C{\tgEFAÌ[UÜ½ÍGh[U©çÌ¢©Èé
+ *      RÉîÃ­¿©çàCãLì Ò¨æÑTOPPERSvWFNgð
+ *      ÆÓ·é±ÆD
+ * 
+ *  {\tgEFAÍC³ÛØÅñ³êÄ¢éàÌÅ éDãLì Ò¨
+ *  æÑTOPPERSvWFNgÍC{\tgEFAÉÖµÄCÁèÌgpÚI
+ *  ÉÎ·éK«àÜßÄC¢©ÈéÛØàsíÈ¢DÜ½C{\tgEF
+ *  AÌpÉæè¼ÚIÜ½ÍÔÚIÉ¶¶½¢©Èé¹QÉÖµÄàC»
+ *  ÌÓCðíÈ¢D
+ * 
+ *  @(#) $Id$
+ */
+
+#ifndef _MMC_RSPI_H_
+#define _MMC_RSPI_H_
+
+#include "t_stddef.h"
+#include "diskio.h"
+
+DSTATUS mmc_rspi_initialize(void);
+DSTATUS mmc_rspi_get_status(void);
+DRESULT mmc_rspi_readp(BYTE* buff, DWORD sector, UINT offset, UINT count);
+DRESULT mmc_rspi_writep(const BYTE* buff, DWORD sc);
+DRESULT mmc_rspi_ioctl(BYTE cmd, void* buff);
+
+#define INHNO_MMC_RSPI_SPRI		INT_RSPI0_SPRI0	/* óMèÝ */
+#define INTNO_MMC_RSPI_SPRI		INT_RSPI0_SPRI0	/* óMèÝ */
+#define INTATR_MMC_RSPI_SPRI	(TA_NULL)		/* Ý®«	*/
+#define INTPRI_MMC_RSPI_SPRI	(-1)			/* ÝDæx	*/
+
+#define INHNO_MMC_RSPI_SPTI		INT_RSPI0_SPTI0	/* MèÝ */
+#define INTNO_MMC_RSPI_SPTI		INT_RSPI0_SPTI0	/* MèÝ */
+#define INTATR_MMC_RSPI_SPTI	(TA_NULL)		/* Ý®«	*/
+#define INTPRI_MMC_RSPI_SPTI	(-1)			/* ÝDæx	*/
+
+#define INHNO_MMC_RSPI_SPII		INT_RSPI0_SPII0	/* AChèÝ */
+#define INTNO_MMC_RSPI_SPII		INT_RSPI0_SPII0	/* AChèÝ */
+#define INTATR_MMC_RSPI_SPII	(TA_NULL)		/* Ý®«	*/
+#define INTPRI_MMC_RSPI_SPII	(-1)			/* ÝDæx	*/
+
+extern void mmc_rspi_spri_handler(void);
+extern void mmc_rspi_spti_handler(void);
+extern void mmc_rspi_spii_handler(void);
+extern void mmc_rspi_cychdr(intptr_t exinf);
+
+#endif /* _MMC_RSPI_H_ */
Index: uKadecot/trunk/pfatfs/pff.c
===================================================================
--- uKadecot/trunk/pfatfs/pff.c	(revision 108)
+++ uKadecot/trunk/pfatfs/pff.c	(revision 154)
@@ -58,8 +58,4 @@
 #define ABORT(err)	{fs->flag = 0; return err;}
 
-#if _USE_LFN
-static WCHAR LfnBuf[_MAX_LFN+1];
-#endif
-
 /*--------------------------------------------------------*/
 /* DBCS code ranges and SBCS extend char conversion table */
@@ -509,8 +505,8 @@
 		ofs = bc % 512; bc /= 512;
 		if (ofs != 511) {
-			if (disk_readp(buf, fs->fatbase + bc, ofs, 2)) break;
+			if (fs->disk_readp(buf, fs->fatbase + bc, ofs, 2)) break;
 		} else {
-			if (disk_readp(buf, fs->fatbase + bc, 511, 1)) break;
-			if (disk_readp(buf+1, fs->fatbase + bc + 1, 0, 1)) break;
+			if (fs->disk_readp(buf, fs->fatbase + bc, 511, 1)) break;
+			if (fs->disk_readp(buf+1, fs->fatbase + bc + 1, 0, 1)) break;
 		}
 		wc = LD_WORD(buf);
@@ -520,10 +516,10 @@
 #if _FS_FAT16
 	case FS_FAT16 :
-		if (disk_readp(buf, fs->fatbase + clst / 256, ((UINT)clst % 256) * 2, 2)) break;
+		if (fs->disk_readp(buf, fs->fatbase + clst / 256, ((UINT)clst % 256) * 2, 2)) break;
 		return LD_WORD(buf);
 #endif
 #if _FS_FAT32
 	case FS_FAT32 :
-		if (disk_readp(buf, fs->fatbase + clst / 128, ((UINT)clst % 128) * 4, 4)) break;
+		if (fs->disk_readp(buf, fs->fatbase + clst / 128, ((UINT)clst % 128) * 4, 4)) break;
 		return LD_DWORD(buf) & 0x0FFFFFFF;
 #endif
@@ -673,4 +669,5 @@
 	BYTE a, ord, sum;
 #endif
+	FATFS *fs = dj->fs;
 
 	res = dir_rewind(dj);			/* Rewind directory object */
@@ -681,5 +678,5 @@
 #endif
 	do {
-		res = disk_readp(dir, dj->sect, (dj->index % 16) * 32, 32)	/* Read an entry */
+		res = fs->disk_readp(dir, dj->sect, (dj->index % 16) * 32, 32)	/* Read an entry */
 			? FR_DISK_ERR : FR_OK;
 		if (res != FR_OK) break;
@@ -735,8 +732,9 @@
 	BYTE ord = 0xFF, sum = 0xFF;
 #endif
+	FATFS *fs = dj->fs;
 
 	res = FR_NO_FILE;
 	while (dj->sect) {
-		res = disk_readp(dir, dj->sect, (dj->index % 16) * 32, 32)	/* Read an entry */
+		res = fs->disk_readp(dir, dj->sect, (dj->index % 16) * 32, 32)	/* Read an entry */
 			? FR_DISK_ERR : FR_OK;
 		if (res != FR_OK) break;
@@ -1072,12 +1070,12 @@
 )
 {
-	if (disk_readp(buf, sect, 510, 2))		/* Read the boot record */
+	if (fs->disk_readp(buf, sect, 510, 2))		/* Read the boot record */
 		return 3;
 	if (LD_WORD(buf) != 0xAA55)				/* Check record signature */
 		return 2;
 
-	if (!_FS_32ONLY && !disk_readp(buf, sect, BS_FilSysType, 2) && LD_WORD(buf) == 0x4146)	/* Check FAT12/16 */
+	if (!_FS_32ONLY && !fs->disk_readp(buf, sect, BS_FilSysType, 2) && LD_WORD(buf) == 0x4146)	/* Check FAT12/16 */
 		return 0;
-	if (_FS_FAT32 && !disk_readp(buf, sect, BS_FilSysType32, 2) && LD_WORD(buf) == 0x4146)	/* Check FAT32 */
+	if (_FS_FAT32 && !fs->disk_readp(buf, sect, BS_FilSysType32, 2) && LD_WORD(buf) == 0x4146)	/* Check FAT32 */
 		return 0;
 	return 1;
@@ -1106,5 +1104,5 @@
 	DWORD bsect, fsize, tsect, mclst;
 
-	if (disk_get_status() & STA_NOINIT)	/* Check if the drive is ready or not */
+	if (fs->disk_get_status() & STA_NOINIT)	/* Check if the drive is ready or not */
 		return FR_NOT_READY;
 
@@ -1114,5 +1112,5 @@
 	if (fmt == 1) {						/* Not an FAT boot record, it may be FDISK format */
 		/* Check a partition listed in top of the partition table */
-		if (disk_readp(buf, bsect, MBR_Table, 16)) {	/* 1st partition entry */
+		if (fs->disk_readp(buf, bsect, MBR_Table, 16)) {	/* 1st partition entry */
 			fmt = 3;
 		} else {
@@ -1127,5 +1125,5 @@
 
 	/* Initialize the file system object */
-	if (disk_readp(buf, bsect, 13, sizeof (buf))) return FR_DISK_ERR;
+	if (fs->disk_readp(buf, bsect, 13, sizeof (buf))) return FR_DISK_ERR;
 
 	fsize = LD_WORD(buf+BPB_FATSz16-13);				/* Number of sectors per FAT */
@@ -1187,5 +1185,5 @@
 	dj.fn = sp;
 #if _USE_LFN
-	dj.lfn = LfnBuf;
+	dj.lfn = fs->LfnBuf;
 #endif
 	res = follow_path(&dj, dir, path);	/* Follow the file path */
@@ -1249,5 +1247,5 @@
 		rcnt = 512 - (UINT)fs->fptr % 512;			/* Get partial sector data from sector buffer */
 		if (rcnt > btr) rcnt = btr;
-		dr = disk_readp(!buff ? 0 : rbuff, fs->dsect, (UINT)fs->fptr % 512, rcnt);
+		dr = fs->disk_readp(!buff ? 0 : rbuff, fs->dsect, (UINT)fs->fptr % 512, rcnt);
 		if (dr) ABORT(FR_DISK_ERR);
 		fs->fptr += rcnt; rbuff += rcnt;			/* Update pointers and counters */
@@ -1286,5 +1284,5 @@
 
 	if (!btw) {		/* Finalize request */
-		if ((fs->flag & FA__WIP) && disk_writep(0, 0)) ABORT(FR_DISK_ERR);
+		if ((fs->flag & FA__WIP) && fs->disk_writep(0, 0)) ABORT(FR_DISK_ERR);
 		fs->flag &= ~FA__WIP;
 		return FR_OK;
@@ -1310,14 +1308,14 @@
 			if (!sect) ABORT(FR_DISK_ERR);
 			fs->dsect = sect + cs;
-			if (disk_writep(0, fs->dsect)) ABORT(FR_DISK_ERR);	/* Initiate a sector write operation */
+			if (fs->disk_writep(0, fs->dsect)) ABORT(FR_DISK_ERR);	/* Initiate a sector write operation */
 			fs->flag |= FA__WIP;
 		}
 		wcnt = 512 - (UINT)fs->fptr % 512;			/* Number of bytes to write to the sector */
 		if (wcnt > btw) wcnt = btw;
-		if (disk_writep(p, wcnt)) ABORT(FR_DISK_ERR);	/* Send data to the sector */
+		if (fs->disk_writep(p, wcnt)) ABORT(FR_DISK_ERR);	/* Send data to the sector */
 		fs->fptr += wcnt; p += wcnt;				/* Update pointers and counters */
 		btw -= wcnt; *bw += wcnt;
 		if ((UINT)fs->fptr % 512 == 0) {
-			if (disk_writep(0, 0)) ABORT(FR_DISK_ERR);	/* Finalize the currtent secter write operation */
+			if (fs->disk_writep(0, 0)) ABORT(FR_DISK_ERR);	/* Finalize the currtent secter write operation */
 			fs->flag &= ~FA__WIP;
 		}
@@ -1401,5 +1399,5 @@
 		dj->fn = sp;
 #if _USE_LFN
-		dj->lfn = LfnBuf;
+		dj->lfn = fs->LfnBuf;
 #endif
 		res = follow_path(dj, dir, path);		/* Follow the path to the directory */
Index: uKadecot/trunk/pfatfs/pff.h
===================================================================
--- uKadecot/trunk/pfatfs/pff.h	(revision 108)
+++ uKadecot/trunk/pfatfs/pff.h	(revision 154)
@@ -24,4 +24,5 @@
 #include "integer.h"
 #include "pffconf.h"
+#include "diskio.h"
 
 #if _PFATFS != _PFFCONF
@@ -39,4 +40,7 @@
 
 typedef struct {
+	DSTATUS (* disk_get_status)(void);
+	DRESULT (* disk_readp)(BYTE* buff, DWORD sector, UINT offset, UINT count);
+	DRESULT (* disk_writep)(const BYTE* buff, DWORD sc);
 	BYTE	fs_type;	/* FAT sub type */
 	BYTE	flag;		/* File status flags */
@@ -53,4 +57,7 @@
 	CLUST	curr_clust;	/* File current cluster */
 	DWORD	dsect;		/* File current data sector */
+#if _USE_LFN
+	WCHAR LfnBuf[_MAX_LFN + 1];
+#endif
 } FATFS;
 
Index: uKadecot/trunk/pfatfs/pffconf.h
===================================================================
--- uKadecot/trunk/pfatfs/pffconf.h	(revision 108)
+++ uKadecot/trunk/pfatfs/pffconf.h	(revision 154)
@@ -14,4 +14,5 @@
 #define	_USE_LSEEK	1	/* Enable pf_lseek() function */
 #define	_USE_WRITE	1	/* Enable pf_write() function */
+#define	_USE_IOCTL	1	/* Enable pf_ioctl() function */
 
 #define _FS_FAT12	1	/* Enable FAT12 */
